Iced
High-Level Assembler.
Creates a new instance of this assembler
The assembler instruction set bitness, either 16, 32 or 64 bit.
Gets the bitness defined for this assembler.
true to prefer VEX encoding over EVEX. This is the default. See also and .
true to prefer short branch encoding. This is the default.
Gets the instructions.
Reset the current set of instructions and labels added to this instance.
Creates a label.
Optional name of the label.
Gets the current label used by this instance.
Use the specified label.
Label to use
Creates an anonymous label that can be referenced by using (backward anonymous label)
and (forward anonymous label).
References the previous anonymous label created by
References the next anonymous label created by a future call to
Add an instruction directly to the flow of instructions.
Add an instruction directly to the flow of instructions.
Add an instruction directly to the flow of instructions.
Operand flags passed.
Add lock prefix before the next instruction.
Add xacquire prefix before the next instruction.
Add xrelease prefix before the next instruction.
Add rep prefix before the next instruction.
Add repe/repz prefix before the next instruction.
Add repe/repz prefix before the next instruction.
Add repne/repnz prefix before the next instruction.
Add repne/repnz prefix before the next instruction.
Add bnd prefix before the next instruction.
Add notrack prefix before the next instruction.
Prefer VEX encoding if the next instruction can be VEX and EVEX encoded
Prefer EVEX encoding if the next instruction can be VEX and EVEX encoded
Adds data
Data
Adds data
Data
Start index
Length in bytes
call selector:offset instruction.
jmp selector:offset instruction.
xlatb instruction.
Generates multibyte NOP instructions
Size in bytes of all nops
Assembles the instructions of this assembler with the specified options.
The code writer.
Base address.
Encoding options.
Tries to assemble the instructions of this assembler with the specified options.
The code writer.
Base address.
Error messages.
The assembler result if successful.
Encoding options.
true if the encoding was successful; false otherwise.
Internal method used to throw an InvalidOperationException if it was not possible to encode an OpCode.
The mnemonic of the instruction
The argument values.
aaa instruction.
AAA
37
8086+
16/32-bit
aad instruction.
AAD imm8
D5 ib
8086+
16/32-bit
aad instruction.
AAD imm8
D5 ib
8086+
16/32-bit
aadd instruction.
AADD m32, r32
NP 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
aadd instruction.
AADD m64, r64
NP o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
aam instruction.
AAM imm8
D4 ib
8086+
16/32-bit
aam instruction.
AAM imm8
D4 ib
8086+
16/32-bit
aand instruction.
AAND m32, r32
66 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
aand instruction.
AAND m64, r64
66 o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
aas instruction.
AAS
3F
8086+
16/32-bit
adc instruction.
ADC r/m8, r8
10 /r
8086+
16/32/64-bit
adc instruction.
ADC r/m8, r8
10 /r
8086+
16/32/64-bit
adc instruction.
ADC r/m16, r16
o16 11 /r
8086+
16/32/64-bit
adc instruction.
ADC r/m16, r16
o16 11 /r
8086+
16/32/64-bit
adc instruction.
ADC r/m32, r32
o32 11 /r
386+
16/32/64-bit
adc instruction.
ADC r/m32, r32
o32 11 /r
386+
16/32/64-bit
adc instruction.
ADC r/m64, r64
o64 11 /r
X64
64-bit
adc instruction.
ADC r/m64, r64
o64 11 /r
X64
64-bit
adc instruction.
ADC r8, r/m8
12 /r
8086+
16/32/64-bit
adc instruction.
ADC r16, r/m16
o16 13 /r
8086+
16/32/64-bit
adc instruction.
ADC r32, r/m32
o32 13 /r
386+
16/32/64-bit
adc instruction.
ADC r64, r/m64
o64 13 /r
X64
64-bit
adc instruction.
ADC AL, imm8
14 ib
8086+
16/32/64-bit
ADC r/m8, imm8
80 /2 ib
8086+
16/32/64-bit
adc instruction.
ADC AX, imm16
o16 15 iw
8086+
16/32/64-bit
ADC r/m16, imm16
o16 81 /2 iw
8086+
16/32/64-bit
ADC r/m16, imm8
o16 83 /2 ib
8086+
16/32/64-bit
adc instruction.
ADC EAX, imm32
o32 15 id
386+
16/32/64-bit
ADC r/m32, imm32
o32 81 /2 id
386+
16/32/64-bit
ADC r/m32, imm8
o32 83 /2 ib
386+
16/32/64-bit
adc instruction.
ADC RAX, imm32
o64 15 id
X64
64-bit
ADC r/m64, imm32
o64 81 /2 id
X64
64-bit
ADC r/m64, imm8
o64 83 /2 ib
X64
64-bit
adc instruction.
ADC r/m64, imm32
o64 81 /2 id
X64
64-bit
ADC r/m64, imm8
o64 83 /2 ib
X64
64-bit
ADC r/m32, imm32
o32 81 /2 id
386+
16/32/64-bit
ADC r/m32, imm8
o32 83 /2 ib
386+
16/32/64-bit
ADC r/m16, imm16
o16 81 /2 iw
8086+
16/32/64-bit
ADC r/m16, imm8
o16 83 /2 ib
8086+
16/32/64-bit
ADC r/m8, imm8
80 /2 ib
8086+
16/32/64-bit
adc instruction.
ADC AL, imm8
14 ib
8086+
16/32/64-bit
ADC r/m8, imm8
80 /2 ib
8086+
16/32/64-bit
adc instruction.
ADC AX, imm16
o16 15 iw
8086+
16/32/64-bit
ADC r/m16, imm16
o16 81 /2 iw
8086+
16/32/64-bit
ADC r/m16, imm8
o16 83 /2 ib
8086+
16/32/64-bit
adc instruction.
ADC EAX, imm32
o32 15 id
386+
16/32/64-bit
ADC r/m32, imm32
o32 81 /2 id
386+
16/32/64-bit
ADC r/m32, imm8
o32 83 /2 ib
386+
16/32/64-bit
adc instruction.
ADC r/m32, imm32
o32 81 /2 id
386+
16/32/64-bit
ADC r/m32, imm8
o32 83 /2 ib
386+
16/32/64-bit
ADC r/m16, imm16
o16 81 /2 iw
8086+
16/32/64-bit
ADC r/m16, imm8
o16 83 /2 ib
8086+
16/32/64-bit
ADC r/m8, imm8
80 /2 ib
8086+
16/32/64-bit
adcx instruction.
ADCX r32, r/m32
66 0F 38 F6 /r
ADX
16/32/64-bit
adcx instruction.
ADCX r64, r/m64
66 o64 0F 38 F6 /r
ADX
64-bit
adcx instruction.
ADCX r32, r/m32
66 0F 38 F6 /r
ADX
16/32/64-bit
adcx instruction.
ADCX r64, r/m64
66 o64 0F 38 F6 /r
ADX
64-bit
add instruction.
ADD r/m8, r8
00 /r
8086+
16/32/64-bit
add instruction.
ADD r/m8, r8
00 /r
8086+
16/32/64-bit
add instruction.
ADD r/m16, r16
o16 01 /r
8086+
16/32/64-bit
add instruction.
ADD r/m16, r16
o16 01 /r
8086+
16/32/64-bit
add instruction.
ADD r/m32, r32
o32 01 /r
386+
16/32/64-bit
add instruction.
ADD r/m32, r32
o32 01 /r
386+
16/32/64-bit
add instruction.
ADD r/m64, r64
o64 01 /r
X64
64-bit
add instruction.
ADD r/m64, r64
o64 01 /r
X64
64-bit
add instruction.
ADD r8, r/m8
02 /r
8086+
16/32/64-bit
add instruction.
ADD r16, r/m16
o16 03 /r
8086+
16/32/64-bit
add instruction.
ADD r32, r/m32
o32 03 /r
386+
16/32/64-bit
add instruction.
ADD r64, r/m64
o64 03 /r
X64
64-bit
add instruction.
ADD AL, imm8
04 ib
8086+
16/32/64-bit
ADD r/m8, imm8
80 /0 ib
8086+
16/32/64-bit
add instruction.
ADD AX, imm16
o16 05 iw
8086+
16/32/64-bit
ADD r/m16, imm16
o16 81 /0 iw
8086+
16/32/64-bit
ADD r/m16, imm8
o16 83 /0 ib
8086+
16/32/64-bit
add instruction.
ADD EAX, imm32
o32 05 id
386+
16/32/64-bit
ADD r/m32, imm32
o32 81 /0 id
386+
16/32/64-bit
ADD r/m32, imm8
o32 83 /0 ib
386+
16/32/64-bit
add instruction.
ADD RAX, imm32
o64 05 id
X64
64-bit
ADD r/m64, imm32
o64 81 /0 id
X64
64-bit
ADD r/m64, imm8
o64 83 /0 ib
X64
64-bit
add instruction.
ADD r/m64, imm32
o64 81 /0 id
X64
64-bit
ADD r/m64, imm8
o64 83 /0 ib
X64
64-bit
ADD r/m32, imm32
o32 81 /0 id
386+
16/32/64-bit
ADD r/m32, imm8
o32 83 /0 ib
386+
16/32/64-bit
ADD r/m16, imm16
o16 81 /0 iw
8086+
16/32/64-bit
ADD r/m16, imm8
o16 83 /0 ib
8086+
16/32/64-bit
ADD r/m8, imm8
80 /0 ib
8086+
16/32/64-bit
add instruction.
ADD AL, imm8
04 ib
8086+
16/32/64-bit
ADD r/m8, imm8
80 /0 ib
8086+
16/32/64-bit
add instruction.
ADD AX, imm16
o16 05 iw
8086+
16/32/64-bit
ADD r/m16, imm16
o16 81 /0 iw
8086+
16/32/64-bit
ADD r/m16, imm8
o16 83 /0 ib
8086+
16/32/64-bit
add instruction.
ADD EAX, imm32
o32 05 id
386+
16/32/64-bit
ADD r/m32, imm32
o32 81 /0 id
386+
16/32/64-bit
ADD r/m32, imm8
o32 83 /0 ib
386+
16/32/64-bit
add instruction.
ADD r/m32, imm32
o32 81 /0 id
386+
16/32/64-bit
ADD r/m32, imm8
o32 83 /0 ib
386+
16/32/64-bit
ADD r/m16, imm16
o16 81 /0 iw
8086+
16/32/64-bit
ADD r/m16, imm8
o16 83 /0 ib
8086+
16/32/64-bit
ADD r/m8, imm8
80 /0 ib
8086+
16/32/64-bit
addpd instruction.
ADDPD xmm1, xmm2/m128
66 0F 58 /r
SSE2
16/32/64-bit
addpd instruction.
ADDPD xmm1, xmm2/m128
66 0F 58 /r
SSE2
16/32/64-bit
addps instruction.
ADDPS xmm1, xmm2/m128
NP 0F 58 /r
SSE
16/32/64-bit
addps instruction.
ADDPS xmm1, xmm2/m128
NP 0F 58 /r
SSE
16/32/64-bit
addsd instruction.
ADDSD xmm1, xmm2/m64
F2 0F 58 /r
SSE2
16/32/64-bit
addsd instruction.
ADDSD xmm1, xmm2/m64
F2 0F 58 /r
SSE2
16/32/64-bit
addss instruction.
ADDSS xmm1, xmm2/m32
F3 0F 58 /r
SSE
16/32/64-bit
addss instruction.
ADDSS xmm1, xmm2/m32
F3 0F 58 /r
SSE
16/32/64-bit
addsubpd instruction.
ADDSUBPD xmm1, xmm2/m128
66 0F D0 /r
SSE3
16/32/64-bit
addsubpd instruction.
ADDSUBPD xmm1, xmm2/m128
66 0F D0 /r
SSE3
16/32/64-bit
addsubps instruction.
ADDSUBPS xmm1, xmm2/m128
F2 0F D0 /r
SSE3
16/32/64-bit
addsubps instruction.
ADDSUBPS xmm1, xmm2/m128
F2 0F D0 /r
SSE3
16/32/64-bit
adox instruction.
ADOX r32, r/m32
F3 0F 38 F6 /r
ADX
16/32/64-bit
adox instruction.
ADOX r64, r/m64
F3 o64 0F 38 F6 /r
ADX
64-bit
adox instruction.
ADOX r32, r/m32
F3 0F 38 F6 /r
ADX
16/32/64-bit
adox instruction.
ADOX r64, r/m64
F3 o64 0F 38 F6 /r
ADX
64-bit
aesdec instruction.
AESDEC xmm1, xmm2/m128
66 0F 38 DE /r
AES
16/32/64-bit
aesdec instruction.
AESDEC xmm1, xmm2/m128
66 0F 38 DE /r
AES
16/32/64-bit
aesdec128kl instruction.
AESDEC128KL xmm, m384
F3 0F 38 DD !(11):rrr:bbb
AESKLE
16/32/64-bit
aesdec256kl instruction.
AESDEC256KL xmm, m512
F3 0F 38 DF !(11):rrr:bbb
AESKLE
16/32/64-bit
aesdeclast instruction.
AESDECLAST xmm1, xmm2/m128
66 0F 38 DF /r
AES
16/32/64-bit
aesdeclast instruction.
AESDECLAST xmm1, xmm2/m128
66 0F 38 DF /r
AES
16/32/64-bit
aesdecwide128kl instruction.
AESDECWIDE128KL m384, <XMM0-7>
F3 0F 38 D8 !(11):001:bbb
AESKLE and WIDE_KL
16/32/64-bit
aesdecwide256kl instruction.
AESDECWIDE256KL m512, <XMM0-7>
F3 0F 38 D8 !(11):011:bbb
AESKLE and WIDE_KL
16/32/64-bit
aesenc instruction.
AESENC xmm1, xmm2/m128
66 0F 38 DC /r
AES
16/32/64-bit
aesenc instruction.
AESENC xmm1, xmm2/m128
66 0F 38 DC /r
AES
16/32/64-bit
aesenc128kl instruction.
AESENC128KL xmm, m384
F3 0F 38 DC !(11):rrr:bbb
AESKLE
16/32/64-bit
aesenc256kl instruction.
AESENC256KL xmm, m512
F3 0F 38 DE !(11):rrr:bbb
AESKLE
16/32/64-bit
aesenclast instruction.
AESENCLAST xmm1, xmm2/m128
66 0F 38 DD /r
AES
16/32/64-bit
aesenclast instruction.
AESENCLAST xmm1, xmm2/m128
66 0F 38 DD /r
AES
16/32/64-bit
aesencwide128kl instruction.
AESENCWIDE128KL m384, <XMM0-7>
F3 0F 38 D8 !(11):000:bbb
AESKLE and WIDE_KL
16/32/64-bit
aesencwide256kl instruction.
AESENCWIDE256KL m512, <XMM0-7>
F3 0F 38 D8 !(11):010:bbb
AESKLE and WIDE_KL
16/32/64-bit
aesimc instruction.
AESIMC xmm1, xmm2/m128
66 0F 38 DB /r
AES
16/32/64-bit
aesimc instruction.
AESIMC xmm1, xmm2/m128
66 0F 38 DB /r
AES
16/32/64-bit
aeskeygenassist instruction.
AESKEYGENASSIST xmm1, xmm2/m128, imm8
66 0F 3A DF /r ib
AES
16/32/64-bit
aeskeygenassist instruction.
AESKEYGENASSIST xmm1, xmm2/m128, imm8
66 0F 3A DF /r ib
AES
16/32/64-bit
aeskeygenassist instruction.
AESKEYGENASSIST xmm1, xmm2/m128, imm8
66 0F 3A DF /r ib
AES
16/32/64-bit
aeskeygenassist instruction.
AESKEYGENASSIST xmm1, xmm2/m128, imm8
66 0F 3A DF /r ib
AES
16/32/64-bit
altinst instruction.
ALTINST
0F 3F
Centaur AIS
16/32-bit
and instruction.
AND r/m8, r8
20 /r
8086+
16/32/64-bit
and instruction.
AND r/m8, r8
20 /r
8086+
16/32/64-bit
and instruction.
AND r/m16, r16
o16 21 /r
8086+
16/32/64-bit
and instruction.
AND r/m16, r16
o16 21 /r
8086+
16/32/64-bit
and instruction.
AND r/m32, r32
o32 21 /r
386+
16/32/64-bit
and instruction.
AND r/m32, r32
o32 21 /r
386+
16/32/64-bit
and instruction.
AND r/m64, r64
o64 21 /r
X64
64-bit
and instruction.
AND r/m64, r64
o64 21 /r
X64
64-bit
and instruction.
AND r8, r/m8
22 /r
8086+
16/32/64-bit
and instruction.
AND r16, r/m16
o16 23 /r
8086+
16/32/64-bit
and instruction.
AND r32, r/m32
o32 23 /r
386+
16/32/64-bit
and instruction.
AND r64, r/m64
o64 23 /r
X64
64-bit
and instruction.
AND AL, imm8
24 ib
8086+
16/32/64-bit
AND r/m8, imm8
80 /4 ib
8086+
16/32/64-bit
and instruction.
AND AX, imm16
o16 25 iw
8086+
16/32/64-bit
AND r/m16, imm16
o16 81 /4 iw
8086+
16/32/64-bit
AND r/m16, imm8
o16 83 /4 ib
8086+
16/32/64-bit
and instruction.
AND EAX, imm32
o32 25 id
386+
16/32/64-bit
AND r/m32, imm32
o32 81 /4 id
386+
16/32/64-bit
AND r/m32, imm8
o32 83 /4 ib
386+
16/32/64-bit
and instruction.
AND RAX, imm32
o64 25 id
X64
64-bit
AND r/m64, imm32
o64 81 /4 id
X64
64-bit
AND r/m64, imm8
o64 83 /4 ib
X64
64-bit
and instruction.
AND r/m64, imm32
o64 81 /4 id
X64
64-bit
AND r/m64, imm8
o64 83 /4 ib
X64
64-bit
AND r/m32, imm32
o32 81 /4 id
386+
16/32/64-bit
AND r/m32, imm8
o32 83 /4 ib
386+
16/32/64-bit
AND r/m16, imm16
o16 81 /4 iw
8086+
16/32/64-bit
AND r/m16, imm8
o16 83 /4 ib
8086+
16/32/64-bit
AND r/m8, imm8
80 /4 ib
8086+
16/32/64-bit
and instruction.
AND AL, imm8
24 ib
8086+
16/32/64-bit
AND r/m8, imm8
80 /4 ib
8086+
16/32/64-bit
and instruction.
AND AX, imm16
o16 25 iw
8086+
16/32/64-bit
AND r/m16, imm16
o16 81 /4 iw
8086+
16/32/64-bit
AND r/m16, imm8
o16 83 /4 ib
8086+
16/32/64-bit
and instruction.
AND EAX, imm32
o32 25 id
386+
16/32/64-bit
AND r/m32, imm32
o32 81 /4 id
386+
16/32/64-bit
AND r/m32, imm8
o32 83 /4 ib
386+
16/32/64-bit
and instruction.
AND r/m32, imm32
o32 81 /4 id
386+
16/32/64-bit
AND r/m32, imm8
o32 83 /4 ib
386+
16/32/64-bit
AND r/m16, imm16
o16 81 /4 iw
8086+
16/32/64-bit
AND r/m16, imm8
o16 83 /4 ib
8086+
16/32/64-bit
AND r/m8, imm8
80 /4 ib
8086+
16/32/64-bit
andn instruction.
ANDN r32a, r32b, r/m32
VEX.LZ.0F38.W0 F2 /r
BMI1
16/32/64-bit
andn instruction.
ANDN r64a, r64b, r/m64
VEX.LZ.0F38.W1 F2 /r
BMI1
64-bit
andn instruction.
ANDN r32a, r32b, r/m32
VEX.LZ.0F38.W0 F2 /r
BMI1
16/32/64-bit
andn instruction.
ANDN r64a, r64b, r/m64
VEX.LZ.0F38.W1 F2 /r
BMI1
64-bit
andnpd instruction.
ANDNPD xmm1, xmm2/m128
66 0F 55 /r
SSE2
16/32/64-bit
andnpd instruction.
ANDNPD xmm1, xmm2/m128
66 0F 55 /r
SSE2
16/32/64-bit
andnps instruction.
ANDNPS xmm1, xmm2/m128
NP 0F 55 /r
SSE
16/32/64-bit
andnps instruction.
ANDNPS xmm1, xmm2/m128
NP 0F 55 /r
SSE
16/32/64-bit
andpd instruction.
ANDPD xmm1, xmm2/m128
66 0F 54 /r
SSE2
16/32/64-bit
andpd instruction.
ANDPD xmm1, xmm2/m128
66 0F 54 /r
SSE2
16/32/64-bit
andps instruction.
ANDPS xmm1, xmm2/m128
NP 0F 54 /r
SSE
16/32/64-bit
andps instruction.
ANDPS xmm1, xmm2/m128
NP 0F 54 /r
SSE
16/32/64-bit
aor instruction.
AOR m32, r32
F2 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
aor instruction.
AOR m64, r64
F2 o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
arpl instruction.
ARPL r/m16, r16
o16 63 /r
286+
16/32-bit
arpl instruction.
ARPL r/m16, r16
o16 63 /r
286+
16/32-bit
arpl instruction.
ARPL r32/m16, r32
o32 63 /r
386+
16/32-bit
arpl instruction.
ARPL r32/m16, r32
o32 63 /r
386+
16/32-bit
axor instruction.
AXOR m32, r32
F3 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
axor instruction.
AXOR m64, r64
F3 o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
bb0_reset instruction.
BB0_RESET
0F 3A
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
bb1_reset instruction.
BB1_RESET
0F 3B
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
bextr instruction.
BEXTR r32a, r/m32, r32b
VEX.LZ.0F38.W0 F7 /r
BMI1
16/32/64-bit
bextr instruction.
BEXTR r32a, r/m32, r32b
VEX.LZ.0F38.W0 F7 /r
BMI1
16/32/64-bit
bextr instruction.
BEXTR r64a, r/m64, r64b
VEX.LZ.0F38.W1 F7 /r
BMI1
64-bit
bextr instruction.
BEXTR r64a, r/m64, r64b
VEX.LZ.0F38.W1 F7 /r
BMI1
64-bit
bextr instruction.
BEXTR r32, r/m32, imm32
XOP.L0.XA.W0 10 /r id
TBM
16/32/64-bit
bextr instruction.
BEXTR r64, r/m64, imm32
XOP.L0.XA.W1 10 /r id
TBM
64-bit
bextr instruction.
BEXTR r32, r/m32, imm32
XOP.L0.XA.W0 10 /r id
TBM
16/32/64-bit
bextr instruction.
BEXTR r64, r/m64, imm32
XOP.L0.XA.W1 10 /r id
TBM
64-bit
bextr instruction.
BEXTR r32, r/m32, imm32
XOP.L0.XA.W0 10 /r id
TBM
16/32/64-bit
bextr instruction.
BEXTR r64, r/m64, imm32
XOP.L0.XA.W1 10 /r id
TBM
64-bit
bextr instruction.
BEXTR r32, r/m32, imm32
XOP.L0.XA.W0 10 /r id
TBM
16/32/64-bit
bextr instruction.
BEXTR r64, r/m64, imm32
XOP.L0.XA.W1 10 /r id
TBM
64-bit
blcfill instruction.
BLCFILL r32, r/m32
XOP.L0.X9.W0 01 /1
TBM
16/32/64-bit
blcfill instruction.
BLCFILL r64, r/m64
XOP.L0.X9.W1 01 /1
TBM
64-bit
blcfill instruction.
BLCFILL r32, r/m32
XOP.L0.X9.W0 01 /1
TBM
16/32/64-bit
blcfill instruction.
BLCFILL r64, r/m64
XOP.L0.X9.W1 01 /1
TBM
64-bit
blci instruction.
BLCI r32, r/m32
XOP.L0.X9.W0 02 /6
TBM
16/32/64-bit
blci instruction.
BLCI r64, r/m64
XOP.L0.X9.W1 02 /6
TBM
64-bit
blci instruction.
BLCI r32, r/m32
XOP.L0.X9.W0 02 /6
TBM
16/32/64-bit
blci instruction.
BLCI r64, r/m64
XOP.L0.X9.W1 02 /6
TBM
64-bit
blcic instruction.
BLCIC r32, r/m32
XOP.L0.X9.W0 01 /5
TBM
16/32/64-bit
blcic instruction.
BLCIC r64, r/m64
XOP.L0.X9.W1 01 /5
TBM
64-bit
blcic instruction.
BLCIC r32, r/m32
XOP.L0.X9.W0 01 /5
TBM
16/32/64-bit
blcic instruction.
BLCIC r64, r/m64
XOP.L0.X9.W1 01 /5
TBM
64-bit
blcmsk instruction.
BLCMSK r32, r/m32
XOP.L0.X9.W0 02 /1
TBM
16/32/64-bit
blcmsk instruction.
BLCMSK r64, r/m64
XOP.L0.X9.W1 02 /1
TBM
64-bit
blcmsk instruction.
BLCMSK r32, r/m32
XOP.L0.X9.W0 02 /1
TBM
16/32/64-bit
blcmsk instruction.
BLCMSK r64, r/m64
XOP.L0.X9.W1 02 /1
TBM
64-bit
blcs instruction.
BLCS r32, r/m32
XOP.L0.X9.W0 01 /3
TBM
16/32/64-bit
blcs instruction.
BLCS r64, r/m64
XOP.L0.X9.W1 01 /3
TBM
64-bit
blcs instruction.
BLCS r32, r/m32
XOP.L0.X9.W0 01 /3
TBM
16/32/64-bit
blcs instruction.
BLCS r64, r/m64
XOP.L0.X9.W1 01 /3
TBM
64-bit
blendpd instruction.
BLENDPD xmm1, xmm2/m128, imm8
66 0F 3A 0D /r ib
SSE4.1
16/32/64-bit
blendpd instruction.
BLENDPD xmm1, xmm2/m128, imm8
66 0F 3A 0D /r ib
SSE4.1
16/32/64-bit
blendpd instruction.
BLENDPD xmm1, xmm2/m128, imm8
66 0F 3A 0D /r ib
SSE4.1
16/32/64-bit
blendpd instruction.
BLENDPD xmm1, xmm2/m128, imm8
66 0F 3A 0D /r ib
SSE4.1
16/32/64-bit
blendps instruction.
BLENDPS xmm1, xmm2/m128, imm8
66 0F 3A 0C /r ib
SSE4.1
16/32/64-bit
blendps instruction.
BLENDPS xmm1, xmm2/m128, imm8
66 0F 3A 0C /r ib
SSE4.1
16/32/64-bit
blendps instruction.
BLENDPS xmm1, xmm2/m128, imm8
66 0F 3A 0C /r ib
SSE4.1
16/32/64-bit
blendps instruction.
BLENDPS xmm1, xmm2/m128, imm8
66 0F 3A 0C /r ib
SSE4.1
16/32/64-bit
blendvpd instruction.
BLENDVPD xmm1, xmm2/m128, <XMM0>
66 0F 38 15 /r
SSE4.1
16/32/64-bit
blendvpd instruction.
BLENDVPD xmm1, xmm2/m128, <XMM0>
66 0F 38 15 /r
SSE4.1
16/32/64-bit
blendvps instruction.
BLENDVPS xmm1, xmm2/m128, <XMM0>
66 0F 38 14 /r
SSE4.1
16/32/64-bit
blendvps instruction.
BLENDVPS xmm1, xmm2/m128, <XMM0>
66 0F 38 14 /r
SSE4.1
16/32/64-bit
blsfill instruction.
BLSFILL r32, r/m32
XOP.L0.X9.W0 01 /2
TBM
16/32/64-bit
blsfill instruction.
BLSFILL r64, r/m64
XOP.L0.X9.W1 01 /2
TBM
64-bit
blsfill instruction.
BLSFILL r32, r/m32
XOP.L0.X9.W0 01 /2
TBM
16/32/64-bit
blsfill instruction.
BLSFILL r64, r/m64
XOP.L0.X9.W1 01 /2
TBM
64-bit
blsi instruction.
BLSI r32, r/m32
VEX.LZ.0F38.W0 F3 /3
BMI1
16/32/64-bit
blsi instruction.
BLSI r64, r/m64
VEX.LZ.0F38.W1 F3 /3
BMI1
64-bit
blsi instruction.
BLSI r32, r/m32
VEX.LZ.0F38.W0 F3 /3
BMI1
16/32/64-bit
blsi instruction.
BLSI r64, r/m64
VEX.LZ.0F38.W1 F3 /3
BMI1
64-bit
blsic instruction.
BLSIC r32, r/m32
XOP.L0.X9.W0 01 /6
TBM
16/32/64-bit
blsic instruction.
BLSIC r64, r/m64
XOP.L0.X9.W1 01 /6
TBM
64-bit
blsic instruction.
BLSIC r32, r/m32
XOP.L0.X9.W0 01 /6
TBM
16/32/64-bit
blsic instruction.
BLSIC r64, r/m64
XOP.L0.X9.W1 01 /6
TBM
64-bit
blsmsk instruction.
BLSMSK r32, r/m32
VEX.LZ.0F38.W0 F3 /2
BMI1
16/32/64-bit
blsmsk instruction.
BLSMSK r64, r/m64
VEX.LZ.0F38.W1 F3 /2
BMI1
64-bit
blsmsk instruction.
BLSMSK r32, r/m32
VEX.LZ.0F38.W0 F3 /2
BMI1
16/32/64-bit
blsmsk instruction.
BLSMSK r64, r/m64
VEX.LZ.0F38.W1 F3 /2
BMI1
64-bit
blsr instruction.
BLSR r32, r/m32
VEX.LZ.0F38.W0 F3 /1
BMI1
16/32/64-bit
blsr instruction.
BLSR r64, r/m64
VEX.LZ.0F38.W1 F3 /1
BMI1
64-bit
blsr instruction.
BLSR r32, r/m32
VEX.LZ.0F38.W0 F3 /1
BMI1
16/32/64-bit
blsr instruction.
BLSR r64, r/m64
VEX.LZ.0F38.W1 F3 /1
BMI1
64-bit
bndcl instruction.
BNDCL bnd, r/m32
F3 0F 1A /r
MPX
16/32-bit
bndcl instruction.
BNDCL bnd, r/m64
F3 0F 1A /r
MPX
64-bit
bndcl instruction.
BNDCL bnd, r/m64
F3 0F 1A /r
MPX
64-bit
BNDCL bnd, r/m32
F3 0F 1A /r
MPX
16/32-bit
bndcn instruction.
BNDCN bnd, r/m32
F2 0F 1B /r
MPX
16/32-bit
bndcn instruction.
BNDCN bnd, r/m64
F2 0F 1B /r
MPX
64-bit
bndcn instruction.
BNDCN bnd, r/m64
F2 0F 1B /r
MPX
64-bit
BNDCN bnd, r/m32
F2 0F 1B /r
MPX
16/32-bit
bndcu instruction.
BNDCU bnd, r/m32
F2 0F 1A /r
MPX
16/32-bit
bndcu instruction.
BNDCU bnd, r/m64
F2 0F 1A /r
MPX
64-bit
bndcu instruction.
BNDCU bnd, r/m64
F2 0F 1A /r
MPX
64-bit
BNDCU bnd, r/m32
F2 0F 1A /r
MPX
16/32-bit
bndldx instruction.
BNDLDX bnd, mib
NP 0F 1A /r
MPX
16/32/64-bit
bndmk instruction.
BNDMK bnd, m64
F3 0F 1B /r
MPX
64-bit
BNDMK bnd, m32
F3 0F 1B /r
MPX
16/32-bit
bndmov instruction.
BNDMOV bnd1, bnd2/m128
66 0F 1A /r
MPX
64-bit
BNDMOV bnd1, bnd2/m64
66 0F 1A /r
MPX
16/32-bit
bndmov instruction.
BNDMOV bnd1/m128, bnd2
66 0F 1B /r
MPX
64-bit
BNDMOV bnd1/m64, bnd2
66 0F 1B /r
MPX
16/32-bit
bndmov instruction.
BNDMOV bnd1, bnd2/m128
66 0F 1A /r
MPX
64-bit
BNDMOV bnd1, bnd2/m64
66 0F 1A /r
MPX
16/32-bit
bndstx instruction.
BNDSTX mib, bnd
NP 0F 1B /r
MPX
16/32/64-bit
bound instruction.
BOUND r16, m16&16
o16 62 /r
186+
16/32-bit
bound instruction.
BOUND r32, m32&32
o32 62 /r
386+
16/32-bit
bsf instruction.
BSF r16, r/m16
o16 0F BC /r
386+
16/32/64-bit
bsf instruction.
BSF r32, r/m32
o32 0F BC /r
386+
16/32/64-bit
bsf instruction.
BSF r64, r/m64
o64 0F BC /r
X64
64-bit
bsf instruction.
BSF r16, r/m16
o16 0F BC /r
386+
16/32/64-bit
bsf instruction.
BSF r32, r/m32
o32 0F BC /r
386+
16/32/64-bit
bsf instruction.
BSF r64, r/m64
o64 0F BC /r
X64
64-bit
bsr instruction.
BSR r16, r/m16
o16 0F BD /r
386+
16/32/64-bit
bsr instruction.
BSR r32, r/m32
o32 0F BD /r
386+
16/32/64-bit
bsr instruction.
BSR r64, r/m64
o64 0F BD /r
X64
64-bit
bsr instruction.
BSR r16, r/m16
o16 0F BD /r
386+
16/32/64-bit
bsr instruction.
BSR r32, r/m32
o32 0F BD /r
386+
16/32/64-bit
bsr instruction.
BSR r64, r/m64
o64 0F BD /r
X64
64-bit
bswap instruction.
BSWAP r16
o16 0F C8+rw
486+
16/32/64-bit
bswap instruction.
BSWAP r32
o32 0F C8+rd
486+
16/32/64-bit
bswap instruction.
BSWAP r64
o64 0F C8+ro
X64
64-bit
bt instruction.
BT r/m16, r16
o16 0F A3 /r
386+
16/32/64-bit
bt instruction.
BT r/m16, r16
o16 0F A3 /r
386+
16/32/64-bit
bt instruction.
BT r/m32, r32
o32 0F A3 /r
386+
16/32/64-bit
bt instruction.
BT r/m32, r32
o32 0F A3 /r
386+
16/32/64-bit
bt instruction.
BT r/m64, r64
o64 0F A3 /r
X64
64-bit
bt instruction.
BT r/m64, r64
o64 0F A3 /r
X64
64-bit
bt instruction.
BT r/m16, imm8
o16 0F BA /4 ib
386+
16/32/64-bit
bt instruction.
BT r/m32, imm8
o32 0F BA /4 ib
386+
16/32/64-bit
bt instruction.
BT r/m64, imm8
o64 0F BA /4 ib
X64
64-bit
bt instruction.
BT r/m64, imm8
o64 0F BA /4 ib
X64
64-bit
BT r/m32, imm8
o32 0F BA /4 ib
386+
16/32/64-bit
BT r/m16, imm8
o16 0F BA /4 ib
386+
16/32/64-bit
bt instruction.
BT r/m16, imm8
o16 0F BA /4 ib
386+
16/32/64-bit
bt instruction.
BT r/m32, imm8
o32 0F BA /4 ib
386+
16/32/64-bit
bt instruction.
BT r/m64, imm8
o64 0F BA /4 ib
X64
64-bit
bt instruction.
BT r/m64, imm8
o64 0F BA /4 ib
X64
64-bit
BT r/m32, imm8
o32 0F BA /4 ib
386+
16/32/64-bit
BT r/m16, imm8
o16 0F BA /4 ib
386+
16/32/64-bit
btc instruction.
BTC r/m16, r16
o16 0F BB /r
386+
16/32/64-bit
btc instruction.
BTC r/m16, r16
o16 0F BB /r
386+
16/32/64-bit
btc instruction.
BTC r/m32, r32
o32 0F BB /r
386+
16/32/64-bit
btc instruction.
BTC r/m32, r32
o32 0F BB /r
386+
16/32/64-bit
btc instruction.
BTC r/m64, r64
o64 0F BB /r
X64
64-bit
btc instruction.
BTC r/m64, r64
o64 0F BB /r
X64
64-bit
btc instruction.
BTC r/m16, imm8
o16 0F BA /7 ib
386+
16/32/64-bit
btc instruction.
BTC r/m32, imm8
o32 0F BA /7 ib
386+
16/32/64-bit
btc instruction.
BTC r/m64, imm8
o64 0F BA /7 ib
X64
64-bit
btc instruction.
BTC r/m64, imm8
o64 0F BA /7 ib
X64
64-bit
BTC r/m32, imm8
o32 0F BA /7 ib
386+
16/32/64-bit
BTC r/m16, imm8
o16 0F BA /7 ib
386+
16/32/64-bit
btc instruction.
BTC r/m16, imm8
o16 0F BA /7 ib
386+
16/32/64-bit
btc instruction.
BTC r/m32, imm8
o32 0F BA /7 ib
386+
16/32/64-bit
btc instruction.
BTC r/m64, imm8
o64 0F BA /7 ib
X64
64-bit
btc instruction.
BTC r/m64, imm8
o64 0F BA /7 ib
X64
64-bit
BTC r/m32, imm8
o32 0F BA /7 ib
386+
16/32/64-bit
BTC r/m16, imm8
o16 0F BA /7 ib
386+
16/32/64-bit
btr instruction.
BTR r/m16, r16
o16 0F B3 /r
386+
16/32/64-bit
btr instruction.
BTR r/m16, r16
o16 0F B3 /r
386+
16/32/64-bit
btr instruction.
BTR r/m32, r32
o32 0F B3 /r
386+
16/32/64-bit
btr instruction.
BTR r/m32, r32
o32 0F B3 /r
386+
16/32/64-bit
btr instruction.
BTR r/m64, r64
o64 0F B3 /r
X64
64-bit
btr instruction.
BTR r/m64, r64
o64 0F B3 /r
X64
64-bit
btr instruction.
BTR r/m16, imm8
o16 0F BA /6 ib
386+
16/32/64-bit
btr instruction.
BTR r/m32, imm8
o32 0F BA /6 ib
386+
16/32/64-bit
btr instruction.
BTR r/m64, imm8
o64 0F BA /6 ib
X64
64-bit
btr instruction.
BTR r/m64, imm8
o64 0F BA /6 ib
X64
64-bit
BTR r/m32, imm8
o32 0F BA /6 ib
386+
16/32/64-bit
BTR r/m16, imm8
o16 0F BA /6 ib
386+
16/32/64-bit
btr instruction.
BTR r/m16, imm8
o16 0F BA /6 ib
386+
16/32/64-bit
btr instruction.
BTR r/m32, imm8
o32 0F BA /6 ib
386+
16/32/64-bit
btr instruction.
BTR r/m64, imm8
o64 0F BA /6 ib
X64
64-bit
btr instruction.
BTR r/m64, imm8
o64 0F BA /6 ib
X64
64-bit
BTR r/m32, imm8
o32 0F BA /6 ib
386+
16/32/64-bit
BTR r/m16, imm8
o16 0F BA /6 ib
386+
16/32/64-bit
bts instruction.
BTS r/m16, r16
o16 0F AB /r
386+
16/32/64-bit
bts instruction.
BTS r/m16, r16
o16 0F AB /r
386+
16/32/64-bit
bts instruction.
BTS r/m32, r32
o32 0F AB /r
386+
16/32/64-bit
bts instruction.
BTS r/m32, r32
o32 0F AB /r
386+
16/32/64-bit
bts instruction.
BTS r/m64, r64
o64 0F AB /r
X64
64-bit
bts instruction.
BTS r/m64, r64
o64 0F AB /r
X64
64-bit
bts instruction.
BTS r/m16, imm8
o16 0F BA /5 ib
386+
16/32/64-bit
bts instruction.
BTS r/m32, imm8
o32 0F BA /5 ib
386+
16/32/64-bit
bts instruction.
BTS r/m64, imm8
o64 0F BA /5 ib
X64
64-bit
bts instruction.
BTS r/m64, imm8
o64 0F BA /5 ib
X64
64-bit
BTS r/m32, imm8
o32 0F BA /5 ib
386+
16/32/64-bit
BTS r/m16, imm8
o16 0F BA /5 ib
386+
16/32/64-bit
bts instruction.
BTS r/m16, imm8
o16 0F BA /5 ib
386+
16/32/64-bit
bts instruction.
BTS r/m32, imm8
o32 0F BA /5 ib
386+
16/32/64-bit
bts instruction.
BTS r/m64, imm8
o64 0F BA /5 ib
X64
64-bit
bts instruction.
BTS r/m64, imm8
o64 0F BA /5 ib
X64
64-bit
BTS r/m32, imm8
o32 0F BA /5 ib
386+
16/32/64-bit
BTS r/m16, imm8
o16 0F BA /5 ib
386+
16/32/64-bit
bzhi instruction.
BZHI r32a, r/m32, r32b
VEX.LZ.0F38.W0 F5 /r
BMI2
16/32/64-bit
bzhi instruction.
BZHI r32a, r/m32, r32b
VEX.LZ.0F38.W0 F5 /r
BMI2
16/32/64-bit
bzhi instruction.
BZHI r64a, r/m64, r64b
VEX.LZ.0F38.W1 F5 /r
BMI2
64-bit
bzhi instruction.
BZHI r64a, r/m64, r64b
VEX.LZ.0F38.W1 F5 /r
BMI2
64-bit
call instruction.
CALL r/m16
o16 FF /2
8086+
16/32/64-bit
call instruction.
CALL r/m32
o32 FF /2
386+
16/32-bit
call instruction.
CALL r/m64
o64 FF /2
X64
64-bit
call instruction.
CALL m16:64
o64 FF /3
X64
64-bit
CALL r/m64
o64 FF /2
X64
64-bit
CALL m16:32
o32 FF /3
386+
16/32/64-bit
CALL r/m32
o32 FF /2
386+
16/32-bit
CALL m16:16
o16 FF /3
8086+
16/32/64-bit
CALL r/m16
o16 FF /2
8086+
16/32/64-bit
call instruction.
CALL rel32
o64 E8 cd
X64
64-bit
CALL rel32
o32 E8 cd
386+
16/32-bit
CALL rel16
o16 E8 cw
8086+
16/32/64-bit
call instruction.
CALL rel32
o64 E8 cd
X64
64-bit
CALL rel32
o32 E8 cd
386+
16/32-bit
CALL rel16
o16 E8 cw
8086+
16/32/64-bit
cbw instruction.
CBW
o16 98
8086+
16/32/64-bit
ccs_encrypt instruction.
CCS_ENCRYPT
a64 F3 0F A7 F0
PADLOCK_GMI
64-bit
CCS_ENCRYPT
a32 F3 0F A7 F0
PADLOCK_GMI
16/32/64-bit
CCS_ENCRYPT
a16 F3 0F A7 F0
PADLOCK_GMI
16/32-bit
ccs_hash instruction.
CCS_HASH
a64 F3 0F A6 E8
PADLOCK_GMI
64-bit
CCS_HASH
a32 F3 0F A6 E8
PADLOCK_GMI
16/32/64-bit
CCS_HASH
a16 F3 0F A6 E8
PADLOCK_GMI
16/32-bit
cdq instruction.
CDQ
o32 99
386+
16/32/64-bit
cdqe instruction.
CDQE
o64 98
X64
64-bit
cl1invmb instruction.
CL1INVMB
0F 0A
CL1INVMB
16/32-bit
clac instruction.
CLAC
NP 0F 01 CA
SMAP
16/32/64-bit
clc instruction.
CLC
F8
8086+
16/32/64-bit
cld instruction.
CLD
FC
8086+
16/32/64-bit
cldemote instruction.
CLDEMOTE m8
NP 0F 1C /0
CLDEMOTE
16/32/64-bit
clflush instruction.
CLFLUSH m8
NP 0F AE /7
CLFSH
16/32/64-bit
clflushopt instruction.
CLFLUSHOPT m8
66 0F AE /7
CLFLUSHOPT
16/32/64-bit
clgi instruction.
CLGI
0F 01 DD
SVM
16/32/64-bit
cli instruction.
CLI
FA
8086+
16/32/64-bit
clrssbsy instruction.
CLRSSBSY m64
F3 0F AE /6
CET_SS
16/32/64-bit
clts instruction.
CLTS
0F 06
286+
16/32/64-bit
clui instruction.
CLUI
F3 0F 01 EE
UINTR
64-bit
clwb instruction.
CLWB m8
66 0F AE /6
CLWB
16/32/64-bit
clzero instruction.
CLZERO
a64 0F 01 FC
CLZERO
64-bit
CLZERO
a32 0F 01 FC
CLZERO
16/32/64-bit
CLZERO
a16 0F 01 FC
CLZERO
16/32-bit
cmc instruction.
CMC
F5
8086+
16/32/64-bit
cmova instruction.
CMOVA r16, r/m16
o16 0F 47 /r
CMOV
16/32/64-bit
cmova instruction.
CMOVA r32, r/m32
o32 0F 47 /r
CMOV
16/32/64-bit
cmova instruction.
CMOVA r64, r/m64
o64 0F 47 /r
CMOV
64-bit
cmova instruction.
CMOVA r16, r/m16
o16 0F 47 /r
CMOV
16/32/64-bit
cmova instruction.
CMOVA r32, r/m32
o32 0F 47 /r
CMOV
16/32/64-bit
cmova instruction.
CMOVA r64, r/m64
o64 0F 47 /r
CMOV
64-bit
cmovae instruction.
CMOVAE r16, r/m16
o16 0F 43 /r
CMOV
16/32/64-bit
cmovae instruction.
CMOVAE r32, r/m32
o32 0F 43 /r
CMOV
16/32/64-bit
cmovae instruction.
CMOVAE r64, r/m64
o64 0F 43 /r
CMOV
64-bit
cmovae instruction.
CMOVAE r16, r/m16
o16 0F 43 /r
CMOV
16/32/64-bit
cmovae instruction.
CMOVAE r32, r/m32
o32 0F 43 /r
CMOV
16/32/64-bit
cmovae instruction.
CMOVAE r64, r/m64
o64 0F 43 /r
CMOV
64-bit
cmovb instruction.
CMOVB r16, r/m16
o16 0F 42 /r
CMOV
16/32/64-bit
cmovb instruction.
CMOVB r32, r/m32
o32 0F 42 /r
CMOV
16/32/64-bit
cmovb instruction.
CMOVB r64, r/m64
o64 0F 42 /r
CMOV
64-bit
cmovb instruction.
CMOVB r16, r/m16
o16 0F 42 /r
CMOV
16/32/64-bit
cmovb instruction.
CMOVB r32, r/m32
o32 0F 42 /r
CMOV
16/32/64-bit
cmovb instruction.
CMOVB r64, r/m64
o64 0F 42 /r
CMOV
64-bit
cmovbe instruction.
CMOVBE r16, r/m16
o16 0F 46 /r
CMOV
16/32/64-bit
cmovbe instruction.
CMOVBE r32, r/m32
o32 0F 46 /r
CMOV
16/32/64-bit
cmovbe instruction.
CMOVBE r64, r/m64
o64 0F 46 /r
CMOV
64-bit
cmovbe instruction.
CMOVBE r16, r/m16
o16 0F 46 /r
CMOV
16/32/64-bit
cmovbe instruction.
CMOVBE r32, r/m32
o32 0F 46 /r
CMOV
16/32/64-bit
cmovbe instruction.
CMOVBE r64, r/m64
o64 0F 46 /r
CMOV
64-bit
cmovc instruction.
CMOVB r16, r/m16
o16 0F 42 /r
CMOV
16/32/64-bit
cmovc instruction.
CMOVB r32, r/m32
o32 0F 42 /r
CMOV
16/32/64-bit
cmovc instruction.
CMOVB r64, r/m64
o64 0F 42 /r
CMOV
64-bit
cmovc instruction.
CMOVB r16, r/m16
o16 0F 42 /r
CMOV
16/32/64-bit
cmovc instruction.
CMOVB r32, r/m32
o32 0F 42 /r
CMOV
16/32/64-bit
cmovc instruction.
CMOVB r64, r/m64
o64 0F 42 /r
CMOV
64-bit
cmove instruction.
CMOVE r16, r/m16
o16 0F 44 /r
CMOV
16/32/64-bit
cmove instruction.
CMOVE r32, r/m32
o32 0F 44 /r
CMOV
16/32/64-bit
cmove instruction.
CMOVE r64, r/m64
o64 0F 44 /r
CMOV
64-bit
cmove instruction.
CMOVE r16, r/m16
o16 0F 44 /r
CMOV
16/32/64-bit
cmove instruction.
CMOVE r32, r/m32
o32 0F 44 /r
CMOV
16/32/64-bit
cmove instruction.
CMOVE r64, r/m64
o64 0F 44 /r
CMOV
64-bit
cmovg instruction.
CMOVG r16, r/m16
o16 0F 4F /r
CMOV
16/32/64-bit
cmovg instruction.
CMOVG r32, r/m32
o32 0F 4F /r
CMOV
16/32/64-bit
cmovg instruction.
CMOVG r64, r/m64
o64 0F 4F /r
CMOV
64-bit
cmovg instruction.
CMOVG r16, r/m16
o16 0F 4F /r
CMOV
16/32/64-bit
cmovg instruction.
CMOVG r32, r/m32
o32 0F 4F /r
CMOV
16/32/64-bit
cmovg instruction.
CMOVG r64, r/m64
o64 0F 4F /r
CMOV
64-bit
cmovge instruction.
CMOVGE r16, r/m16
o16 0F 4D /r
CMOV
16/32/64-bit
cmovge instruction.
CMOVGE r32, r/m32
o32 0F 4D /r
CMOV
16/32/64-bit
cmovge instruction.
CMOVGE r64, r/m64
o64 0F 4D /r
CMOV
64-bit
cmovge instruction.
CMOVGE r16, r/m16
o16 0F 4D /r
CMOV
16/32/64-bit
cmovge instruction.
CMOVGE r32, r/m32
o32 0F 4D /r
CMOV
16/32/64-bit
cmovge instruction.
CMOVGE r64, r/m64
o64 0F 4D /r
CMOV
64-bit
cmovl instruction.
CMOVL r16, r/m16
o16 0F 4C /r
CMOV
16/32/64-bit
cmovl instruction.
CMOVL r32, r/m32
o32 0F 4C /r
CMOV
16/32/64-bit
cmovl instruction.
CMOVL r64, r/m64
o64 0F 4C /r
CMOV
64-bit
cmovl instruction.
CMOVL r16, r/m16
o16 0F 4C /r
CMOV
16/32/64-bit
cmovl instruction.
CMOVL r32, r/m32
o32 0F 4C /r
CMOV
16/32/64-bit
cmovl instruction.
CMOVL r64, r/m64
o64 0F 4C /r
CMOV
64-bit
cmovle instruction.
CMOVLE r16, r/m16
o16 0F 4E /r
CMOV
16/32/64-bit
cmovle instruction.
CMOVLE r32, r/m32
o32 0F 4E /r
CMOV
16/32/64-bit
cmovle instruction.
CMOVLE r64, r/m64
o64 0F 4E /r
CMOV
64-bit
cmovle instruction.
CMOVLE r16, r/m16
o16 0F 4E /r
CMOV
16/32/64-bit
cmovle instruction.
CMOVLE r32, r/m32
o32 0F 4E /r
CMOV
16/32/64-bit
cmovle instruction.
CMOVLE r64, r/m64
o64 0F 4E /r
CMOV
64-bit
cmovna instruction.
CMOVBE r16, r/m16
o16 0F 46 /r
CMOV
16/32/64-bit
cmovna instruction.
CMOVBE r32, r/m32
o32 0F 46 /r
CMOV
16/32/64-bit
cmovna instruction.
CMOVBE r64, r/m64
o64 0F 46 /r
CMOV
64-bit
cmovna instruction.
CMOVBE r16, r/m16
o16 0F 46 /r
CMOV
16/32/64-bit
cmovna instruction.
CMOVBE r32, r/m32
o32 0F 46 /r
CMOV
16/32/64-bit
cmovna instruction.
CMOVBE r64, r/m64
o64 0F 46 /r
CMOV
64-bit
cmovnae instruction.
CMOVB r16, r/m16
o16 0F 42 /r
CMOV
16/32/64-bit
cmovnae instruction.
CMOVB r32, r/m32
o32 0F 42 /r
CMOV
16/32/64-bit
cmovnae instruction.
CMOVB r64, r/m64
o64 0F 42 /r
CMOV
64-bit
cmovnae instruction.
CMOVB r16, r/m16
o16 0F 42 /r
CMOV
16/32/64-bit
cmovnae instruction.
CMOVB r32, r/m32
o32 0F 42 /r
CMOV
16/32/64-bit
cmovnae instruction.
CMOVB r64, r/m64
o64 0F 42 /r
CMOV
64-bit
cmovnb instruction.
CMOVAE r16, r/m16
o16 0F 43 /r
CMOV
16/32/64-bit
cmovnb instruction.
CMOVAE r32, r/m32
o32 0F 43 /r
CMOV
16/32/64-bit
cmovnb instruction.
CMOVAE r64, r/m64
o64 0F 43 /r
CMOV
64-bit
cmovnb instruction.
CMOVAE r16, r/m16
o16 0F 43 /r
CMOV
16/32/64-bit
cmovnb instruction.
CMOVAE r32, r/m32
o32 0F 43 /r
CMOV
16/32/64-bit
cmovnb instruction.
CMOVAE r64, r/m64
o64 0F 43 /r
CMOV
64-bit
cmovnbe instruction.
CMOVA r16, r/m16
o16 0F 47 /r
CMOV
16/32/64-bit
cmovnbe instruction.
CMOVA r32, r/m32
o32 0F 47 /r
CMOV
16/32/64-bit
cmovnbe instruction.
CMOVA r64, r/m64
o64 0F 47 /r
CMOV
64-bit
cmovnbe instruction.
CMOVA r16, r/m16
o16 0F 47 /r
CMOV
16/32/64-bit
cmovnbe instruction.
CMOVA r32, r/m32
o32 0F 47 /r
CMOV
16/32/64-bit
cmovnbe instruction.
CMOVA r64, r/m64
o64 0F 47 /r
CMOV
64-bit
cmovnc instruction.
CMOVAE r16, r/m16
o16 0F 43 /r
CMOV
16/32/64-bit
cmovnc instruction.
CMOVAE r32, r/m32
o32 0F 43 /r
CMOV
16/32/64-bit
cmovnc instruction.
CMOVAE r64, r/m64
o64 0F 43 /r
CMOV
64-bit
cmovnc instruction.
CMOVAE r16, r/m16
o16 0F 43 /r
CMOV
16/32/64-bit
cmovnc instruction.
CMOVAE r32, r/m32
o32 0F 43 /r
CMOV
16/32/64-bit
cmovnc instruction.
CMOVAE r64, r/m64
o64 0F 43 /r
CMOV
64-bit
cmovne instruction.
CMOVNE r16, r/m16
o16 0F 45 /r
CMOV
16/32/64-bit
cmovne instruction.
CMOVNE r32, r/m32
o32 0F 45 /r
CMOV
16/32/64-bit
cmovne instruction.
CMOVNE r64, r/m64
o64 0F 45 /r
CMOV
64-bit
cmovne instruction.
CMOVNE r16, r/m16
o16 0F 45 /r
CMOV
16/32/64-bit
cmovne instruction.
CMOVNE r32, r/m32
o32 0F 45 /r
CMOV
16/32/64-bit
cmovne instruction.
CMOVNE r64, r/m64
o64 0F 45 /r
CMOV
64-bit
cmovng instruction.
CMOVLE r16, r/m16
o16 0F 4E /r
CMOV
16/32/64-bit
cmovng instruction.
CMOVLE r32, r/m32
o32 0F 4E /r
CMOV
16/32/64-bit
cmovng instruction.
CMOVLE r64, r/m64
o64 0F 4E /r
CMOV
64-bit
cmovng instruction.
CMOVLE r16, r/m16
o16 0F 4E /r
CMOV
16/32/64-bit
cmovng instruction.
CMOVLE r32, r/m32
o32 0F 4E /r
CMOV
16/32/64-bit
cmovng instruction.
CMOVLE r64, r/m64
o64 0F 4E /r
CMOV
64-bit
cmovnge instruction.
CMOVL r16, r/m16
o16 0F 4C /r
CMOV
16/32/64-bit
cmovnge instruction.
CMOVL r32, r/m32
o32 0F 4C /r
CMOV
16/32/64-bit
cmovnge instruction.
CMOVL r64, r/m64
o64 0F 4C /r
CMOV
64-bit
cmovnge instruction.
CMOVL r16, r/m16
o16 0F 4C /r
CMOV
16/32/64-bit
cmovnge instruction.
CMOVL r32, r/m32
o32 0F 4C /r
CMOV
16/32/64-bit
cmovnge instruction.
CMOVL r64, r/m64
o64 0F 4C /r
CMOV
64-bit
cmovnl instruction.
CMOVGE r16, r/m16
o16 0F 4D /r
CMOV
16/32/64-bit
cmovnl instruction.
CMOVGE r32, r/m32
o32 0F 4D /r
CMOV
16/32/64-bit
cmovnl instruction.
CMOVGE r64, r/m64
o64 0F 4D /r
CMOV
64-bit
cmovnl instruction.
CMOVGE r16, r/m16
o16 0F 4D /r
CMOV
16/32/64-bit
cmovnl instruction.
CMOVGE r32, r/m32
o32 0F 4D /r
CMOV
16/32/64-bit
cmovnl instruction.
CMOVGE r64, r/m64
o64 0F 4D /r
CMOV
64-bit
cmovnle instruction.
CMOVG r16, r/m16
o16 0F 4F /r
CMOV
16/32/64-bit
cmovnle instruction.
CMOVG r32, r/m32
o32 0F 4F /r
CMOV
16/32/64-bit
cmovnle instruction.
CMOVG r64, r/m64
o64 0F 4F /r
CMOV
64-bit
cmovnle instruction.
CMOVG r16, r/m16
o16 0F 4F /r
CMOV
16/32/64-bit
cmovnle instruction.
CMOVG r32, r/m32
o32 0F 4F /r
CMOV
16/32/64-bit
cmovnle instruction.
CMOVG r64, r/m64
o64 0F 4F /r
CMOV
64-bit
cmovno instruction.
CMOVNO r16, r/m16
o16 0F 41 /r
CMOV
16/32/64-bit
cmovno instruction.
CMOVNO r32, r/m32
o32 0F 41 /r
CMOV
16/32/64-bit
cmovno instruction.
CMOVNO r64, r/m64
o64 0F 41 /r
CMOV
64-bit
cmovno instruction.
CMOVNO r16, r/m16
o16 0F 41 /r
CMOV
16/32/64-bit
cmovno instruction.
CMOVNO r32, r/m32
o32 0F 41 /r
CMOV
16/32/64-bit
cmovno instruction.
CMOVNO r64, r/m64
o64 0F 41 /r
CMOV
64-bit
cmovnp instruction.
CMOVNP r16, r/m16
o16 0F 4B /r
CMOV
16/32/64-bit
cmovnp instruction.
CMOVNP r32, r/m32
o32 0F 4B /r
CMOV
16/32/64-bit
cmovnp instruction.
CMOVNP r64, r/m64
o64 0F 4B /r
CMOV
64-bit
cmovnp instruction.
CMOVNP r16, r/m16
o16 0F 4B /r
CMOV
16/32/64-bit
cmovnp instruction.
CMOVNP r32, r/m32
o32 0F 4B /r
CMOV
16/32/64-bit
cmovnp instruction.
CMOVNP r64, r/m64
o64 0F 4B /r
CMOV
64-bit
cmovns instruction.
CMOVNS r16, r/m16
o16 0F 49 /r
CMOV
16/32/64-bit
cmovns instruction.
CMOVNS r32, r/m32
o32 0F 49 /r
CMOV
16/32/64-bit
cmovns instruction.
CMOVNS r64, r/m64
o64 0F 49 /r
CMOV
64-bit
cmovns instruction.
CMOVNS r16, r/m16
o16 0F 49 /r
CMOV
16/32/64-bit
cmovns instruction.
CMOVNS r32, r/m32
o32 0F 49 /r
CMOV
16/32/64-bit
cmovns instruction.
CMOVNS r64, r/m64
o64 0F 49 /r
CMOV
64-bit
cmovnz instruction.
CMOVNE r16, r/m16
o16 0F 45 /r
CMOV
16/32/64-bit
cmovnz instruction.
CMOVNE r32, r/m32
o32 0F 45 /r
CMOV
16/32/64-bit
cmovnz instruction.
CMOVNE r64, r/m64
o64 0F 45 /r
CMOV
64-bit
cmovnz instruction.
CMOVNE r16, r/m16
o16 0F 45 /r
CMOV
16/32/64-bit
cmovnz instruction.
CMOVNE r32, r/m32
o32 0F 45 /r
CMOV
16/32/64-bit
cmovnz instruction.
CMOVNE r64, r/m64
o64 0F 45 /r
CMOV
64-bit
cmovo instruction.
CMOVO r16, r/m16
o16 0F 40 /r
CMOV
16/32/64-bit
cmovo instruction.
CMOVO r32, r/m32
o32 0F 40 /r
CMOV
16/32/64-bit
cmovo instruction.
CMOVO r64, r/m64
o64 0F 40 /r
CMOV
64-bit
cmovo instruction.
CMOVO r16, r/m16
o16 0F 40 /r
CMOV
16/32/64-bit
cmovo instruction.
CMOVO r32, r/m32
o32 0F 40 /r
CMOV
16/32/64-bit
cmovo instruction.
CMOVO r64, r/m64
o64 0F 40 /r
CMOV
64-bit
cmovp instruction.
CMOVP r16, r/m16
o16 0F 4A /r
CMOV
16/32/64-bit
cmovp instruction.
CMOVP r32, r/m32
o32 0F 4A /r
CMOV
16/32/64-bit
cmovp instruction.
CMOVP r64, r/m64
o64 0F 4A /r
CMOV
64-bit
cmovp instruction.
CMOVP r16, r/m16
o16 0F 4A /r
CMOV
16/32/64-bit
cmovp instruction.
CMOVP r32, r/m32
o32 0F 4A /r
CMOV
16/32/64-bit
cmovp instruction.
CMOVP r64, r/m64
o64 0F 4A /r
CMOV
64-bit
cmovpe instruction.
CMOVP r16, r/m16
o16 0F 4A /r
CMOV
16/32/64-bit
cmovpe instruction.
CMOVP r32, r/m32
o32 0F 4A /r
CMOV
16/32/64-bit
cmovpe instruction.
CMOVP r64, r/m64
o64 0F 4A /r
CMOV
64-bit
cmovpe instruction.
CMOVP r16, r/m16
o16 0F 4A /r
CMOV
16/32/64-bit
cmovpe instruction.
CMOVP r32, r/m32
o32 0F 4A /r
CMOV
16/32/64-bit
cmovpe instruction.
CMOVP r64, r/m64
o64 0F 4A /r
CMOV
64-bit
cmovpo instruction.
CMOVNP r16, r/m16
o16 0F 4B /r
CMOV
16/32/64-bit
cmovpo instruction.
CMOVNP r32, r/m32
o32 0F 4B /r
CMOV
16/32/64-bit
cmovpo instruction.
CMOVNP r64, r/m64
o64 0F 4B /r
CMOV
64-bit
cmovpo instruction.
CMOVNP r16, r/m16
o16 0F 4B /r
CMOV
16/32/64-bit
cmovpo instruction.
CMOVNP r32, r/m32
o32 0F 4B /r
CMOV
16/32/64-bit
cmovpo instruction.
CMOVNP r64, r/m64
o64 0F 4B /r
CMOV
64-bit
cmovs instruction.
CMOVS r16, r/m16
o16 0F 48 /r
CMOV
16/32/64-bit
cmovs instruction.
CMOVS r32, r/m32
o32 0F 48 /r
CMOV
16/32/64-bit
cmovs instruction.
CMOVS r64, r/m64
o64 0F 48 /r
CMOV
64-bit
cmovs instruction.
CMOVS r16, r/m16
o16 0F 48 /r
CMOV
16/32/64-bit
cmovs instruction.
CMOVS r32, r/m32
o32 0F 48 /r
CMOV
16/32/64-bit
cmovs instruction.
CMOVS r64, r/m64
o64 0F 48 /r
CMOV
64-bit
cmovz instruction.
CMOVE r16, r/m16
o16 0F 44 /r
CMOV
16/32/64-bit
cmovz instruction.
CMOVE r32, r/m32
o32 0F 44 /r
CMOV
16/32/64-bit
cmovz instruction.
CMOVE r64, r/m64
o64 0F 44 /r
CMOV
64-bit
cmovz instruction.
CMOVE r16, r/m16
o16 0F 44 /r
CMOV
16/32/64-bit
cmovz instruction.
CMOVE r32, r/m32
o32 0F 44 /r
CMOV
16/32/64-bit
cmovz instruction.
CMOVE r64, r/m64
o64 0F 44 /r
CMOV
64-bit
cmp instruction.
CMP r/m8, r8
38 /r
8086+
16/32/64-bit
cmp instruction.
CMP r/m8, r8
38 /r
8086+
16/32/64-bit
cmp instruction.
CMP r/m16, r16
o16 39 /r
8086+
16/32/64-bit
cmp instruction.
CMP r/m16, r16
o16 39 /r
8086+
16/32/64-bit
cmp instruction.
CMP r/m32, r32
o32 39 /r
386+
16/32/64-bit
cmp instruction.
CMP r/m32, r32
o32 39 /r
386+
16/32/64-bit
cmp instruction.
CMP r/m64, r64
o64 39 /r
X64
64-bit
cmp instruction.
CMP r/m64, r64
o64 39 /r
X64
64-bit
cmp instruction.
CMP r8, r/m8
3A /r
8086+
16/32/64-bit
cmp instruction.
CMP r16, r/m16
o16 3B /r
8086+
16/32/64-bit
cmp instruction.
CMP r32, r/m32
o32 3B /r
386+
16/32/64-bit
cmp instruction.
CMP r64, r/m64
o64 3B /r
X64
64-bit
cmp instruction.
CMP AL, imm8
3C ib
8086+
16/32/64-bit
CMP r/m8, imm8
80 /7 ib
8086+
16/32/64-bit
cmp instruction.
CMP AX, imm16
o16 3D iw
8086+
16/32/64-bit
CMP r/m16, imm16
o16 81 /7 iw
8086+
16/32/64-bit
CMP r/m16, imm8
o16 83 /7 ib
8086+
16/32/64-bit
cmp instruction.
CMP EAX, imm32
o32 3D id
386+
16/32/64-bit
CMP r/m32, imm32
o32 81 /7 id
386+
16/32/64-bit
CMP r/m32, imm8
o32 83 /7 ib
386+
16/32/64-bit
cmp instruction.
CMP RAX, imm32
o64 3D id
X64
64-bit
CMP r/m64, imm32
o64 81 /7 id
X64
64-bit
CMP r/m64, imm8
o64 83 /7 ib
X64
64-bit
cmp instruction.
CMP r/m64, imm32
o64 81 /7 id
X64
64-bit
CMP r/m64, imm8
o64 83 /7 ib
X64
64-bit
CMP r/m32, imm32
o32 81 /7 id
386+
16/32/64-bit
CMP r/m32, imm8
o32 83 /7 ib
386+
16/32/64-bit
CMP r/m16, imm16
o16 81 /7 iw
8086+
16/32/64-bit
CMP r/m16, imm8
o16 83 /7 ib
8086+
16/32/64-bit
CMP r/m8, imm8
80 /7 ib
8086+
16/32/64-bit
cmp instruction.
CMP AL, imm8
3C ib
8086+
16/32/64-bit
CMP r/m8, imm8
80 /7 ib
8086+
16/32/64-bit
cmp instruction.
CMP AX, imm16
o16 3D iw
8086+
16/32/64-bit
CMP r/m16, imm16
o16 81 /7 iw
8086+
16/32/64-bit
CMP r/m16, imm8
o16 83 /7 ib
8086+
16/32/64-bit
cmp instruction.
CMP EAX, imm32
o32 3D id
386+
16/32/64-bit
CMP r/m32, imm32
o32 81 /7 id
386+
16/32/64-bit
CMP r/m32, imm8
o32 83 /7 ib
386+
16/32/64-bit
cmp instruction.
CMP r/m32, imm32
o32 81 /7 id
386+
16/32/64-bit
CMP r/m32, imm8
o32 83 /7 ib
386+
16/32/64-bit
CMP r/m16, imm16
o16 81 /7 iw
8086+
16/32/64-bit
CMP r/m16, imm8
o16 83 /7 ib
8086+
16/32/64-bit
CMP r/m8, imm8
80 /7 ib
8086+
16/32/64-bit
cmpbexadd instruction.
CMPBEXADD m32, r32, r32
VEX.128.66.0F38.W0 E6 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpbexadd instruction.
CMPBEXADD m64, r64, r64
VEX.128.66.0F38.W1 E6 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpbxadd instruction.
CMPBXADD m32, r32, r32
VEX.128.66.0F38.W0 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpbxadd instruction.
CMPBXADD m64, r64, r64
VEX.128.66.0F38.W1 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpcxadd instruction.
CMPBXADD m32, r32, r32
VEX.128.66.0F38.W0 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpcxadd instruction.
CMPBXADD m64, r64, r64
VEX.128.66.0F38.W1 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpeqpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpeqpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpeqps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpeqps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpeqsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpeqsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpeqss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpeqss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmplepd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmplepd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpleps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpleps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmplesd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmplesd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpless instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpless instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmplexadd instruction.
CMPLEXADD m32, r32, r32
VEX.128.66.0F38.W0 EE !(11):rrr:bbb
CMPCCXADD
64-bit
cmplexadd instruction.
CMPLEXADD m64, r64, r64
VEX.128.66.0F38.W1 EE !(11):rrr:bbb
CMPCCXADD
64-bit
cmpltpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpltpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpltps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpltps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpltsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpltsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpltss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpltss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmplxadd instruction.
CMPLXADD m32, r32, r32
VEX.128.66.0F38.W0 EC !(11):rrr:bbb
CMPCCXADD
64-bit
cmplxadd instruction.
CMPLXADD m64, r64, r64
VEX.128.66.0F38.W1 EC !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnaexadd instruction.
CMPBXADD m32, r32, r32
VEX.128.66.0F38.W0 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnaexadd instruction.
CMPBXADD m64, r64, r64
VEX.128.66.0F38.W1 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnaxadd instruction.
CMPBEXADD m32, r32, r32
VEX.128.66.0F38.W0 E6 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnaxadd instruction.
CMPBEXADD m64, r64, r64
VEX.128.66.0F38.W1 E6 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnbexadd instruction.
CMPNBEXADD m32, r32, r32
VEX.128.66.0F38.W0 E7 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnbexadd instruction.
CMPNBEXADD m64, r64, r64
VEX.128.66.0F38.W1 E7 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnbxadd instruction.
CMPNBXADD m32, r32, r32
VEX.128.66.0F38.W0 E3 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnbxadd instruction.
CMPNBXADD m64, r64, r64
VEX.128.66.0F38.W1 E3 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpncxadd instruction.
CMPNBXADD m32, r32, r32
VEX.128.66.0F38.W0 E3 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpncxadd instruction.
CMPNBXADD m64, r64, r64
VEX.128.66.0F38.W1 E3 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpneqpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpneqpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpneqps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpneqps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpneqsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpneqsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpneqss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpneqss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpngexadd instruction.
CMPLXADD m32, r32, r32
VEX.128.66.0F38.W0 EC !(11):rrr:bbb
CMPCCXADD
64-bit
cmpngexadd instruction.
CMPLXADD m64, r64, r64
VEX.128.66.0F38.W1 EC !(11):rrr:bbb
CMPCCXADD
64-bit
cmpngxadd instruction.
CMPLEXADD m32, r32, r32
VEX.128.66.0F38.W0 EE !(11):rrr:bbb
CMPCCXADD
64-bit
cmpngxadd instruction.
CMPLEXADD m64, r64, r64
VEX.128.66.0F38.W1 EE !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnlepd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpnlepd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpnleps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpnleps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpnlesd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpnlesd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpnless instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpnless instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpnlexadd instruction.
CMPNLEXADD m32, r32, r32
VEX.128.66.0F38.W0 EF !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnlexadd instruction.
CMPNLEXADD m64, r64, r64
VEX.128.66.0F38.W1 EF !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnltpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpnltpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpnltps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpnltps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpnltsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpnltsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpnltss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpnltss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpnlxadd instruction.
CMPNLXADD m32, r32, r32
VEX.128.66.0F38.W0 ED !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnlxadd instruction.
CMPNLXADD m64, r64, r64
VEX.128.66.0F38.W1 ED !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnoxadd instruction.
CMPNOXADD m32, r32, r32
VEX.128.66.0F38.W0 E1 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnoxadd instruction.
CMPNOXADD m64, r64, r64
VEX.128.66.0F38.W1 E1 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnpxadd instruction.
CMPNPXADD m32, r32, r32
VEX.128.66.0F38.W0 EB !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnpxadd instruction.
CMPNPXADD m64, r64, r64
VEX.128.66.0F38.W1 EB !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnsxadd instruction.
CMPNSXADD m32, r32, r32
VEX.128.66.0F38.W0 E9 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnsxadd instruction.
CMPNSXADD m64, r64, r64
VEX.128.66.0F38.W1 E9 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnzxadd instruction.
CMPNZXADD m32, r32, r32
VEX.128.66.0F38.W0 E5 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpnzxadd instruction.
CMPNZXADD m64, r64, r64
VEX.128.66.0F38.W1 E5 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpordpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpordpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpordps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpordps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpordsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpordsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpordss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpordss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpoxadd instruction.
CMPOXADD m32, r32, r32
VEX.128.66.0F38.W0 E0 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpoxadd instruction.
CMPOXADD m64, r64, r64
VEX.128.66.0F38.W1 E0 !(11):rrr:bbb
CMPCCXADD
64-bit
cmppd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmppd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmppd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmppd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmppexadd instruction.
CMPPXADD m32, r32, r32
VEX.128.66.0F38.W0 EA !(11):rrr:bbb
CMPCCXADD
64-bit
cmppexadd instruction.
CMPPXADD m64, r64, r64
VEX.128.66.0F38.W1 EA !(11):rrr:bbb
CMPCCXADD
64-bit
cmppoxadd instruction.
CMPNPXADD m32, r32, r32
VEX.128.66.0F38.W0 EB !(11):rrr:bbb
CMPCCXADD
64-bit
cmppoxadd instruction.
CMPNPXADD m64, r64, r64
VEX.128.66.0F38.W1 EB !(11):rrr:bbb
CMPCCXADD
64-bit
cmpps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmppxadd instruction.
CMPPXADD m32, r32, r32
VEX.128.66.0F38.W0 EA !(11):rrr:bbb
CMPCCXADD
64-bit
cmppxadd instruction.
CMPPXADD m64, r64, r64
VEX.128.66.0F38.W1 EA !(11):rrr:bbb
CMPCCXADD
64-bit
cmpsb instruction.
CMPSB
A6
8086+
16/32/64-bit
cmpsd instruction.
CMPSD
o32 A7
386+
16/32/64-bit
cmpsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpsq instruction.
CMPSQ
o64 A7
X64
64-bit
cmpss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpsw instruction.
CMPSW
o16 A7
8086+
16/32/64-bit
cmpsxadd instruction.
CMPSXADD m32, r32, r32
VEX.128.66.0F38.W0 E8 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpsxadd instruction.
CMPSXADD m64, r64, r64
VEX.128.66.0F38.W1 E8 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpunordpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpunordpd instruction.
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
cmpunordps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpunordps instruction.
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
cmpunordsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpunordsd instruction.
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
cmpunordss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpunordss instruction.
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
cmpxchg instruction.
CMPXCHG r/m8, r8
0F B0 /r
486+
16/32/64-bit
cmpxchg instruction.
CMPXCHG r/m8, r8
0F B0 /r
486+
16/32/64-bit
cmpxchg instruction.
CMPXCHG r/m16, r16
o16 0F B1 /r
486+
16/32/64-bit
cmpxchg instruction.
CMPXCHG r/m16, r16
o16 0F B1 /r
486+
16/32/64-bit
cmpxchg instruction.
CMPXCHG r/m32, r32
o32 0F B1 /r
486+
16/32/64-bit
cmpxchg instruction.
CMPXCHG r/m32, r32
o32 0F B1 /r
486+
16/32/64-bit
cmpxchg instruction.
CMPXCHG r/m64, r64
o64 0F B1 /r
X64
64-bit
cmpxchg instruction.
CMPXCHG r/m64, r64
o64 0F B1 /r
X64
64-bit
cmpxchg16b instruction.
CMPXCHG16B m128
o64 0F C7 /1
CMPXCHG16B
64-bit
cmpxchg8b instruction.
CMPXCHG8B m64
0F C7 /1
CX8
16/32/64-bit
cmpzxadd instruction.
CMPZXADD m32, r32, r32
VEX.128.66.0F38.W0 E4 !(11):rrr:bbb
CMPCCXADD
64-bit
cmpzxadd instruction.
CMPZXADD m64, r64, r64
VEX.128.66.0F38.W1 E4 !(11):rrr:bbb
CMPCCXADD
64-bit
comisd instruction.
COMISD xmm1, xmm2/m64
66 0F 2F /r
SSE2
16/32/64-bit
comisd instruction.
COMISD xmm1, xmm2/m64
66 0F 2F /r
SSE2
16/32/64-bit
comiss instruction.
COMISS xmm1, xmm2/m32
NP 0F 2F /r
SSE
16/32/64-bit
comiss instruction.
COMISS xmm1, xmm2/m32
NP 0F 2F /r
SSE
16/32/64-bit
cpu_read instruction.
CPU_READ
0F 3D
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
cpu_write instruction.
CPU_WRITE
0F 3C
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
cpuid instruction.
CPUID
0F A2
CPUID
16/32/64-bit
cqo instruction.
CQO
o64 99
X64
64-bit
crc32 instruction.
CRC32 r32, r/m8
F2 0F 38 F0 /r
SSE4.2
16/32/64-bit
crc32 instruction.
CRC32 r64, r/m8
F2 o64 0F 38 F0 /r
SSE4.2
64-bit
crc32 instruction.
CRC32 r32, r/m16
o16 F2 0F 38 F1 /r
SSE4.2
16/32/64-bit
crc32 instruction.
CRC32 r32, r/m32
o32 F2 0F 38 F1 /r
SSE4.2
16/32/64-bit
crc32 instruction.
CRC32 r64, r/m64
F2 o64 0F 38 F1 /r
SSE4.2
64-bit
crc32 instruction.
CRC32 r32, r/m32
o32 F2 0F 38 F1 /r
SSE4.2
16/32/64-bit
CRC32 r32, r/m16
o16 F2 0F 38 F1 /r
SSE4.2
16/32/64-bit
CRC32 r32, r/m8
F2 0F 38 F0 /r
SSE4.2
16/32/64-bit
crc32 instruction.
CRC32 r64, r/m64
F2 o64 0F 38 F1 /r
SSE4.2
64-bit
CRC32 r64, r/m8
F2 o64 0F 38 F0 /r
SSE4.2
64-bit
cvtdq2pd instruction.
CVTDQ2PD xmm1, xmm2/m64
F3 0F E6 /r
SSE2
16/32/64-bit
cvtdq2pd instruction.
CVTDQ2PD xmm1, xmm2/m64
F3 0F E6 /r
SSE2
16/32/64-bit
cvtdq2ps instruction.
CVTDQ2PS xmm1, xmm2/m128
NP 0F 5B /r
SSE2
16/32/64-bit
cvtdq2ps instruction.
CVTDQ2PS xmm1, xmm2/m128
NP 0F 5B /r
SSE2
16/32/64-bit
cvtpd2dq instruction.
CVTPD2DQ xmm1, xmm2/m128
F2 0F E6 /r
SSE2
16/32/64-bit
cvtpd2dq instruction.
CVTPD2DQ xmm1, xmm2/m128
F2 0F E6 /r
SSE2
16/32/64-bit
cvtpd2pi instruction.
CVTPD2PI mm, xmm/m128
66 0F 2D /r
SSE2
16/32/64-bit
cvtpd2pi instruction.
CVTPD2PI mm, xmm/m128
66 0F 2D /r
SSE2
16/32/64-bit
cvtpd2ps instruction.
CVTPD2PS xmm1, xmm2/m128
66 0F 5A /r
SSE2
16/32/64-bit
cvtpd2ps instruction.
CVTPD2PS xmm1, xmm2/m128
66 0F 5A /r
SSE2
16/32/64-bit
cvtpi2pd instruction.
CVTPI2PD xmm, mm/m64
66 0F 2A /r
SSE2
16/32/64-bit
cvtpi2pd instruction.
CVTPI2PD xmm, mm/m64
66 0F 2A /r
SSE2
16/32/64-bit
cvtpi2ps instruction.
CVTPI2PS xmm, mm/m64
NP 0F 2A /r
SSE
16/32/64-bit
cvtpi2ps instruction.
CVTPI2PS xmm, mm/m64
NP 0F 2A /r
SSE
16/32/64-bit
cvtps2dq instruction.
CVTPS2DQ xmm1, xmm2/m128
66 0F 5B /r
SSE2
16/32/64-bit
cvtps2dq instruction.
CVTPS2DQ xmm1, xmm2/m128
66 0F 5B /r
SSE2
16/32/64-bit
cvtps2pd instruction.
CVTPS2PD xmm1, xmm2/m64
NP 0F 5A /r
SSE2
16/32/64-bit
cvtps2pd instruction.
CVTPS2PD xmm1, xmm2/m64
NP 0F 5A /r
SSE2
16/32/64-bit
cvtps2pi instruction.
CVTPS2PI mm, xmm/m64
NP 0F 2D /r
SSE
16/32/64-bit
cvtps2pi instruction.
CVTPS2PI mm, xmm/m64
NP 0F 2D /r
SSE
16/32/64-bit
cvtsd2si instruction.
CVTSD2SI r32, xmm1/m64
F2 0F 2D /r
SSE2
16/32/64-bit
cvtsd2si instruction.
CVTSD2SI r64, xmm1/m64
F2 o64 0F 2D /r
SSE2
64-bit
cvtsd2si instruction.
CVTSD2SI r32, xmm1/m64
F2 0F 2D /r
SSE2
16/32/64-bit
cvtsd2si instruction.
CVTSD2SI r64, xmm1/m64
F2 o64 0F 2D /r
SSE2
64-bit
cvtsd2ss instruction.
CVTSD2SS xmm1, xmm2/m64
F2 0F 5A /r
SSE2
16/32/64-bit
cvtsd2ss instruction.
CVTSD2SS xmm1, xmm2/m64
F2 0F 5A /r
SSE2
16/32/64-bit
cvtsi2sd instruction.
CVTSI2SD xmm1, r/m32
F2 0F 2A /r
SSE2
16/32/64-bit
cvtsi2sd instruction.
CVTSI2SD xmm1, r/m64
F2 o64 0F 2A /r
SSE2
64-bit
cvtsi2sd instruction.
CVTSI2SD xmm1, r/m64
F2 o64 0F 2A /r
SSE2
64-bit
CVTSI2SD xmm1, r/m32
F2 0F 2A /r
SSE2
16/32/64-bit
cvtsi2ss instruction.
CVTSI2SS xmm1, r/m32
F3 0F 2A /r
SSE
16/32/64-bit
cvtsi2ss instruction.
CVTSI2SS xmm1, r/m64
F3 o64 0F 2A /r
SSE
64-bit
cvtsi2ss instruction.
CVTSI2SS xmm1, r/m64
F3 o64 0F 2A /r
SSE
64-bit
CVTSI2SS xmm1, r/m32
F3 0F 2A /r
SSE
16/32/64-bit
cvtss2sd instruction.
CVTSS2SD xmm1, xmm2/m32
F3 0F 5A /r
SSE2
16/32/64-bit
cvtss2sd instruction.
CVTSS2SD xmm1, xmm2/m32
F3 0F 5A /r
SSE2
16/32/64-bit
cvtss2si instruction.
CVTSS2SI r32, xmm1/m32
F3 0F 2D /r
SSE
16/32/64-bit
cvtss2si instruction.
CVTSS2SI r64, xmm1/m32
F3 o64 0F 2D /r
SSE
64-bit
cvtss2si instruction.
CVTSS2SI r32, xmm1/m32
F3 0F 2D /r
SSE
16/32/64-bit
cvtss2si instruction.
CVTSS2SI r64, xmm1/m32
F3 o64 0F 2D /r
SSE
64-bit
cvttpd2dq instruction.
CVTTPD2DQ xmm1, xmm2/m128
66 0F E6 /r
SSE2
16/32/64-bit
cvttpd2dq instruction.
CVTTPD2DQ xmm1, xmm2/m128
66 0F E6 /r
SSE2
16/32/64-bit
cvttpd2pi instruction.
CVTTPD2PI mm, xmm/m128
66 0F 2C /r
SSE2
16/32/64-bit
cvttpd2pi instruction.
CVTTPD2PI mm, xmm/m128
66 0F 2C /r
SSE2
16/32/64-bit
cvttps2dq instruction.
CVTTPS2DQ xmm1, xmm2/m128
F3 0F 5B /r
SSE2
16/32/64-bit
cvttps2dq instruction.
CVTTPS2DQ xmm1, xmm2/m128
F3 0F 5B /r
SSE2
16/32/64-bit
cvttps2pi instruction.
CVTTPS2PI mm, xmm/m64
NP 0F 2C /r
SSE
16/32/64-bit
cvttps2pi instruction.
CVTTPS2PI mm, xmm/m64
NP 0F 2C /r
SSE
16/32/64-bit
cvttsd2si instruction.
CVTTSD2SI r32, xmm1/m64
F2 0F 2C /r
SSE2
16/32/64-bit
cvttsd2si instruction.
CVTTSD2SI r64, xmm1/m64
F2 o64 0F 2C /r
SSE2
64-bit
cvttsd2si instruction.
CVTTSD2SI r32, xmm1/m64
F2 0F 2C /r
SSE2
16/32/64-bit
cvttsd2si instruction.
CVTTSD2SI r64, xmm1/m64
F2 o64 0F 2C /r
SSE2
64-bit
cvttss2si instruction.
CVTTSS2SI r32, xmm1/m32
F3 0F 2C /r
SSE
16/32/64-bit
cvttss2si instruction.
CVTTSS2SI r64, xmm1/m32
F3 o64 0F 2C /r
SSE
64-bit
cvttss2si instruction.
CVTTSS2SI r32, xmm1/m32
F3 0F 2C /r
SSE
16/32/64-bit
cvttss2si instruction.
CVTTSS2SI r64, xmm1/m32
F3 o64 0F 2C /r
SSE
64-bit
cwd instruction.
CWD
o16 99
8086+
16/32/64-bit
cwde instruction.
CWDE
o32 98
386+
16/32/64-bit
daa instruction.
DAA
27
8086+
16/32-bit
das instruction.
DAS
2F
8086+
16/32-bit
dec instruction.
DEC r/m8
FE /1
8086+
16/32/64-bit
dec instruction.
DEC r/m16
o16 FF /1
8086+
16/32/64-bit
DEC r16
o16 48+rw
8086+
16/32-bit
dec instruction.
DEC r/m32
o32 FF /1
386+
16/32/64-bit
DEC r32
o32 48+rd
386+
16/32-bit
dec instruction.
DEC r/m64
o64 FF /1
X64
64-bit
dec instruction.
DEC r/m64
o64 FF /1
X64
64-bit
DEC r/m32
o32 FF /1
386+
16/32/64-bit
DEC r/m16
o16 FF /1
8086+
16/32/64-bit
DEC r/m8
FE /1
8086+
16/32/64-bit
div instruction.
DIV r/m8
F6 /6
8086+
16/32/64-bit
div instruction.
DIV r/m16
o16 F7 /6
8086+
16/32/64-bit
div instruction.
DIV r/m32
o32 F7 /6
386+
16/32/64-bit
div instruction.
DIV r/m64
o64 F7 /6
X64
64-bit
div instruction.
DIV r/m64
o64 F7 /6
X64
64-bit
DIV r/m32
o32 F7 /6
386+
16/32/64-bit
DIV r/m16
o16 F7 /6
8086+
16/32/64-bit
DIV r/m8
F6 /6
8086+
16/32/64-bit
divpd instruction.
DIVPD xmm1, xmm2/m128
66 0F 5E /r
SSE2
16/32/64-bit
divpd instruction.
DIVPD xmm1, xmm2/m128
66 0F 5E /r
SSE2
16/32/64-bit
divps instruction.
DIVPS xmm1, xmm2/m128
NP 0F 5E /r
SSE
16/32/64-bit
divps instruction.
DIVPS xmm1, xmm2/m128
NP 0F 5E /r
SSE
16/32/64-bit
divsd instruction.
DIVSD xmm1, xmm2/m64
F2 0F 5E /r
SSE2
16/32/64-bit
divsd instruction.
DIVSD xmm1, xmm2/m64
F2 0F 5E /r
SSE2
16/32/64-bit
divss instruction.
DIVSS xmm1, xmm2/m32
F3 0F 5E /r
SSE
16/32/64-bit
divss instruction.
DIVSS xmm1, xmm2/m32
F3 0F 5E /r
SSE
16/32/64-bit
dmint instruction.
DMINT
0F 39
AMD Geode GX/LX
16/32-bit
dppd instruction.
DPPD xmm1, xmm2/m128, imm8
66 0F 3A 41 /r ib
SSE4.1
16/32/64-bit
dppd instruction.
DPPD xmm1, xmm2/m128, imm8
66 0F 3A 41 /r ib
SSE4.1
16/32/64-bit
dppd instruction.
DPPD xmm1, xmm2/m128, imm8
66 0F 3A 41 /r ib
SSE4.1
16/32/64-bit
dppd instruction.
DPPD xmm1, xmm2/m128, imm8
66 0F 3A 41 /r ib
SSE4.1
16/32/64-bit
dpps instruction.
DPPS xmm1, xmm2/m128, imm8
66 0F 3A 40 /r ib
SSE4.1
16/32/64-bit
dpps instruction.
DPPS xmm1, xmm2/m128, imm8
66 0F 3A 40 /r ib
SSE4.1
16/32/64-bit
dpps instruction.
DPPS xmm1, xmm2/m128, imm8
66 0F 3A 40 /r ib
SSE4.1
16/32/64-bit
dpps instruction.
DPPS xmm1, xmm2/m128, imm8
66 0F 3A 40 /r ib
SSE4.1
16/32/64-bit
emms instruction.
EMMS
NP 0F 77
MMX
16/32/64-bit
encls instruction.
ENCLS
NP 0F 01 CF
SGX1
16/32/64-bit
enclu instruction.
ENCLU
NP 0F 01 D7
SGX1
16/32/64-bit
enclv instruction.
ENCLV
NP 0F 01 C0
OSS
16/32/64-bit
encodekey128 instruction.
ENCODEKEY128 r32, r32, <XMM0-2>, <XMM4-6>
F3 0F 38 FA 11:rrr:bbb
AESKLE
16/32/64-bit
encodekey256 instruction.
ENCODEKEY256 r32, r32, <XMM0-6>
F3 0F 38 FB 11:rrr:bbb
AESKLE
16/32/64-bit
endbr32 instruction.
ENDBR32
F3 0F 1E FB
CET_IBT
16/32/64-bit
endbr64 instruction.
ENDBR64
F3 0F 1E FA
CET_IBT
16/32/64-bit
enqcmd instruction.
ENQCMD r16, m512
a16 F2 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32-bit
enqcmd instruction.
ENQCMD r32, m512
a32 F2 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32/64-bit
enqcmd instruction.
ENQCMD r64, m512
a64 F2 0F 38 F8 !(11):rrr:bbb
ENQCMD
64-bit
enqcmds instruction.
ENQCMDS r16, m512
a16 F3 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32-bit
enqcmds instruction.
ENQCMDS r32, m512
a32 F3 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32/64-bit
enqcmds instruction.
ENQCMDS r64, m512
a64 F3 0F 38 F8 !(11):rrr:bbb
ENQCMD
64-bit
enter instruction.
ENTER imm16, imm8
o64 C8 iw ib
X64
64-bit
ENTER imm16, imm8
o32 C8 iw ib
386+
16/32-bit
ENTER imm16, imm8
o16 C8 iw ib
186+
16/32/64-bit
enter instruction.
ENTER imm16, imm8
o64 C8 iw ib
X64
64-bit
ENTER imm16, imm8
o32 C8 iw ib
386+
16/32-bit
ENTER imm16, imm8
o16 C8 iw ib
186+
16/32/64-bit
erets instruction.
ERETS
F2 0F 01 CA
FRED
64-bit
eretu instruction.
ERETU
F3 0F 01 CA
FRED
64-bit
extractps instruction.
EXTRACTPS r/m32, xmm1, imm8
66 0F 3A 17 /r ib
SSE4.1
16/32/64-bit
extractps instruction.
EXTRACTPS r64/m32, xmm1, imm8
66 o64 0F 3A 17 /r ib
SSE4.1
64-bit
extractps instruction.
EXTRACTPS r/m32, xmm1, imm8
66 0F 3A 17 /r ib
SSE4.1
16/32/64-bit
extractps instruction.
EXTRACTPS r/m32, xmm1, imm8
66 0F 3A 17 /r ib
SSE4.1
16/32/64-bit
extractps instruction.
EXTRACTPS r64/m32, xmm1, imm8
66 o64 0F 3A 17 /r ib
SSE4.1
64-bit
extractps instruction.
EXTRACTPS r/m32, xmm1, imm8
66 0F 3A 17 /r ib
SSE4.1
16/32/64-bit
extrq instruction.
EXTRQ xmm1, xmm2
66 0F 79 /r
SSE4A
16/32/64-bit
extrq instruction.
EXTRQ xmm1, imm8, imm8
66 0F 78 /0 ib ib
SSE4A
16/32/64-bit
extrq instruction.
EXTRQ xmm1, imm8, imm8
66 0F 78 /0 ib ib
SSE4A
16/32/64-bit
f2xm1 instruction.
F2XM1
D9 F0
8087+
16/32/64-bit
fabs instruction.
FABS
D9 E1
8087+
16/32/64-bit
fadd instruction.
FADD m64fp
DC /0
8087+
16/32/64-bit
FADD m32fp
D8 /0
8087+
16/32/64-bit
fadd instruction.
FADD ST(0), ST(i)
D8 C0+i
8087+
16/32/64-bit
FADD ST(i), ST(0)
DC C0+i
8087+
16/32/64-bit
faddp instruction.
FADDP ST(i), ST(0)
DE C0+i
8087+
16/32/64-bit
fbld instruction.
FBLD m80bcd
DF /4
8087+
16/32/64-bit
fbstp instruction.
FBSTP m80bcd
DF /6
8087+
16/32/64-bit
fchs instruction.
FCHS
D9 E0
8087+
16/32/64-bit
fclex instruction.
FCLEX
9B DB E2
8087+
16/32/64-bit
fcmovb instruction.
FCMOVB ST(0), ST(i)
DA C0+i
8087+ and CMOV
16/32/64-bit
fcmovbe instruction.
FCMOVBE ST(0), ST(i)
DA D0+i
8087+ and CMOV
16/32/64-bit
fcmove instruction.
FCMOVE ST(0), ST(i)
DA C8+i
8087+ and CMOV
16/32/64-bit
fcmovnb instruction.
FCMOVNB ST(0), ST(i)
DB C0+i
8087+ and CMOV
16/32/64-bit
fcmovnbe instruction.
FCMOVNBE ST(0), ST(i)
DB D0+i
8087+ and CMOV
16/32/64-bit
fcmovne instruction.
FCMOVNE ST(0), ST(i)
DB C8+i
8087+ and CMOV
16/32/64-bit
fcmovnu instruction.
FCMOVNU ST(0), ST(i)
DB D8+i
8087+ and CMOV
16/32/64-bit
fcmovu instruction.
FCMOVU ST(0), ST(i)
DA D8+i
8087+ and CMOV
16/32/64-bit
fcom instruction.
FCOM m64fp
DC /2
8087+
16/32/64-bit
FCOM m32fp
D8 /2
8087+
16/32/64-bit
fcom instruction.
FCOM ST(i)
D8 D0+i
8087+
16/32/64-bit
fcomi instruction.
FCOMI ST, ST(i)
DB F0+i
8087+ and CMOV
16/32/64-bit
fcomip instruction.
FCOMIP ST, ST(i)
DF F0+i
8087+ and CMOV
16/32/64-bit
fcomp instruction.
FCOMP m64fp
DC /3
8087+
16/32/64-bit
FCOMP m32fp
D8 /3
8087+
16/32/64-bit
fcomp instruction.
FCOMP ST(i)
D8 D8+i
8087+
16/32/64-bit
fcompp instruction.
FCOMPP
DE D9
8087+
16/32/64-bit
fcos instruction.
FCOS
D9 FF
387+
16/32/64-bit
fdecstp instruction.
FDECSTP
D9 F6
8087+
16/32/64-bit
fdisi instruction.
FDISI
9B DB E1
8087+
16/32/64-bit
fdiv instruction.
FDIV m64fp
DC /6
8087+
16/32/64-bit
FDIV m32fp
D8 /6
8087+
16/32/64-bit
fdiv instruction.
FDIV ST(0), ST(i)
D8 F0+i
8087+
16/32/64-bit
FDIV ST(i), ST(0)
DC F8+i
8087+
16/32/64-bit
fdivp instruction.
FDIVP ST(i), ST(0)
DE F8+i
8087+
16/32/64-bit
fdivr instruction.
FDIVR m64fp
DC /7
8087+
16/32/64-bit
FDIVR m32fp
D8 /7
8087+
16/32/64-bit
fdivr instruction.
FDIVR ST(0), ST(i)
D8 F8+i
8087+
16/32/64-bit
FDIVR ST(i), ST(0)
DC F0+i
8087+
16/32/64-bit
fdivrp instruction.
FDIVRP ST(i), ST(0)
DE F0+i
8087+
16/32/64-bit
femms instruction.
FEMMS
0F 0E
3DNOW
16/32/64-bit
feni instruction.
FENI
9B DB E0
8087+
16/32/64-bit
ffree instruction.
FFREE ST(i)
DD C0+i
8087+
16/32/64-bit
ffreep instruction.
FFREEP ST(i)
DF C0+i
8087+
16/32/64-bit
fiadd instruction.
FIADD m32int
DA /0
8087+
16/32/64-bit
FIADD m16int
DE /0
8087+
16/32/64-bit
ficom instruction.
FICOM m32int
DA /2
8087+
16/32/64-bit
FICOM m16int
DE /2
8087+
16/32/64-bit
ficomp instruction.
FICOMP m32int
DA /3
8087+
16/32/64-bit
FICOMP m16int
DE /3
8087+
16/32/64-bit
fidiv instruction.
FIDIV m32int
DA /6
8087+
16/32/64-bit
FIDIV m16int
DE /6
8087+
16/32/64-bit
fidivr instruction.
FIDIVR m32int
DA /7
8087+
16/32/64-bit
FIDIVR m16int
DE /7
8087+
16/32/64-bit
fild instruction.
FILD m64int
DF /5
8087+
16/32/64-bit
FILD m32int
DB /0
8087+
16/32/64-bit
FILD m16int
DF /0
8087+
16/32/64-bit
fimul instruction.
FIMUL m32int
DA /1
8087+
16/32/64-bit
FIMUL m16int
DE /1
8087+
16/32/64-bit
fincstp instruction.
FINCSTP
D9 F7
8087+
16/32/64-bit
finit instruction.
FINIT
9B DB E3
8087+
16/32/64-bit
fist instruction.
FIST m32int
DB /2
8087+
16/32/64-bit
FIST m16int
DF /2
8087+
16/32/64-bit
fistp instruction.
FISTP m64int
DF /7
8087+
16/32/64-bit
FISTP m32int
DB /3
8087+
16/32/64-bit
FISTP m16int
DF /3
8087+
16/32/64-bit
fisttp instruction.
FISTTP m64int
DD /1
8087+ and SSE3
16/32/64-bit
FISTTP m32int
DB /1
8087+ and SSE3
16/32/64-bit
FISTTP m16int
DF /1
8087+ and SSE3
16/32/64-bit
fisub instruction.
FISUB m32int
DA /4
8087+
16/32/64-bit
FISUB m16int
DE /4
8087+
16/32/64-bit
fisubr instruction.
FISUBR m32int
DA /5
8087+
16/32/64-bit
FISUBR m16int
DE /5
8087+
16/32/64-bit
fld instruction.
FLD ST(i)
D9 C0+i
8087+
16/32/64-bit
fld instruction.
FLD m80fp
DB /5
8087+
16/32/64-bit
FLD m64fp
DD /0
8087+
16/32/64-bit
FLD m32fp
D9 /0
8087+
16/32/64-bit
fld1 instruction.
FLD1
D9 E8
8087+
16/32/64-bit
fldcw instruction.
FLDCW m2byte
D9 /5
8087+
16/32/64-bit
fldenv instruction.
FLDENV m28byte
o32 D9 /4
387+
16/32/64-bit
FLDENV m14byte
o16 D9 /4
8087+
16/32/64-bit
fldl2e instruction.
FLDL2E
D9 EA
8087+
16/32/64-bit
fldl2t instruction.
FLDL2T
D9 E9
8087+
16/32/64-bit
fldlg2 instruction.
FLDLG2
D9 EC
8087+
16/32/64-bit
fldln2 instruction.
FLDLN2
D9 ED
8087+
16/32/64-bit
fldpi instruction.
FLDPI
D9 EB
8087+
16/32/64-bit
fldz instruction.
FLDZ
D9 EE
8087+
16/32/64-bit
fmul instruction.
FMUL m64fp
DC /1
8087+
16/32/64-bit
FMUL m32fp
D8 /1
8087+
16/32/64-bit
fmul instruction.
FMUL ST(0), ST(i)
D8 C8+i
8087+
16/32/64-bit
FMUL ST(i), ST(0)
DC C8+i
8087+
16/32/64-bit
fmulp instruction.
FMULP ST(i), ST(0)
DE C8+i
8087+
16/32/64-bit
fnclex instruction.
FNCLEX
DB E2
8087+
16/32/64-bit
fndisi instruction.
FNDISI
DB E1
8087+
16/32/64-bit
fneni instruction.
FNENI
DB E0
8087+
16/32/64-bit
fninit instruction.
FNINIT
DB E3
8087+
16/32/64-bit
fnop instruction.
FNOP
D9 D0
8087+
16/32/64-bit
fnsave instruction.
FNSAVE m108byte
o32 DD /6
387+
16/32/64-bit
FNSAVE m94byte
o16 DD /6
8087+
16/32/64-bit
fnsetpm instruction.
FNSETPM
DB E4
287+
16/32/64-bit
fnstcw instruction.
FNSTCW m2byte
D9 /7
8087+
16/32/64-bit
fnstdw instruction.
FNSTDW AX
DF E1
387 SL
16/32-bit
fnstenv instruction.
FNSTENV m28byte
o32 D9 /6
387+
16/32/64-bit
FNSTENV m14byte
o16 D9 /6
8087+
16/32/64-bit
fnstsg instruction.
FNSTSG AX
DF E2
387 SL
16/32-bit
fnstsw instruction.
FNSTSW AX
DF E0
287+
16/32/64-bit
fnstsw instruction.
FNSTSW m2byte
DD /7
8087+
16/32/64-bit
fpatan instruction.
FPATAN
D9 F3
8087+
16/32/64-bit
fprem instruction.
FPREM
D9 F8
8087+
16/32/64-bit
fprem1 instruction.
FPREM1
D9 F5
387+
16/32/64-bit
fptan instruction.
FPTAN
D9 F2
8087+
16/32/64-bit
frndint instruction.
FRNDINT
D9 FC
8087+
16/32/64-bit
frstor instruction.
FRSTOR m108byte
o32 DD /4
387+
16/32/64-bit
FRSTOR m94byte
o16 DD /4
8087+
16/32/64-bit
frstpm instruction.
FRSTPM
DB E5
287 XL
16/32-bit
fsave instruction.
FSAVE m108byte
9B o32 DD /6
387+
16/32/64-bit
FSAVE m94byte
9B o16 DD /6
8087+
16/32/64-bit
fscale instruction.
FSCALE
D9 FD
8087+
16/32/64-bit
fsetpm instruction.
FSETPM
9B DB E4
287+
16/32/64-bit
fsin instruction.
FSIN
D9 FE
387+
16/32/64-bit
fsincos instruction.
FSINCOS
D9 FB
387+
16/32/64-bit
fsqrt instruction.
FSQRT
D9 FA
8087+
16/32/64-bit
fst instruction.
FST ST(i)
DD D0+i
8087+
16/32/64-bit
fst instruction.
FST m64fp
DD /2
8087+
16/32/64-bit
FST m32fp
D9 /2
8087+
16/32/64-bit
fstcw instruction.
FSTCW m2byte
9B D9 /7
8087+
16/32/64-bit
fstdw instruction.
FSTDW AX
9B DF E1
387 SL
16/32-bit
fstenv instruction.
FSTENV m28byte
9B o32 D9 /6
387+
16/32/64-bit
FSTENV m14byte
9B o16 D9 /6
8087+
16/32/64-bit
fstp instruction.
FSTP ST(i)
DD D8+i
8087+
16/32/64-bit
fstp instruction.
FSTP m80fp
DB /7
8087+
16/32/64-bit
FSTP m64fp
DD /3
8087+
16/32/64-bit
FSTP m32fp
D9 /3
8087+
16/32/64-bit
fstpnce instruction.
FSTPNCE ST(i)
D9 D8+i
8087+
16/32/64-bit
fstsg instruction.
FSTSG AX
9B DF E2
387 SL
16/32-bit
fstsw instruction.
FSTSW AX
9B DF E0
287+
16/32/64-bit
fstsw instruction.
FSTSW m2byte
9B DD /7
8087+
16/32/64-bit
fsub instruction.
FSUB m64fp
DC /4
8087+
16/32/64-bit
FSUB m32fp
D8 /4
8087+
16/32/64-bit
fsub instruction.
FSUB ST(0), ST(i)
D8 E0+i
8087+
16/32/64-bit
FSUB ST(i), ST(0)
DC E8+i
8087+
16/32/64-bit
fsubp instruction.
FSUBP ST(i), ST(0)
DE E8+i
8087+
16/32/64-bit
fsubr instruction.
FSUBR m64fp
DC /5
8087+
16/32/64-bit
FSUBR m32fp
D8 /5
8087+
16/32/64-bit
fsubr instruction.
FSUBR ST(0), ST(i)
D8 E8+i
8087+
16/32/64-bit
FSUBR ST(i), ST(0)
DC E0+i
8087+
16/32/64-bit
fsubrp instruction.
FSUBRP ST(i), ST(0)
DE E0+i
8087+
16/32/64-bit
ftst instruction.
FTST
D9 E4
8087+
16/32/64-bit
fucom instruction.
FUCOM ST(i)
DD E0+i
8087+
16/32/64-bit
fucomi instruction.
FUCOMI ST, ST(i)
DB E8+i
8087+ and CMOV
16/32/64-bit
fucomip instruction.
FUCOMIP ST, ST(i)
DF E8+i
8087+ and CMOV
16/32/64-bit
fucomp instruction.
FUCOMP ST(i)
DD E8+i
8087+
16/32/64-bit
fucompp instruction.
FUCOMPP
DA E9
387+
16/32/64-bit
fxam instruction.
FXAM
D9 E5
8087+
16/32/64-bit
fxch instruction.
FXCH ST(i)
D9 C8+i
8087+
16/32/64-bit
fxrstor instruction.
FXRSTOR m512byte
NP 0F AE /1
FXSR
16/32/64-bit
fxrstor64 instruction.
FXRSTOR64 m512byte
NP o64 0F AE /1
FXSR
64-bit
fxsave instruction.
FXSAVE m512byte
NP 0F AE /0
FXSR
16/32/64-bit
fxsave64 instruction.
FXSAVE64 m512byte
NP o64 0F AE /0
FXSR
64-bit
fxtract instruction.
FXTRACT
D9 F4
8087+
16/32/64-bit
fyl2x instruction.
FYL2X
D9 F1
8087+
16/32/64-bit
fyl2xp1 instruction.
FYL2XP1
D9 F9
8087+
16/32/64-bit
getsec instruction.
GETSEC
NP 0F 37
SMX
16/32/64-bit
getsecq instruction.
GETSECQ
NP o64 0F 37
SMX
64-bit
gf2p8affineinvqb instruction.
GF2P8AFFINEINVQB xmm1, xmm2/m128, imm8
66 0F 3A CF /r ib
GFNI
16/32/64-bit
gf2p8affineinvqb instruction.
GF2P8AFFINEINVQB xmm1, xmm2/m128, imm8
66 0F 3A CF /r ib
GFNI
16/32/64-bit
gf2p8affineinvqb instruction.
GF2P8AFFINEINVQB xmm1, xmm2/m128, imm8
66 0F 3A CF /r ib
GFNI
16/32/64-bit
gf2p8affineinvqb instruction.
GF2P8AFFINEINVQB xmm1, xmm2/m128, imm8
66 0F 3A CF /r ib
GFNI
16/32/64-bit
gf2p8affineqb instruction.
GF2P8AFFINEQB xmm1, xmm2/m128, imm8
66 0F 3A CE /r ib
GFNI
16/32/64-bit
gf2p8affineqb instruction.
GF2P8AFFINEQB xmm1, xmm2/m128, imm8
66 0F 3A CE /r ib
GFNI
16/32/64-bit
gf2p8affineqb instruction.
GF2P8AFFINEQB xmm1, xmm2/m128, imm8
66 0F 3A CE /r ib
GFNI
16/32/64-bit
gf2p8affineqb instruction.
GF2P8AFFINEQB xmm1, xmm2/m128, imm8
66 0F 3A CE /r ib
GFNI
16/32/64-bit
gf2p8mulb instruction.
GF2P8MULB xmm1, xmm2/m128
66 0F 38 CF /r
GFNI
16/32/64-bit
gf2p8mulb instruction.
GF2P8MULB xmm1, xmm2/m128
66 0F 38 CF /r
GFNI
16/32/64-bit
haddpd instruction.
HADDPD xmm1, xmm2/m128
66 0F 7C /r
SSE3
16/32/64-bit
haddpd instruction.
HADDPD xmm1, xmm2/m128
66 0F 7C /r
SSE3
16/32/64-bit
haddps instruction.
HADDPS xmm1, xmm2/m128
F2 0F 7C /r
SSE3
16/32/64-bit
haddps instruction.
HADDPS xmm1, xmm2/m128
F2 0F 7C /r
SSE3
16/32/64-bit
hlt instruction.
HLT
F4
8086+
16/32/64-bit
hreset instruction.
HRESET imm8, <EAX>
F3 0F 3A F0 C0 ib
HRESET
16/32/64-bit
hreset instruction.
HRESET imm8, <EAX>
F3 0F 3A F0 C0 ib
HRESET
16/32/64-bit
hsubpd instruction.
HSUBPD xmm1, xmm2/m128
66 0F 7D /r
SSE3
16/32/64-bit
hsubpd instruction.
HSUBPD xmm1, xmm2/m128
66 0F 7D /r
SSE3
16/32/64-bit
hsubps instruction.
HSUBPS xmm1, xmm2/m128
F2 0F 7D /r
SSE3
16/32/64-bit
hsubps instruction.
HSUBPS xmm1, xmm2/m128
F2 0F 7D /r
SSE3
16/32/64-bit
ibts instruction.
IBTS r/m16, r16
o16 0F A7 /r
386 A0
16/32-bit
ibts instruction.
IBTS r/m16, r16
o16 0F A7 /r
386 A0
16/32-bit
ibts instruction.
IBTS r/m32, r32
o32 0F A7 /r
386 A0
16/32-bit
ibts instruction.
IBTS r/m32, r32
o32 0F A7 /r
386 A0
16/32-bit
idiv instruction.
IDIV r/m8
F6 /7
8086+
16/32/64-bit
idiv instruction.
IDIV r/m16
o16 F7 /7
8086+
16/32/64-bit
idiv instruction.
IDIV r/m32
o32 F7 /7
386+
16/32/64-bit
idiv instruction.
IDIV r/m64
o64 F7 /7
X64
64-bit
idiv instruction.
IDIV r/m64
o64 F7 /7
X64
64-bit
IDIV r/m32
o32 F7 /7
386+
16/32/64-bit
IDIV r/m16
o16 F7 /7
8086+
16/32/64-bit
IDIV r/m8
F6 /7
8086+
16/32/64-bit
imul instruction.
IMUL r/m8
F6 /5
8086+
16/32/64-bit
imul instruction.
IMUL r/m16
o16 F7 /5
8086+
16/32/64-bit
imul instruction.
IMUL r/m32
o32 F7 /5
386+
16/32/64-bit
imul instruction.
IMUL r/m64
o64 F7 /5
X64
64-bit
imul instruction.
IMUL r/m64
o64 F7 /5
X64
64-bit
IMUL r/m32
o32 F7 /5
386+
16/32/64-bit
IMUL r/m16
o16 F7 /5
8086+
16/32/64-bit
IMUL r/m8
F6 /5
8086+
16/32/64-bit
imul instruction.
IMUL r16, r/m16
o16 0F AF /r
386+
16/32/64-bit
imul instruction.
IMUL r32, r/m32
o32 0F AF /r
386+
16/32/64-bit
imul instruction.
IMUL r64, r/m64
o64 0F AF /r
X64
64-bit
imul instruction.
IMUL r16, r/m16
o16 0F AF /r
386+
16/32/64-bit
imul instruction.
IMUL r32, r/m32
o32 0F AF /r
386+
16/32/64-bit
imul instruction.
IMUL r64, r/m64
o64 0F AF /r
X64
64-bit
imul instruction.
IMUL r16, r/m16, imm16
o16 69 /r iw
186+
16/32/64-bit
IMUL r16, r/m16, imm8
o16 6B /r ib
186+
16/32/64-bit
imul instruction.
IMUL r32, r/m32, imm32
o32 69 /r id
386+
16/32/64-bit
IMUL r32, r/m32, imm8
o32 6B /r ib
386+
16/32/64-bit
imul instruction.
IMUL r64, r/m64, imm32
o64 69 /r id
X64
64-bit
IMUL r64, r/m64, imm8
o64 6B /r ib
X64
64-bit
imul instruction.
IMUL r16, r/m16, imm16
o16 69 /r iw
186+
16/32/64-bit
IMUL r16, r/m16, imm8
o16 6B /r ib
186+
16/32/64-bit
imul instruction.
IMUL r32, r/m32, imm32
o32 69 /r id
386+
16/32/64-bit
IMUL r32, r/m32, imm8
o32 6B /r ib
386+
16/32/64-bit
imul instruction.
IMUL r64, r/m64, imm32
o64 69 /r id
X64
64-bit
IMUL r64, r/m64, imm8
o64 6B /r ib
X64
64-bit
imul instruction.
IMUL r16, r/m16, imm16
o16 69 /r iw
186+
16/32/64-bit
IMUL r16, r/m16, imm8
o16 6B /r ib
186+
16/32/64-bit
imul instruction.
IMUL r32, r/m32, imm32
o32 69 /r id
386+
16/32/64-bit
IMUL r32, r/m32, imm8
o32 6B /r ib
386+
16/32/64-bit
imul instruction.
IMUL r16, r/m16, imm16
o16 69 /r iw
186+
16/32/64-bit
IMUL r16, r/m16, imm8
o16 6B /r ib
186+
16/32/64-bit
imul instruction.
IMUL r32, r/m32, imm32
o32 69 /r id
386+
16/32/64-bit
IMUL r32, r/m32, imm8
o32 6B /r ib
386+
16/32/64-bit
in instruction.
IN AL, DX
EC
8086+
16/32/64-bit
in instruction.
IN AX, DX
o16 ED
8086+
16/32/64-bit
in instruction.
IN EAX, DX
o32 ED
386+
16/32/64-bit
in instruction.
IN AL, imm8
E4 ib
8086+
16/32/64-bit
in instruction.
IN AX, imm8
o16 E5 ib
8086+
16/32/64-bit
in instruction.
IN EAX, imm8
o32 E5 ib
386+
16/32/64-bit
in instruction.
IN AL, imm8
E4 ib
8086+
16/32/64-bit
in instruction.
IN AX, imm8
o16 E5 ib
8086+
16/32/64-bit
in instruction.
IN EAX, imm8
o32 E5 ib
386+
16/32/64-bit
inc instruction.
INC r/m8
FE /0
8086+
16/32/64-bit
inc instruction.
INC r/m16
o16 FF /0
8086+
16/32/64-bit
INC r16
o16 40+rw
8086+
16/32-bit
inc instruction.
INC r/m32
o32 FF /0
386+
16/32/64-bit
INC r32
o32 40+rd
386+
16/32-bit
inc instruction.
INC r/m64
o64 FF /0
X64
64-bit
inc instruction.
INC r/m64
o64 FF /0
X64
64-bit
INC r/m32
o32 FF /0
386+
16/32/64-bit
INC r/m16
o16 FF /0
8086+
16/32/64-bit
INC r/m8
FE /0
8086+
16/32/64-bit
incsspd instruction.
INCSSPD r32
F3 0F AE /5
CET_SS
16/32/64-bit
incsspq instruction.
INCSSPQ r64
F3 o64 0F AE /5
CET_SS
64-bit
insb instruction.
INSB
6C
186+
16/32/64-bit
insd instruction.
INSD
o32 6D
386+
16/32/64-bit
insertps instruction.
INSERTPS xmm1, xmm2/m32, imm8
66 0F 3A 21 /r ib
SSE4.1
16/32/64-bit
insertps instruction.
INSERTPS xmm1, xmm2/m32, imm8
66 0F 3A 21 /r ib
SSE4.1
16/32/64-bit
insertps instruction.
INSERTPS xmm1, xmm2/m32, imm8
66 0F 3A 21 /r ib
SSE4.1
16/32/64-bit
insertps instruction.
INSERTPS xmm1, xmm2/m32, imm8
66 0F 3A 21 /r ib
SSE4.1
16/32/64-bit
insertq instruction.
INSERTQ xmm1, xmm2
F2 0F 79 /r
SSE4A
16/32/64-bit
insertq instruction.
INSERTQ xmm1, xmm2, imm8, imm8
F2 0F 78 /r ib ib
SSE4A
16/32/64-bit
insertq instruction.
INSERTQ xmm1, xmm2, imm8, imm8
F2 0F 78 /r ib ib
SSE4A
16/32/64-bit
insw instruction.
INSW
o16 6D
186+
16/32/64-bit
int instruction.
INT imm8
CD ib
8086+
16/32/64-bit
int instruction.
INT imm8
CD ib
8086+
16/32/64-bit
int1 instruction.
INT1
F1
386+
16/32/64-bit
int3 instruction.
INT3
CC
8086+
16/32/64-bit
into instruction.
INTO
CE
8086+
16/32-bit
invd instruction.
INVD
0F 08
486+
16/32/64-bit
invept instruction.
INVEPT r32, m128
66 0F 38 80 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 20]
16/32-bit
invept instruction.
INVEPT r64, m128
66 0F 38 80 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 20]
64-bit
invlpg instruction.
INVLPG m
0F 01 /7
486+
16/32/64-bit
invlpga instruction.
INVLPGA
a64 0F 01 DF
SVM
64-bit
INVLPGA
a32 0F 01 DF
SVM
16/32/64-bit
INVLPGA
a16 0F 01 DF
SVM
16/32-bit
invlpgb instruction.
INVLPGB
a64 NP 0F 01 FE
INVLPGB
64-bit
INVLPGB
a32 NP 0F 01 FE
INVLPGB
16/32/64-bit
INVLPGB
a16 NP 0F 01 FE
INVLPGB
16/32-bit
invpcid instruction.
INVPCID r32, m128
66 0F 38 82 /r
INVPCID
16/32-bit
invpcid instruction.
INVPCID r64, m128
66 0F 38 82 /r
INVPCID
64-bit
invvpid instruction.
INVVPID r32, m128
66 0F 38 81 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 32]
16/32-bit
invvpid instruction.
INVVPID r64, m128
66 0F 38 81 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 32]
64-bit
iret instruction.
IRET
o16 CF
8086+
16/32/64-bit
iretd instruction.
IRETD
o32 CF
386+
16/32/64-bit
iretq instruction.
IRETQ
o64 CF
X64
64-bit
ja instruction.
JA rel8
o64 77 cb
X64
64-bit
JA rel32
o64 0F 87 cd
X64
64-bit
JA rel8
o32 77 cb
386+
16/32-bit
JA rel32
o32 0F 87 cd
386+
16/32-bit
JA rel8
o16 77 cb
8086+
16/32/64-bit
JA rel16
o16 0F 87 cw
386+
16/32/64-bit
ja instruction.
JA rel8
o64 77 cb
X64
64-bit
JA rel32
o64 0F 87 cd
X64
64-bit
JA rel8
o32 77 cb
386+
16/32-bit
JA rel32
o32 0F 87 cd
386+
16/32-bit
JA rel8
o16 77 cb
8086+
16/32/64-bit
JA rel16
o16 0F 87 cw
386+
16/32/64-bit
jae instruction.
JAE rel8
o64 73 cb
X64
64-bit
JAE rel32
o64 0F 83 cd
X64
64-bit
JAE rel8
o32 73 cb
386+
16/32-bit
JAE rel32
o32 0F 83 cd
386+
16/32-bit
JAE rel8
o16 73 cb
8086+
16/32/64-bit
JAE rel16
o16 0F 83 cw
386+
16/32/64-bit
jae instruction.
JAE rel8
o64 73 cb
X64
64-bit
JAE rel32
o64 0F 83 cd
X64
64-bit
JAE rel8
o32 73 cb
386+
16/32-bit
JAE rel32
o32 0F 83 cd
386+
16/32-bit
JAE rel8
o16 73 cb
8086+
16/32/64-bit
JAE rel16
o16 0F 83 cw
386+
16/32/64-bit
jb instruction.
JB rel8
o64 72 cb
X64
64-bit
JB rel32
o64 0F 82 cd
X64
64-bit
JB rel8
o32 72 cb
386+
16/32-bit
JB rel32
o32 0F 82 cd
386+
16/32-bit
JB rel8
o16 72 cb
8086+
16/32/64-bit
JB rel16
o16 0F 82 cw
386+
16/32/64-bit
jb instruction.
JB rel8
o64 72 cb
X64
64-bit
JB rel32
o64 0F 82 cd
X64
64-bit
JB rel8
o32 72 cb
386+
16/32-bit
JB rel32
o32 0F 82 cd
386+
16/32-bit
JB rel8
o16 72 cb
8086+
16/32/64-bit
JB rel16
o16 0F 82 cw
386+
16/32/64-bit
jbe instruction.
JBE rel8
o64 76 cb
X64
64-bit
JBE rel32
o64 0F 86 cd
X64
64-bit
JBE rel8
o32 76 cb
386+
16/32-bit
JBE rel32
o32 0F 86 cd
386+
16/32-bit
JBE rel8
o16 76 cb
8086+
16/32/64-bit
JBE rel16
o16 0F 86 cw
386+
16/32/64-bit
jbe instruction.
JBE rel8
o64 76 cb
X64
64-bit
JBE rel32
o64 0F 86 cd
X64
64-bit
JBE rel8
o32 76 cb
386+
16/32-bit
JBE rel32
o32 0F 86 cd
386+
16/32-bit
JBE rel8
o16 76 cb
8086+
16/32/64-bit
JBE rel16
o16 0F 86 cw
386+
16/32/64-bit
jc instruction.
JB rel8
o64 72 cb
X64
64-bit
JB rel32
o64 0F 82 cd
X64
64-bit
JB rel8
o32 72 cb
386+
16/32-bit
JB rel32
o32 0F 82 cd
386+
16/32-bit
JB rel8
o16 72 cb
8086+
16/32/64-bit
JB rel16
o16 0F 82 cw
386+
16/32/64-bit
jc instruction.
JB rel8
o64 72 cb
X64
64-bit
JB rel32
o64 0F 82 cd
X64
64-bit
JB rel8
o32 72 cb
386+
16/32-bit
JB rel32
o32 0F 82 cd
386+
16/32-bit
JB rel8
o16 72 cb
8086+
16/32/64-bit
JB rel16
o16 0F 82 cw
386+
16/32/64-bit
jcxz instruction.
JCXZ rel8
a16 o16 E3 cb
8086+
16/32-bit
jcxz instruction.
JCXZ rel8
a16 o16 E3 cb
8086+
16/32-bit
je instruction.
JE rel8
o64 74 cb
X64
64-bit
JE rel32
o64 0F 84 cd
X64
64-bit
JE rel8
o32 74 cb
386+
16/32-bit
JE rel32
o32 0F 84 cd
386+
16/32-bit
JE rel8
o16 74 cb
8086+
16/32/64-bit
JE rel16
o16 0F 84 cw
386+
16/32/64-bit
je instruction.
JE rel8
o64 74 cb
X64
64-bit
JE rel32
o64 0F 84 cd
X64
64-bit
JE rel8
o32 74 cb
386+
16/32-bit
JE rel32
o32 0F 84 cd
386+
16/32-bit
JE rel8
o16 74 cb
8086+
16/32/64-bit
JE rel16
o16 0F 84 cw
386+
16/32/64-bit
jecxz instruction.
JECXZ rel8
a32 o32 E3 cb
386+
16/32-bit
jecxz instruction.
JECXZ rel8
a32 o32 E3 cb
386+
16/32-bit
jg instruction.
JG rel8
o64 7F cb
X64
64-bit
JG rel32
o64 0F 8F cd
X64
64-bit
JG rel8
o32 7F cb
386+
16/32-bit
JG rel32
o32 0F 8F cd
386+
16/32-bit
JG rel8
o16 7F cb
8086+
16/32/64-bit
JG rel16
o16 0F 8F cw
386+
16/32/64-bit
jg instruction.
JG rel8
o64 7F cb
X64
64-bit
JG rel32
o64 0F 8F cd
X64
64-bit
JG rel8
o32 7F cb
386+
16/32-bit
JG rel32
o32 0F 8F cd
386+
16/32-bit
JG rel8
o16 7F cb
8086+
16/32/64-bit
JG rel16
o16 0F 8F cw
386+
16/32/64-bit
jge instruction.
JGE rel8
o64 7D cb
X64
64-bit
JGE rel32
o64 0F 8D cd
X64
64-bit
JGE rel8
o32 7D cb
386+
16/32-bit
JGE rel32
o32 0F 8D cd
386+
16/32-bit
JGE rel8
o16 7D cb
8086+
16/32/64-bit
JGE rel16
o16 0F 8D cw
386+
16/32/64-bit
jge instruction.
JGE rel8
o64 7D cb
X64
64-bit
JGE rel32
o64 0F 8D cd
X64
64-bit
JGE rel8
o32 7D cb
386+
16/32-bit
JGE rel32
o32 0F 8D cd
386+
16/32-bit
JGE rel8
o16 7D cb
8086+
16/32/64-bit
JGE rel16
o16 0F 8D cw
386+
16/32/64-bit
jl instruction.
JL rel8
o64 7C cb
X64
64-bit
JL rel32
o64 0F 8C cd
X64
64-bit
JL rel8
o32 7C cb
386+
16/32-bit
JL rel32
o32 0F 8C cd
386+
16/32-bit
JL rel8
o16 7C cb
8086+
16/32/64-bit
JL rel16
o16 0F 8C cw
386+
16/32/64-bit
jl instruction.
JL rel8
o64 7C cb
X64
64-bit
JL rel32
o64 0F 8C cd
X64
64-bit
JL rel8
o32 7C cb
386+
16/32-bit
JL rel32
o32 0F 8C cd
386+
16/32-bit
JL rel8
o16 7C cb
8086+
16/32/64-bit
JL rel16
o16 0F 8C cw
386+
16/32/64-bit
jle instruction.
JLE rel8
o64 7E cb
X64
64-bit
JLE rel32
o64 0F 8E cd
X64
64-bit
JLE rel8
o32 7E cb
386+
16/32-bit
JLE rel32
o32 0F 8E cd
386+
16/32-bit
JLE rel8
o16 7E cb
8086+
16/32/64-bit
JLE rel16
o16 0F 8E cw
386+
16/32/64-bit
jle instruction.
JLE rel8
o64 7E cb
X64
64-bit
JLE rel32
o64 0F 8E cd
X64
64-bit
JLE rel8
o32 7E cb
386+
16/32-bit
JLE rel32
o32 0F 8E cd
386+
16/32-bit
JLE rel8
o16 7E cb
8086+
16/32/64-bit
JLE rel16
o16 0F 8E cw
386+
16/32/64-bit
jmp instruction.
JMP r/m16
o16 FF /4
8086+
16/32/64-bit
jmp instruction.
JMP r/m32
o32 FF /4
386+
16/32-bit
jmp instruction.
JMP r/m64
o64 FF /4
X64
64-bit
jmp instruction.
JMP m16:64
o64 FF /5
X64
64-bit
JMP r/m64
o64 FF /4
X64
64-bit
JMP m16:32
o32 FF /5
386+
16/32/64-bit
JMP r/m32
o32 FF /4
386+
16/32-bit
JMP m16:16
o16 FF /5
8086+
16/32/64-bit
JMP r/m16
o16 FF /4
8086+
16/32/64-bit
jmp instruction.
JMP rel32
o64 E9 cd
X64
64-bit
JMP rel8
o64 EB cb
X64
64-bit
JMP rel32
o32 E9 cd
386+
16/32-bit
JMP rel8
o32 EB cb
386+
16/32-bit
JMP rel16
o16 E9 cw
8086+
16/32/64-bit
JMP rel8
o16 EB cb
8086+
16/32/64-bit
jmp instruction.
JMP rel32
o64 E9 cd
X64
64-bit
JMP rel8
o64 EB cb
X64
64-bit
JMP rel32
o32 E9 cd
386+
16/32-bit
JMP rel8
o32 EB cb
386+
16/32-bit
JMP rel16
o16 E9 cw
8086+
16/32/64-bit
JMP rel8
o16 EB cb
8086+
16/32/64-bit
jmpe instruction.
JMPE r/m16
o16 0F 00 /6
IA-64
16/32-bit
jmpe instruction.
JMPE r/m32
o32 0F 00 /6
IA-64
16/32-bit
jmpe instruction.
JMPE r/m32
o32 0F 00 /6
IA-64
16/32-bit
JMPE r/m16
o16 0F 00 /6
IA-64
16/32-bit
jmpe instruction.
JMPE disp32
o32 0F B8 cd
IA-64
16/32-bit
JMPE disp16
o16 0F B8 cw
IA-64
16/32-bit
jmpe instruction.
JMPE disp32
o32 0F B8 cd
IA-64
16/32-bit
JMPE disp16
o16 0F B8 cw
IA-64
16/32-bit
jna instruction.
JBE rel8
o64 76 cb
X64
64-bit
JBE rel32
o64 0F 86 cd
X64
64-bit
JBE rel8
o32 76 cb
386+
16/32-bit
JBE rel32
o32 0F 86 cd
386+
16/32-bit
JBE rel8
o16 76 cb
8086+
16/32/64-bit
JBE rel16
o16 0F 86 cw
386+
16/32/64-bit
jna instruction.
JBE rel8
o64 76 cb
X64
64-bit
JBE rel32
o64 0F 86 cd
X64
64-bit
JBE rel8
o32 76 cb
386+
16/32-bit
JBE rel32
o32 0F 86 cd
386+
16/32-bit
JBE rel8
o16 76 cb
8086+
16/32/64-bit
JBE rel16
o16 0F 86 cw
386+
16/32/64-bit
jnae instruction.
JB rel8
o64 72 cb
X64
64-bit
JB rel32
o64 0F 82 cd
X64
64-bit
JB rel8
o32 72 cb
386+
16/32-bit
JB rel32
o32 0F 82 cd
386+
16/32-bit
JB rel8
o16 72 cb
8086+
16/32/64-bit
JB rel16
o16 0F 82 cw
386+
16/32/64-bit
jnae instruction.
JB rel8
o64 72 cb
X64
64-bit
JB rel32
o64 0F 82 cd
X64
64-bit
JB rel8
o32 72 cb
386+
16/32-bit
JB rel32
o32 0F 82 cd
386+
16/32-bit
JB rel8
o16 72 cb
8086+
16/32/64-bit
JB rel16
o16 0F 82 cw
386+
16/32/64-bit
jnb instruction.
JAE rel8
o64 73 cb
X64
64-bit
JAE rel32
o64 0F 83 cd
X64
64-bit
JAE rel8
o32 73 cb
386+
16/32-bit
JAE rel32
o32 0F 83 cd
386+
16/32-bit
JAE rel8
o16 73 cb
8086+
16/32/64-bit
JAE rel16
o16 0F 83 cw
386+
16/32/64-bit
jnb instruction.
JAE rel8
o64 73 cb
X64
64-bit
JAE rel32
o64 0F 83 cd
X64
64-bit
JAE rel8
o32 73 cb
386+
16/32-bit
JAE rel32
o32 0F 83 cd
386+
16/32-bit
JAE rel8
o16 73 cb
8086+
16/32/64-bit
JAE rel16
o16 0F 83 cw
386+
16/32/64-bit
jnbe instruction.
JA rel8
o64 77 cb
X64
64-bit
JA rel32
o64 0F 87 cd
X64
64-bit
JA rel8
o32 77 cb
386+
16/32-bit
JA rel32
o32 0F 87 cd
386+
16/32-bit
JA rel8
o16 77 cb
8086+
16/32/64-bit
JA rel16
o16 0F 87 cw
386+
16/32/64-bit
jnbe instruction.
JA rel8
o64 77 cb
X64
64-bit
JA rel32
o64 0F 87 cd
X64
64-bit
JA rel8
o32 77 cb
386+
16/32-bit
JA rel32
o32 0F 87 cd
386+
16/32-bit
JA rel8
o16 77 cb
8086+
16/32/64-bit
JA rel16
o16 0F 87 cw
386+
16/32/64-bit
jnc instruction.
JAE rel8
o64 73 cb
X64
64-bit
JAE rel32
o64 0F 83 cd
X64
64-bit
JAE rel8
o32 73 cb
386+
16/32-bit
JAE rel32
o32 0F 83 cd
386+
16/32-bit
JAE rel8
o16 73 cb
8086+
16/32/64-bit
JAE rel16
o16 0F 83 cw
386+
16/32/64-bit
jnc instruction.
JAE rel8
o64 73 cb
X64
64-bit
JAE rel32
o64 0F 83 cd
X64
64-bit
JAE rel8
o32 73 cb
386+
16/32-bit
JAE rel32
o32 0F 83 cd
386+
16/32-bit
JAE rel8
o16 73 cb
8086+
16/32/64-bit
JAE rel16
o16 0F 83 cw
386+
16/32/64-bit
jne instruction.
JNE rel8
o64 75 cb
X64
64-bit
JNE rel32
o64 0F 85 cd
X64
64-bit
JNE rel8
o32 75 cb
386+
16/32-bit
JNE rel32
o32 0F 85 cd
386+
16/32-bit
JNE rel8
o16 75 cb
8086+
16/32/64-bit
JNE rel16
o16 0F 85 cw
386+
16/32/64-bit
jne instruction.
JNE rel8
o64 75 cb
X64
64-bit
JNE rel32
o64 0F 85 cd
X64
64-bit
JNE rel8
o32 75 cb
386+
16/32-bit
JNE rel32
o32 0F 85 cd
386+
16/32-bit
JNE rel8
o16 75 cb
8086+
16/32/64-bit
JNE rel16
o16 0F 85 cw
386+
16/32/64-bit
jng instruction.
JLE rel8
o64 7E cb
X64
64-bit
JLE rel32
o64 0F 8E cd
X64
64-bit
JLE rel8
o32 7E cb
386+
16/32-bit
JLE rel32
o32 0F 8E cd
386+
16/32-bit
JLE rel8
o16 7E cb
8086+
16/32/64-bit
JLE rel16
o16 0F 8E cw
386+
16/32/64-bit
jng instruction.
JLE rel8
o64 7E cb
X64
64-bit
JLE rel32
o64 0F 8E cd
X64
64-bit
JLE rel8
o32 7E cb
386+
16/32-bit
JLE rel32
o32 0F 8E cd
386+
16/32-bit
JLE rel8
o16 7E cb
8086+
16/32/64-bit
JLE rel16
o16 0F 8E cw
386+
16/32/64-bit
jnge instruction.
JL rel8
o64 7C cb
X64
64-bit
JL rel32
o64 0F 8C cd
X64
64-bit
JL rel8
o32 7C cb
386+
16/32-bit
JL rel32
o32 0F 8C cd
386+
16/32-bit
JL rel8
o16 7C cb
8086+
16/32/64-bit
JL rel16
o16 0F 8C cw
386+
16/32/64-bit
jnge instruction.
JL rel8
o64 7C cb
X64
64-bit
JL rel32
o64 0F 8C cd
X64
64-bit
JL rel8
o32 7C cb
386+
16/32-bit
JL rel32
o32 0F 8C cd
386+
16/32-bit
JL rel8
o16 7C cb
8086+
16/32/64-bit
JL rel16
o16 0F 8C cw
386+
16/32/64-bit
jnl instruction.
JGE rel8
o64 7D cb
X64
64-bit
JGE rel32
o64 0F 8D cd
X64
64-bit
JGE rel8
o32 7D cb
386+
16/32-bit
JGE rel32
o32 0F 8D cd
386+
16/32-bit
JGE rel8
o16 7D cb
8086+
16/32/64-bit
JGE rel16
o16 0F 8D cw
386+
16/32/64-bit
jnl instruction.
JGE rel8
o64 7D cb
X64
64-bit
JGE rel32
o64 0F 8D cd
X64
64-bit
JGE rel8
o32 7D cb
386+
16/32-bit
JGE rel32
o32 0F 8D cd
386+
16/32-bit
JGE rel8
o16 7D cb
8086+
16/32/64-bit
JGE rel16
o16 0F 8D cw
386+
16/32/64-bit
jnle instruction.
JG rel8
o64 7F cb
X64
64-bit
JG rel32
o64 0F 8F cd
X64
64-bit
JG rel8
o32 7F cb
386+
16/32-bit
JG rel32
o32 0F 8F cd
386+
16/32-bit
JG rel8
o16 7F cb
8086+
16/32/64-bit
JG rel16
o16 0F 8F cw
386+
16/32/64-bit
jnle instruction.
JG rel8
o64 7F cb
X64
64-bit
JG rel32
o64 0F 8F cd
X64
64-bit
JG rel8
o32 7F cb
386+
16/32-bit
JG rel32
o32 0F 8F cd
386+
16/32-bit
JG rel8
o16 7F cb
8086+
16/32/64-bit
JG rel16
o16 0F 8F cw
386+
16/32/64-bit
jno instruction.
JNO rel8
o64 71 cb
X64
64-bit
JNO rel32
o64 0F 81 cd
X64
64-bit
JNO rel8
o32 71 cb
386+
16/32-bit
JNO rel32
o32 0F 81 cd
386+
16/32-bit
JNO rel8
o16 71 cb
8086+
16/32/64-bit
JNO rel16
o16 0F 81 cw
386+
16/32/64-bit
jno instruction.
JNO rel8
o64 71 cb
X64
64-bit
JNO rel32
o64 0F 81 cd
X64
64-bit
JNO rel8
o32 71 cb
386+
16/32-bit
JNO rel32
o32 0F 81 cd
386+
16/32-bit
JNO rel8
o16 71 cb
8086+
16/32/64-bit
JNO rel16
o16 0F 81 cw
386+
16/32/64-bit
jnp instruction.
JNP rel8
o64 7B cb
X64
64-bit
JNP rel32
o64 0F 8B cd
X64
64-bit
JNP rel8
o32 7B cb
386+
16/32-bit
JNP rel32
o32 0F 8B cd
386+
16/32-bit
JNP rel8
o16 7B cb
8086+
16/32/64-bit
JNP rel16
o16 0F 8B cw
386+
16/32/64-bit
jnp instruction.
JNP rel8
o64 7B cb
X64
64-bit
JNP rel32
o64 0F 8B cd
X64
64-bit
JNP rel8
o32 7B cb
386+
16/32-bit
JNP rel32
o32 0F 8B cd
386+
16/32-bit
JNP rel8
o16 7B cb
8086+
16/32/64-bit
JNP rel16
o16 0F 8B cw
386+
16/32/64-bit
jns instruction.
JNS rel8
o64 79 cb
X64
64-bit
JNS rel32
o64 0F 89 cd
X64
64-bit
JNS rel8
o32 79 cb
386+
16/32-bit
JNS rel32
o32 0F 89 cd
386+
16/32-bit
JNS rel8
o16 79 cb
8086+
16/32/64-bit
JNS rel16
o16 0F 89 cw
386+
16/32/64-bit
jns instruction.
JNS rel8
o64 79 cb
X64
64-bit
JNS rel32
o64 0F 89 cd
X64
64-bit
JNS rel8
o32 79 cb
386+
16/32-bit
JNS rel32
o32 0F 89 cd
386+
16/32-bit
JNS rel8
o16 79 cb
8086+
16/32/64-bit
JNS rel16
o16 0F 89 cw
386+
16/32/64-bit
jnz instruction.
JNE rel8
o64 75 cb
X64
64-bit
JNE rel32
o64 0F 85 cd
X64
64-bit
JNE rel8
o32 75 cb
386+
16/32-bit
JNE rel32
o32 0F 85 cd
386+
16/32-bit
JNE rel8
o16 75 cb
8086+
16/32/64-bit
JNE rel16
o16 0F 85 cw
386+
16/32/64-bit
jnz instruction.
JNE rel8
o64 75 cb
X64
64-bit
JNE rel32
o64 0F 85 cd
X64
64-bit
JNE rel8
o32 75 cb
386+
16/32-bit
JNE rel32
o32 0F 85 cd
386+
16/32-bit
JNE rel8
o16 75 cb
8086+
16/32/64-bit
JNE rel16
o16 0F 85 cw
386+
16/32/64-bit
jo instruction.
JO rel8
o64 70 cb
X64
64-bit
JO rel32
o64 0F 80 cd
X64
64-bit
JO rel8
o32 70 cb
386+
16/32-bit
JO rel32
o32 0F 80 cd
386+
16/32-bit
JO rel8
o16 70 cb
8086+
16/32/64-bit
JO rel16
o16 0F 80 cw
386+
16/32/64-bit
jo instruction.
JO rel8
o64 70 cb
X64
64-bit
JO rel32
o64 0F 80 cd
X64
64-bit
JO rel8
o32 70 cb
386+
16/32-bit
JO rel32
o32 0F 80 cd
386+
16/32-bit
JO rel8
o16 70 cb
8086+
16/32/64-bit
JO rel16
o16 0F 80 cw
386+
16/32/64-bit
jp instruction.
JP rel8
o64 7A cb
X64
64-bit
JP rel32
o64 0F 8A cd
X64
64-bit
JP rel8
o32 7A cb
386+
16/32-bit
JP rel32
o32 0F 8A cd
386+
16/32-bit
JP rel8
o16 7A cb
8086+
16/32/64-bit
JP rel16
o16 0F 8A cw
386+
16/32/64-bit
jp instruction.
JP rel8
o64 7A cb
X64
64-bit
JP rel32
o64 0F 8A cd
X64
64-bit
JP rel8
o32 7A cb
386+
16/32-bit
JP rel32
o32 0F 8A cd
386+
16/32-bit
JP rel8
o16 7A cb
8086+
16/32/64-bit
JP rel16
o16 0F 8A cw
386+
16/32/64-bit
jpe instruction.
JP rel8
o64 7A cb
X64
64-bit
JP rel32
o64 0F 8A cd
X64
64-bit
JP rel8
o32 7A cb
386+
16/32-bit
JP rel32
o32 0F 8A cd
386+
16/32-bit
JP rel8
o16 7A cb
8086+
16/32/64-bit
JP rel16
o16 0F 8A cw
386+
16/32/64-bit
jpe instruction.
JP rel8
o64 7A cb
X64
64-bit
JP rel32
o64 0F 8A cd
X64
64-bit
JP rel8
o32 7A cb
386+
16/32-bit
JP rel32
o32 0F 8A cd
386+
16/32-bit
JP rel8
o16 7A cb
8086+
16/32/64-bit
JP rel16
o16 0F 8A cw
386+
16/32/64-bit
jpo instruction.
JNP rel8
o64 7B cb
X64
64-bit
JNP rel32
o64 0F 8B cd
X64
64-bit
JNP rel8
o32 7B cb
386+
16/32-bit
JNP rel32
o32 0F 8B cd
386+
16/32-bit
JNP rel8
o16 7B cb
8086+
16/32/64-bit
JNP rel16
o16 0F 8B cw
386+
16/32/64-bit
jpo instruction.
JNP rel8
o64 7B cb
X64
64-bit
JNP rel32
o64 0F 8B cd
X64
64-bit
JNP rel8
o32 7B cb
386+
16/32-bit
JNP rel32
o32 0F 8B cd
386+
16/32-bit
JNP rel8
o16 7B cb
8086+
16/32/64-bit
JNP rel16
o16 0F 8B cw
386+
16/32/64-bit
jrcxz instruction.
JRCXZ rel8
a64 o64 E3 cb
X64
64-bit
jrcxz instruction.
JRCXZ rel8
a64 o64 E3 cb
X64
64-bit
js instruction.
JS rel8
o64 78 cb
X64
64-bit
JS rel32
o64 0F 88 cd
X64
64-bit
JS rel8
o32 78 cb
386+
16/32-bit
JS rel32
o32 0F 88 cd
386+
16/32-bit
JS rel8
o16 78 cb
8086+
16/32/64-bit
JS rel16
o16 0F 88 cw
386+
16/32/64-bit
js instruction.
JS rel8
o64 78 cb
X64
64-bit
JS rel32
o64 0F 88 cd
X64
64-bit
JS rel8
o32 78 cb
386+
16/32-bit
JS rel32
o32 0F 88 cd
386+
16/32-bit
JS rel8
o16 78 cb
8086+
16/32/64-bit
JS rel16
o16 0F 88 cw
386+
16/32/64-bit
jz instruction.
JE rel8
o64 74 cb
X64
64-bit
JE rel32
o64 0F 84 cd
X64
64-bit
JE rel8
o32 74 cb
386+
16/32-bit
JE rel32
o32 0F 84 cd
386+
16/32-bit
JE rel8
o16 74 cb
8086+
16/32/64-bit
JE rel16
o16 0F 84 cw
386+
16/32/64-bit
jz instruction.
JE rel8
o64 74 cb
X64
64-bit
JE rel32
o64 0F 84 cd
X64
64-bit
JE rel8
o32 74 cb
386+
16/32-bit
JE rel32
o32 0F 84 cd
386+
16/32-bit
JE rel8
o16 74 cb
8086+
16/32/64-bit
JE rel16
o16 0F 84 cw
386+
16/32/64-bit
kaddb instruction.
KADDB k1, k2, k3
VEX.L1.66.0F.W0 4A /r
AVX512DQ
16/32/64-bit
kaddd instruction.
KADDD k1, k2, k3
VEX.L1.66.0F.W1 4A /r
AVX512BW
16/32/64-bit
kaddq instruction.
KADDQ k1, k2, k3
VEX.L1.0F.W1 4A /r
AVX512BW
16/32/64-bit
kaddw instruction.
KADDW k1, k2, k3
VEX.L1.0F.W0 4A /r
AVX512DQ
16/32/64-bit
kandb instruction.
KANDB k1, k2, k3
VEX.L1.66.0F.W0 41 /r
AVX512DQ
16/32/64-bit
kandd instruction.
KANDD k1, k2, k3
VEX.L1.66.0F.W1 41 /r
AVX512BW
16/32/64-bit
kandnb instruction.
KANDNB k1, k2, k3
VEX.L1.66.0F.W0 42 /r
AVX512DQ
16/32/64-bit
kandnd instruction.
KANDND k1, k2, k3
VEX.L1.66.0F.W1 42 /r
AVX512BW
16/32/64-bit
kandnq instruction.
KANDNQ k1, k2, k3
VEX.L1.0F.W1 42 /r
AVX512BW
16/32/64-bit
kandnw instruction.
KANDNW k1, k2, k3
VEX.L1.0F.W0 42 /r
AVX512F
16/32/64-bit
kandq instruction.
KANDQ k1, k2, k3
VEX.L1.0F.W1 41 /r
AVX512BW
16/32/64-bit
kandw instruction.
KANDW k1, k2, k3
VEX.L1.0F.W0 41 /r
AVX512F
16/32/64-bit
kmovb instruction.
KMOVB k1, r32
VEX.L0.66.0F.W0 92 /r
AVX512DQ
16/32/64-bit
kmovb instruction.
KMOVB r32, k1
VEX.L0.66.0F.W0 93 /r
AVX512DQ
16/32/64-bit
kmovb instruction.
KMOVB k1, k2/m8
VEX.L0.66.0F.W0 90 /r
AVX512DQ
16/32/64-bit
kmovb instruction.
KMOVB m8, k1
VEX.L0.66.0F.W0 91 /r
AVX512DQ
16/32/64-bit
kmovb instruction.
KMOVB k1, k2/m8
VEX.L0.66.0F.W0 90 /r
AVX512DQ
16/32/64-bit
kmovd instruction.
KMOVD k1, r32
VEX.L0.F2.0F.W0 92 /r
AVX512BW
16/32/64-bit
kmovd instruction.
KMOVD r32, k1
VEX.L0.F2.0F.W0 93 /r
AVX512BW
16/32/64-bit
kmovd instruction.
KMOVD k1, k2/m32
VEX.L0.66.0F.W1 90 /r
AVX512BW
16/32/64-bit
kmovd instruction.
KMOVD m32, k1
VEX.L0.66.0F.W1 91 /r
AVX512BW
16/32/64-bit
kmovd instruction.
KMOVD k1, k2/m32
VEX.L0.66.0F.W1 90 /r
AVX512BW
16/32/64-bit
kmovq instruction.
KMOVQ k1, r64
VEX.L0.F2.0F.W1 92 /r
AVX512BW
64-bit
kmovq instruction.
KMOVQ r64, k1
VEX.L0.F2.0F.W1 93 /r
AVX512BW
64-bit
kmovq instruction.
KMOVQ k1, k2/m64
VEX.L0.0F.W1 90 /r
AVX512BW
16/32/64-bit
kmovq instruction.
KMOVQ m64, k1
VEX.L0.0F.W1 91 /r
AVX512BW
16/32/64-bit
kmovq instruction.
KMOVQ k1, k2/m64
VEX.L0.0F.W1 90 /r
AVX512BW
16/32/64-bit
kmovw instruction.
KMOVW k1, r32
VEX.L0.0F.W0 92 /r
AVX512F
16/32/64-bit
kmovw instruction.
KMOVW r32, k1
VEX.L0.0F.W0 93 /r
AVX512F
16/32/64-bit
kmovw instruction.
KMOVW k1, k2/m16
VEX.L0.0F.W0 90 /r
AVX512F
16/32/64-bit
kmovw instruction.
KMOVW m16, k1
VEX.L0.0F.W0 91 /r
AVX512F
16/32/64-bit
kmovw instruction.
KMOVW k1, k2/m16
VEX.L0.0F.W0 90 /r
AVX512F
16/32/64-bit
knotb instruction.
KNOTB k1, k2
VEX.L0.66.0F.W0 44 /r
AVX512DQ
16/32/64-bit
knotd instruction.
KNOTD k1, k2
VEX.L0.66.0F.W1 44 /r
AVX512BW
16/32/64-bit
knotq instruction.
KNOTQ k1, k2
VEX.L0.0F.W1 44 /r
AVX512BW
16/32/64-bit
knotw instruction.
KNOTW k1, k2
VEX.L0.0F.W0 44 /r
AVX512F
16/32/64-bit
korb instruction.
KORB k1, k2, k3
VEX.L1.66.0F.W0 45 /r
AVX512DQ
16/32/64-bit
kord instruction.
KORD k1, k2, k3
VEX.L1.66.0F.W1 45 /r
AVX512BW
16/32/64-bit
korq instruction.
KORQ k1, k2, k3
VEX.L1.0F.W1 45 /r
AVX512BW
16/32/64-bit
kortestb instruction.
KORTESTB k1, k2
VEX.L0.66.0F.W0 98 /r
AVX512DQ
16/32/64-bit
kortestd instruction.
KORTESTD k1, k2
VEX.L0.66.0F.W1 98 /r
AVX512BW
16/32/64-bit
kortestq instruction.
KORTESTQ k1, k2
VEX.L0.0F.W1 98 /r
AVX512BW
16/32/64-bit
kortestw instruction.
KORTESTW k1, k2
VEX.L0.0F.W0 98 /r
AVX512F
16/32/64-bit
korw instruction.
KORW k1, k2, k3
VEX.L1.0F.W0 45 /r
AVX512F
16/32/64-bit
kshiftlb instruction.
KSHIFTLB k1, k2, imm8
VEX.L0.66.0F3A.W0 32 /r ib
AVX512DQ
16/32/64-bit
kshiftlb instruction.
KSHIFTLB k1, k2, imm8
VEX.L0.66.0F3A.W0 32 /r ib
AVX512DQ
16/32/64-bit
kshiftld instruction.
KSHIFTLD k1, k2, imm8
VEX.L0.66.0F3A.W0 33 /r ib
AVX512BW
16/32/64-bit
kshiftld instruction.
KSHIFTLD k1, k2, imm8
VEX.L0.66.0F3A.W0 33 /r ib
AVX512BW
16/32/64-bit
kshiftlq instruction.
KSHIFTLQ k1, k2, imm8
VEX.L0.66.0F3A.W1 33 /r ib
AVX512BW
16/32/64-bit
kshiftlq instruction.
KSHIFTLQ k1, k2, imm8
VEX.L0.66.0F3A.W1 33 /r ib
AVX512BW
16/32/64-bit
kshiftlw instruction.
KSHIFTLW k1, k2, imm8
VEX.L0.66.0F3A.W1 32 /r ib
AVX512F
16/32/64-bit
kshiftlw instruction.
KSHIFTLW k1, k2, imm8
VEX.L0.66.0F3A.W1 32 /r ib
AVX512F
16/32/64-bit
kshiftrb instruction.
KSHIFTRB k1, k2, imm8
VEX.L0.66.0F3A.W0 30 /r ib
AVX512DQ
16/32/64-bit
kshiftrb instruction.
KSHIFTRB k1, k2, imm8
VEX.L0.66.0F3A.W0 30 /r ib
AVX512DQ
16/32/64-bit
kshiftrd instruction.
KSHIFTRD k1, k2, imm8
VEX.L0.66.0F3A.W0 31 /r ib
AVX512BW
16/32/64-bit
kshiftrd instruction.
KSHIFTRD k1, k2, imm8
VEX.L0.66.0F3A.W0 31 /r ib
AVX512BW
16/32/64-bit
kshiftrq instruction.
KSHIFTRQ k1, k2, imm8
VEX.L0.66.0F3A.W1 31 /r ib
AVX512BW
16/32/64-bit
kshiftrq instruction.
KSHIFTRQ k1, k2, imm8
VEX.L0.66.0F3A.W1 31 /r ib
AVX512BW
16/32/64-bit
kshiftrw instruction.
KSHIFTRW k1, k2, imm8
VEX.L0.66.0F3A.W1 30 /r ib
AVX512F
16/32/64-bit
kshiftrw instruction.
KSHIFTRW k1, k2, imm8
VEX.L0.66.0F3A.W1 30 /r ib
AVX512F
16/32/64-bit
ktestb instruction.
KTESTB k1, k2
VEX.L0.66.0F.W0 99 /r
AVX512DQ
16/32/64-bit
ktestd instruction.
KTESTD k1, k2
VEX.L0.66.0F.W1 99 /r
AVX512BW
16/32/64-bit
ktestq instruction.
KTESTQ k1, k2
VEX.L0.0F.W1 99 /r
AVX512BW
16/32/64-bit
ktestw instruction.
KTESTW k1, k2
VEX.L0.0F.W0 99 /r
AVX512DQ
16/32/64-bit
kunpckbw instruction.
KUNPCKBW k1, k2, k3
VEX.L1.66.0F.W0 4B /r
AVX512F
16/32/64-bit
kunpckdq instruction.
KUNPCKDQ k1, k2, k3
VEX.L1.0F.W1 4B /r
AVX512BW
16/32/64-bit
kunpckwd instruction.
KUNPCKWD k1, k2, k3
VEX.L1.0F.W0 4B /r
AVX512BW
16/32/64-bit
kxnorb instruction.
KXNORB k1, k2, k3
VEX.L1.66.0F.W0 46 /r
AVX512DQ
16/32/64-bit
kxnord instruction.
KXNORD k1, k2, k3
VEX.L1.66.0F.W1 46 /r
AVX512BW
16/32/64-bit
kxnorq instruction.
KXNORQ k1, k2, k3
VEX.L1.0F.W1 46 /r
AVX512BW
16/32/64-bit
kxnorw instruction.
KXNORW k1, k2, k3
VEX.L1.0F.W0 46 /r
AVX512F
16/32/64-bit
kxorb instruction.
KXORB k1, k2, k3
VEX.L1.66.0F.W0 47 /r
AVX512DQ
16/32/64-bit
kxord instruction.
KXORD k1, k2, k3
VEX.L1.66.0F.W1 47 /r
AVX512BW
16/32/64-bit
kxorq instruction.
KXORQ k1, k2, k3
VEX.L1.0F.W1 47 /r
AVX512BW
16/32/64-bit
kxorw instruction.
KXORW k1, k2, k3
VEX.L1.0F.W0 47 /r
AVX512F
16/32/64-bit
lahf instruction.
LAHF
9F
8086+
16/32/64-bit
lar instruction.
LAR r16, r/m16
o16 0F 02 /r
286+
16/32/64-bit
lar instruction.
LAR r32, r32/m16
o32 0F 02 /r
386+
16/32/64-bit
lar instruction.
LAR r64, r64/m16
o64 0F 02 /r
X64
64-bit
lar instruction.
LAR r16, r/m16
o16 0F 02 /r
286+
16/32/64-bit
lar instruction.
LAR r32, r32/m16
o32 0F 02 /r
386+
16/32/64-bit
lddqu instruction.
LDDQU xmm1, m128
F2 0F F0 /r
SSE3
16/32/64-bit
ldmxcsr instruction.
LDMXCSR m32
NP 0F AE /2
SSE
16/32/64-bit
lds instruction.
LDS r16, m16:16
o16 C5 /r
8086+
16/32-bit
lds instruction.
LDS r32, m16:32
o32 C5 /r
386+
16/32-bit
ldtilecfg instruction.
LDTILECFG m512
VEX.128.0F38.W0 49 !(11):000:bbb
AMX-TILE
64-bit
lea instruction.
LEA r16, m
o16 8D /r
8086+
16/32/64-bit
lea instruction.
LEA r32, m
o32 8D /r
386+
16/32/64-bit
lea instruction.
LEA r64, m
o64 8D /r
X64
64-bit
leave instruction.
LEAVE
o64 C9
X64
64-bit
LEAVE
o32 C9
386+
16/32-bit
LEAVE
o16 C9
186+
16/32/64-bit
les instruction.
LES r16, m16:16
o16 C4 /r
8086+
16/32-bit
les instruction.
LES r32, m16:32
o32 C4 /r
386+
16/32-bit
lfence instruction.
LFENCE
NP 0F AE E8
SSE2
16/32/64-bit
lfs instruction.
LFS r16, m16:16
o16 0F B4 /r
386+
16/32/64-bit
lfs instruction.
LFS r32, m16:32
o32 0F B4 /r
386+
16/32/64-bit
lfs instruction.
LFS r64, m16:64
o64 0F B4 /r
X64
64-bit
lgdt instruction.
LGDT m16&64
0F 01 /2
X64
64-bit
LGDT m16&32
o32 0F 01 /2
386+
16/32-bit
LGDT m16&32
o16 0F 01 /2
286+
16/32-bit
lgs instruction.
LGS r16, m16:16
o16 0F B5 /r
386+
16/32/64-bit
lgs instruction.
LGS r32, m16:32
o32 0F B5 /r
386+
16/32/64-bit
lgs instruction.
LGS r64, m16:64
o64 0F B5 /r
X64
64-bit
lidt instruction.
LIDT m16&64
0F 01 /3
X64
64-bit
LIDT m16&32
o32 0F 01 /3
386+
16/32-bit
LIDT m16&32
o16 0F 01 /3
286+
16/32-bit
lkgs instruction.
LKGS r/m16
o16 F2 0F 00 /6
LKGS
64-bit
lkgs instruction.
LKGS r32/m16
o32 F2 0F 00 /6
LKGS
64-bit
lkgs instruction.
LKGS r64/m16
F2 o64 0F 00 /6
LKGS
64-bit
lkgs instruction.
LKGS r32/m16
o32 F2 0F 00 /6
LKGS
64-bit
LKGS r/m16
o16 F2 0F 00 /6
LKGS
64-bit
lldt instruction.
LLDT r/m16
o16 0F 00 /2
286+
16/32/64-bit
lldt instruction.
LLDT r32/m16
o32 0F 00 /2
386+
16/32/64-bit
lldt instruction.
LLDT r64/m16
o64 0F 00 /2
X64
64-bit
lldt instruction.
LLDT r32/m16
o32 0F 00 /2
386+
16/32/64-bit
LLDT r/m16
o16 0F 00 /2
286+
16/32/64-bit
llwpcb instruction.
LLWPCB r32
XOP.L0.X9.W0 12 /0
LWP
16/32/64-bit
llwpcb instruction.
LLWPCB r64
XOP.L0.X9.W1 12 /0
LWP
64-bit
lmsw instruction.
LMSW r/m16
o16 0F 01 /6
286+
16/32/64-bit
lmsw instruction.
LMSW r32/m16
o32 0F 01 /6
386+
16/32/64-bit
lmsw instruction.
LMSW r64/m16
o64 0F 01 /6
X64
64-bit
lmsw instruction.
LMSW r32/m16
o32 0F 01 /6
386+
16/32/64-bit
LMSW r/m16
o16 0F 01 /6
286+
16/32/64-bit
loadall instruction.
LOADALL
0F 07
386
16/32-bit
loadiwkey instruction.
LOADIWKEY xmm1, xmm2, <EAX>, <XMM0>
F3 0F 38 DC 11:rrr:bbb
KL
16/32/64-bit
lodsb instruction.
LODSB
AC
8086+
16/32/64-bit
lodsd instruction.
LODSD
o32 AD
386+
16/32/64-bit
lodsq instruction.
LODSQ
o64 AD
X64
64-bit
lodsw instruction.
LODSW
o16 AD
8086+
16/32/64-bit
loop instruction.
LOOP rel8
a64 o64 E2 cb
X64
64-bit
LOOP rel8
a32 o32 E2 cb
386+
16/32-bit
LOOP rel8
a16 o16 E2 cb
8086+
16/32-bit
loop instruction.
LOOP rel8
a64 o64 E2 cb
X64
64-bit
LOOP rel8
a32 o32 E2 cb
386+
16/32-bit
LOOP rel8
a16 o16 E2 cb
8086+
16/32-bit
loope instruction.
LOOPE rel8
a64 o64 E1 cb
X64
64-bit
LOOPE rel8
a32 o32 E1 cb
386+
16/32-bit
LOOPE rel8
a16 o16 E1 cb
8086+
16/32-bit
loope instruction.
LOOPE rel8
a64 o64 E1 cb
X64
64-bit
LOOPE rel8
a32 o32 E1 cb
386+
16/32-bit
LOOPE rel8
a16 o16 E1 cb
8086+
16/32-bit
loopne instruction.
LOOPNE rel8
a64 o64 E0 cb
X64
64-bit
LOOPNE rel8
a32 o32 E0 cb
386+
16/32-bit
LOOPNE rel8
a16 o16 E0 cb
8086+
16/32-bit
loopne instruction.
LOOPNE rel8
a64 o64 E0 cb
X64
64-bit
LOOPNE rel8
a32 o32 E0 cb
386+
16/32-bit
LOOPNE rel8
a16 o16 E0 cb
8086+
16/32-bit
loopnz instruction.
LOOPNE rel8
a64 o64 E0 cb
X64
64-bit
LOOPNE rel8
a32 o32 E0 cb
386+
16/32-bit
LOOPNE rel8
a16 o16 E0 cb
8086+
16/32-bit
loopnz instruction.
LOOPNE rel8
a64 o64 E0 cb
X64
64-bit
LOOPNE rel8
a32 o32 E0 cb
386+
16/32-bit
LOOPNE rel8
a16 o16 E0 cb
8086+
16/32-bit
loopz instruction.
LOOPE rel8
a64 o64 E1 cb
X64
64-bit
LOOPE rel8
a32 o32 E1 cb
386+
16/32-bit
LOOPE rel8
a16 o16 E1 cb
8086+
16/32-bit
loopz instruction.
LOOPE rel8
a64 o64 E1 cb
X64
64-bit
LOOPE rel8
a32 o32 E1 cb
386+
16/32-bit
LOOPE rel8
a16 o16 E1 cb
8086+
16/32-bit
lsl instruction.
LSL r16, r/m16
o16 0F 03 /r
286+
16/32/64-bit
lsl instruction.
LSL r32, r32/m16
o32 0F 03 /r
386+
16/32/64-bit
lsl instruction.
LSL r64, r64/m16
o64 0F 03 /r
X64
64-bit
lsl instruction.
LSL r16, r/m16
o16 0F 03 /r
286+
16/32/64-bit
lsl instruction.
LSL r32, r32/m16
o32 0F 03 /r
386+
16/32/64-bit
lss instruction.
LSS r16, m16:16
o16 0F B2 /r
386+
16/32/64-bit
lss instruction.
LSS r32, m16:32
o32 0F B2 /r
386+
16/32/64-bit
lss instruction.
LSS r64, m16:64
o64 0F B2 /r
X64
64-bit
ltr instruction.
LTR r/m16
o16 0F 00 /3
286+
16/32/64-bit
ltr instruction.
LTR r32/m16
o32 0F 00 /3
386+
16/32/64-bit
ltr instruction.
LTR r64/m16
o64 0F 00 /3
X64
64-bit
ltr instruction.
LTR r32/m16
o32 0F 00 /3
386+
16/32/64-bit
LTR r/m16
o16 0F 00 /3
286+
16/32/64-bit
lwpins instruction.
LWPINS r32, r/m32, imm32
XOP.L0.XA.W0 12 /0 id
LWP
16/32/64-bit
lwpins instruction.
LWPINS r64, r/m32, imm32
XOP.L0.XA.W1 12 /0 id
LWP
64-bit
lwpins instruction.
LWPINS r32, r/m32, imm32
XOP.L0.XA.W0 12 /0 id
LWP
16/32/64-bit
lwpins instruction.
LWPINS r64, r/m32, imm32
XOP.L0.XA.W1 12 /0 id
LWP
64-bit
lwpins instruction.
LWPINS r32, r/m32, imm32
XOP.L0.XA.W0 12 /0 id
LWP
16/32/64-bit
lwpins instruction.
LWPINS r64, r/m32, imm32
XOP.L0.XA.W1 12 /0 id
LWP
64-bit
lwpins instruction.
LWPINS r32, r/m32, imm32
XOP.L0.XA.W0 12 /0 id
LWP
16/32/64-bit
lwpins instruction.
LWPINS r64, r/m32, imm32
XOP.L0.XA.W1 12 /0 id
LWP
64-bit
lwpval instruction.
LWPVAL r32, r/m32, imm32
XOP.L0.XA.W0 12 /1 id
LWP
16/32/64-bit
lwpval instruction.
LWPVAL r64, r/m32, imm32
XOP.L0.XA.W1 12 /1 id
LWP
64-bit
lwpval instruction.
LWPVAL r32, r/m32, imm32
XOP.L0.XA.W0 12 /1 id
LWP
16/32/64-bit
lwpval instruction.
LWPVAL r64, r/m32, imm32
XOP.L0.XA.W1 12 /1 id
LWP
64-bit
lwpval instruction.
LWPVAL r32, r/m32, imm32
XOP.L0.XA.W0 12 /1 id
LWP
16/32/64-bit
lwpval instruction.
LWPVAL r64, r/m32, imm32
XOP.L0.XA.W1 12 /1 id
LWP
64-bit
lwpval instruction.
LWPVAL r32, r/m32, imm32
XOP.L0.XA.W0 12 /1 id
LWP
16/32/64-bit
lwpval instruction.
LWPVAL r64, r/m32, imm32
XOP.L0.XA.W1 12 /1 id
LWP
64-bit
lzcnt instruction.
LZCNT r16, r/m16
o16 F3 0F BD /r
LZCNT
16/32/64-bit
lzcnt instruction.
LZCNT r32, r/m32
o32 F3 0F BD /r
LZCNT
16/32/64-bit
lzcnt instruction.
LZCNT r64, r/m64
F3 o64 0F BD /r
LZCNT
64-bit
lzcnt instruction.
LZCNT r16, r/m16
o16 F3 0F BD /r
LZCNT
16/32/64-bit
lzcnt instruction.
LZCNT r32, r/m32
o32 F3 0F BD /r
LZCNT
16/32/64-bit
lzcnt instruction.
LZCNT r64, r/m64
F3 o64 0F BD /r
LZCNT
64-bit
maskmovdqu instruction.
MASKMOVDQU xmm1, xmm2
66 0F F7 /r
SSE2
16/32/64-bit
maskmovq instruction.
MASKMOVQ mm1, mm2
NP 0F F7 /r
SSE
16/32/64-bit
maxpd instruction.
MAXPD xmm1, xmm2/m128
66 0F 5F /r
SSE2
16/32/64-bit
maxpd instruction.
MAXPD xmm1, xmm2/m128
66 0F 5F /r
SSE2
16/32/64-bit
maxps instruction.
MAXPS xmm1, xmm2/m128
NP 0F 5F /r
SSE
16/32/64-bit
maxps instruction.
MAXPS xmm1, xmm2/m128
NP 0F 5F /r
SSE
16/32/64-bit
maxsd instruction.
MAXSD xmm1, xmm2/m64
F2 0F 5F /r
SSE2
16/32/64-bit
maxsd instruction.
MAXSD xmm1, xmm2/m64
F2 0F 5F /r
SSE2
16/32/64-bit
maxss instruction.
MAXSS xmm1, xmm2/m32
F3 0F 5F /r
SSE
16/32/64-bit
maxss instruction.
MAXSS xmm1, xmm2/m32
F3 0F 5F /r
SSE
16/32/64-bit
mcommit instruction.
MCOMMIT
F3 0F 01 FA
MCOMMIT
16/32/64-bit
mfence instruction.
MFENCE
NP 0F AE F0
SSE2
16/32/64-bit
minpd instruction.
MINPD xmm1, xmm2/m128
66 0F 5D /r
SSE2
16/32/64-bit
minpd instruction.
MINPD xmm1, xmm2/m128
66 0F 5D /r
SSE2
16/32/64-bit
minps instruction.
MINPS xmm1, xmm2/m128
NP 0F 5D /r
SSE
16/32/64-bit
minps instruction.
MINPS xmm1, xmm2/m128
NP 0F 5D /r
SSE
16/32/64-bit
minsd instruction.
MINSD xmm1, xmm2/m64
F2 0F 5D /r
SSE2
16/32/64-bit
minsd instruction.
MINSD xmm1, xmm2/m64
F2 0F 5D /r
SSE2
16/32/64-bit
minss instruction.
MINSS xmm1, xmm2/m32
F3 0F 5D /r
SSE
16/32/64-bit
minss instruction.
MINSS xmm1, xmm2/m32
F3 0F 5D /r
SSE
16/32/64-bit
monitor instruction.
MONITOR
a64 NP 0F 01 C8
MONITOR
64-bit
MONITOR
a32 NP 0F 01 C8
MONITOR
16/32/64-bit
MONITOR
a16 NP 0F 01 C8
MONITOR
16/32-bit
monitorx instruction.
MONITORX
a64 NP 0F 01 FA
MONITORX
64-bit
MONITORX
a32 NP 0F 01 FA
MONITORX
16/32/64-bit
MONITORX
a16 NP 0F 01 FA
MONITORX
16/32-bit
montmul instruction.
MONTMUL
a64 F3 0F A6 C0
PADLOCK_PMM
64-bit
MONTMUL
a32 F3 0F A6 C0
PADLOCK_PMM
16/32/64-bit
MONTMUL
a16 F3 0F A6 C0
PADLOCK_PMM
16/32-bit
mov instruction.
MOV r/m8, r8
88 /r
8086+
16/32/64-bit
mov instruction.
MOV moffs8, AL
A2 mo
8086+
16/32/64-bit
MOV r/m8, r8
88 /r
8086+
16/32/64-bit
mov instruction.
MOV r/m16, r16
o16 89 /r
8086+
16/32/64-bit
mov instruction.
MOV Sreg, r/m16
o16 8E /r
8086+
16/32/64-bit
mov instruction.
MOV moffs16, AX
o16 A3 mo
8086+
16/32/64-bit
MOV r/m16, r16
o16 89 /r
8086+
16/32/64-bit
mov instruction.
MOV r/m32, r32
o32 89 /r
386+
16/32/64-bit
mov instruction.
MOV Sreg, r32/m16
o32 8E /r
386+
16/32/64-bit
mov instruction.
MOV cr, r32
0F 22 /r
386+
16/32-bit
mov instruction.
MOV dr, r32
0F 23 /r
386+
16/32-bit
mov instruction.
MOV tr, r32
0F 26 /r
386/486/Cyrix/Geode
16/32-bit
mov instruction.
MOV moffs32, EAX
o32 A3 mo
386+
16/32/64-bit
MOV r/m32, r32
o32 89 /r
386+
16/32/64-bit
mov instruction.
MOV r/m64, r64
o64 89 /r
X64
64-bit
mov instruction.
MOV Sreg, r64/m16
o64 8E /r
X64
64-bit
mov instruction.
MOV cr, r64
0F 22 /r
X64
64-bit
mov instruction.
MOV dr, r64
0F 23 /r
X64
64-bit
mov instruction.
MOV moffs64, RAX
o64 A3 mo
X64
64-bit
MOV r/m64, r64
o64 89 /r
X64
64-bit
mov instruction.
MOV r/m16, Sreg
o16 8C /r
8086+
16/32/64-bit
mov instruction.
MOV r32/m16, Sreg
o32 8C /r
386+
16/32/64-bit
mov instruction.
MOV r64/m16, Sreg
o64 8C /r
X64
64-bit
mov instruction.
MOV r32/m16, Sreg
o32 8C /r
386+
16/32/64-bit
MOV r/m16, Sreg
o16 8C /r
8086+
16/32/64-bit
mov instruction.
MOV r32, cr
0F 20 /r
386+
16/32-bit
mov instruction.
MOV r64, cr
0F 20 /r
X64
64-bit
mov instruction.
MOV r32, dr
0F 21 /r
386+
16/32-bit
mov instruction.
MOV r64, dr
0F 21 /r
X64
64-bit
mov instruction.
MOV r32, tr
0F 24 /r
386/486/Cyrix/Geode
16/32-bit
mov instruction.
MOV AL, moffs8
A0 mo
8086+
16/32/64-bit
MOV r8, r/m8
8A /r
8086+
16/32/64-bit
mov instruction.
MOV AX, moffs16
o16 A1 mo
8086+
16/32/64-bit
MOV r16, r/m16
o16 8B /r
8086+
16/32/64-bit
mov instruction.
MOV EAX, moffs32
o32 A1 mo
386+
16/32/64-bit
MOV r32, r/m32
o32 8B /r
386+
16/32/64-bit
mov instruction.
MOV RAX, moffs64
o64 A1 mo
X64
64-bit
MOV r64, r/m64
o64 8B /r
X64
64-bit
mov instruction.
MOV Sreg, r32/m16
o32 8E /r
386+
16/32/64-bit
MOV Sreg, r/m16
o16 8E /r
8086+
16/32/64-bit
mov instruction.
MOV r8, imm8
B0+rb ib
8086+
16/32/64-bit
mov instruction.
MOV r16, imm16
o16 B8+rw iw
8086+
16/32/64-bit
mov instruction.
MOV r32, imm32
o32 B8+rd id
386+
16/32/64-bit
mov instruction.
MOV r64, imm64
o64 B8+ro io
X64
64-bit
mov instruction.
MOV r/m64, imm32
o64 C7 /0 id
X64
64-bit
MOV r/m32, imm32
o32 C7 /0 id
386+
16/32/64-bit
MOV r/m16, imm16
o16 C7 /0 iw
8086+
16/32/64-bit
MOV r/m8, imm8
C6 /0 ib
8086+
16/32/64-bit
mov instruction.
MOV r8, imm8
B0+rb ib
8086+
16/32/64-bit
mov instruction.
MOV r16, imm16
o16 B8+rw iw
8086+
16/32/64-bit
mov instruction.
MOV r32, imm32
o32 B8+rd id
386+
16/32/64-bit
mov instruction.
MOV r64, imm64
o64 B8+ro io
X64
64-bit
mov instruction.
MOV r/m32, imm32
o32 C7 /0 id
386+
16/32/64-bit
MOV r/m16, imm16
o16 C7 /0 iw
8086+
16/32/64-bit
MOV r/m8, imm8
C6 /0 ib
8086+
16/32/64-bit
movapd instruction.
MOVAPD xmm1, xmm2/m128
66 0F 28 /r
SSE2
16/32/64-bit
movapd instruction.
MOVAPD xmm2/m128, xmm1
66 0F 29 /r
SSE2
16/32/64-bit
movapd instruction.
MOVAPD xmm1, xmm2/m128
66 0F 28 /r
SSE2
16/32/64-bit
movaps instruction.
MOVAPS xmm1, xmm2/m128
NP 0F 28 /r
SSE
16/32/64-bit
movaps instruction.
MOVAPS xmm2/m128, xmm1
NP 0F 29 /r
SSE
16/32/64-bit
movaps instruction.
MOVAPS xmm1, xmm2/m128
NP 0F 28 /r
SSE
16/32/64-bit
movbe instruction.
MOVBE m16, r16
o16 0F 38 F1 /r
MOVBE
16/32/64-bit
movbe instruction.
MOVBE m32, r32
o32 0F 38 F1 /r
MOVBE
16/32/64-bit
movbe instruction.
MOVBE m64, r64
o64 0F 38 F1 /r
MOVBE
64-bit
movbe instruction.
MOVBE r16, m16
o16 0F 38 F0 /r
MOVBE
16/32/64-bit
movbe instruction.
MOVBE r32, m32
o32 0F 38 F0 /r
MOVBE
16/32/64-bit
movbe instruction.
MOVBE r64, m64
o64 0F 38 F0 /r
MOVBE
64-bit
movd instruction.
MOVD mm, r/m32
NP 0F 6E /r
MMX
16/32/64-bit
movd instruction.
MOVD xmm, r/m32
66 0F 6E /r
SSE2
16/32/64-bit
movd instruction.
MOVD r/m32, mm
NP 0F 7E /r
MMX
16/32/64-bit
movd instruction.
MOVD r/m32, mm
NP 0F 7E /r
MMX
16/32/64-bit
movd instruction.
MOVD r/m32, xmm
66 0F 7E /r
SSE2
16/32/64-bit
movd instruction.
MOVD r/m32, xmm
66 0F 7E /r
SSE2
16/32/64-bit
movd instruction.
MOVD mm, r/m32
NP 0F 6E /r
MMX
16/32/64-bit
movd instruction.
MOVD xmm, r/m32
66 0F 6E /r
SSE2
16/32/64-bit
movddup instruction.
MOVDDUP xmm1, xmm2/m64
F2 0F 12 /r
SSE3
16/32/64-bit
movddup instruction.
MOVDDUP xmm1, xmm2/m64
F2 0F 12 /r
SSE3
16/32/64-bit
movdir64b instruction.
MOVDIR64B r16, m512
a16 66 0F 38 F8 /r
MOVDIR64B
16/32-bit
movdir64b instruction.
MOVDIR64B r32, m512
a32 66 0F 38 F8 /r
MOVDIR64B
16/32/64-bit
movdir64b instruction.
MOVDIR64B r64, m512
a64 66 0F 38 F8 /r
MOVDIR64B
64-bit
movdiri instruction.
MOVDIRI m32, r32
NP 0F 38 F9 /r
MOVDIRI
16/32/64-bit
movdiri instruction.
MOVDIRI m64, r64
NP o64 0F 38 F9 /r
MOVDIRI
64-bit
movdq2q instruction.
MOVDQ2Q mm, xmm
F2 0F D6 /r
SSE2
16/32/64-bit
movdqa instruction.
MOVDQA xmm1, xmm2/m128
66 0F 6F /r
SSE2
16/32/64-bit
movdqa instruction.
MOVDQA xmm2/m128, xmm1
66 0F 7F /r
SSE2
16/32/64-bit
movdqa instruction.
MOVDQA xmm1, xmm2/m128
66 0F 6F /r
SSE2
16/32/64-bit
movdqu instruction.
MOVDQU xmm1, xmm2/m128
F3 0F 6F /r
SSE2
16/32/64-bit
movdqu instruction.
MOVDQU xmm2/m128, xmm1
F3 0F 7F /r
SSE2
16/32/64-bit
movdqu instruction.
MOVDQU xmm1, xmm2/m128
F3 0F 6F /r
SSE2
16/32/64-bit
movhlps instruction.
MOVHLPS xmm1, xmm2
NP 0F 12 /r
SSE
16/32/64-bit
movhpd instruction.
MOVHPD m64, xmm1
66 0F 17 /r
SSE2
16/32/64-bit
movhpd instruction.
MOVHPD xmm1, m64
66 0F 16 /r
SSE2
16/32/64-bit
movhps instruction.
MOVHPS m64, xmm1
NP 0F 17 /r
SSE
16/32/64-bit
movhps instruction.
MOVHPS xmm1, m64
NP 0F 16 /r
SSE
16/32/64-bit
movlhps instruction.
MOVLHPS xmm1, xmm2
NP 0F 16 /r
SSE
16/32/64-bit
movlpd instruction.
MOVLPD m64, xmm1
66 0F 13 /r
SSE2
16/32/64-bit
movlpd instruction.
MOVLPD xmm1, m64
66 0F 12 /r
SSE2
16/32/64-bit
movlps instruction.
MOVLPS m64, xmm1
NP 0F 13 /r
SSE
16/32/64-bit
movlps instruction.
MOVLPS xmm1, m64
NP 0F 12 /r
SSE
16/32/64-bit
movmskpd instruction.
MOVMSKPD r32, xmm
66 0F 50 /r
SSE2
16/32/64-bit
movmskpd instruction.
MOVMSKPD r64, xmm
66 o64 0F 50 /r
SSE2
64-bit
movmskps instruction.
MOVMSKPS r32, xmm
NP 0F 50 /r
SSE
16/32/64-bit
movmskps instruction.
MOVMSKPS r64, xmm
NP o64 0F 50 /r
SSE
64-bit
movntdq instruction.
MOVNTDQ m128, xmm1
66 0F E7 /r
SSE2
16/32/64-bit
movntdqa instruction.
MOVNTDQA xmm1, m128
66 0F 38 2A /r
SSE4.1
16/32/64-bit
movnti instruction.
MOVNTI m32, r32
NP 0F C3 /r
SSE2
16/32/64-bit
movnti instruction.
MOVNTI m64, r64
NP o64 0F C3 /r
SSE2
64-bit
movntpd instruction.
MOVNTPD m128, xmm1
66 0F 2B /r
SSE2
16/32/64-bit
movntps instruction.
MOVNTPS m128, xmm1
NP 0F 2B /r
SSE
16/32/64-bit
movntq instruction.
MOVNTQ m64, mm
NP 0F E7 /r
SSE
16/32/64-bit
movntsd instruction.
MOVNTSD m64, xmm1
F2 0F 2B /r
SSE4A
16/32/64-bit
movntss instruction.
MOVNTSS m32, xmm1
F3 0F 2B /r
SSE4A
16/32/64-bit
movq instruction.
MOVQ mm, r/m64
NP o64 0F 6E /r
MMX
64-bit
movq instruction.
MOVQ xmm, r/m64
66 o64 0F 6E /r
SSE2
64-bit
movq instruction.
MOVQ r/m64, mm
NP o64 0F 7E /r
MMX
64-bit
movq instruction.
MOVQ mm, mm/m64
NP 0F 6F /r
MMX
16/32/64-bit
movq instruction.
MOVQ mm/m64, mm
NP 0F 7F /r
MMX
16/32/64-bit
movq instruction.
MOVQ r/m64, xmm
66 o64 0F 7E /r
SSE2
64-bit
movq instruction.
MOVQ xmm1, xmm2/m64
F3 0F 7E /r
SSE2
16/32/64-bit
movq instruction.
MOVQ xmm2/m64, xmm1
66 0F D6 /r
SSE2
16/32/64-bit
movq instruction.
MOVQ mm, mm/m64
NP 0F 6F /r
MMX
16/32/64-bit
movq instruction.
MOVQ xmm1, xmm2/m64
F3 0F 7E /r
SSE2
16/32/64-bit
movq2dq instruction.
MOVQ2DQ xmm, mm
F3 0F D6 /r
SSE2
16/32/64-bit
movsb instruction.
MOVSB
A4
8086+
16/32/64-bit
movsd instruction.
MOVSD
o32 A5
386+
16/32/64-bit
movsd instruction.
MOVSD xmm1, xmm2/m64
F2 0F 10 /r
SSE2
16/32/64-bit
movsd instruction.
MOVSD xmm1/m64, xmm2
F2 0F 11 /r
SSE2
16/32/64-bit
movsd instruction.
MOVSD xmm1, xmm2/m64
F2 0F 10 /r
SSE2
16/32/64-bit
movshdup instruction.
MOVSHDUP xmm1, xmm2/m128
F3 0F 16 /r
SSE3
16/32/64-bit
movshdup instruction.
MOVSHDUP xmm1, xmm2/m128
F3 0F 16 /r
SSE3
16/32/64-bit
movsldup instruction.
MOVSLDUP xmm1, xmm2/m128
F3 0F 12 /r
SSE3
16/32/64-bit
movsldup instruction.
MOVSLDUP xmm1, xmm2/m128
F3 0F 12 /r
SSE3
16/32/64-bit
movsq instruction.
MOVSQ
o64 A5
X64
64-bit
movss instruction.
MOVSS xmm1, xmm2/m32
F3 0F 10 /r
SSE
16/32/64-bit
movss instruction.
MOVSS xmm2/m32, xmm1
F3 0F 11 /r
SSE
16/32/64-bit
movss instruction.
MOVSS xmm1, xmm2/m32
F3 0F 10 /r
SSE
16/32/64-bit
movsw instruction.
MOVSW
o16 A5
8086+
16/32/64-bit
movsx instruction.
MOVSX r16, r/m8
o16 0F BE /r
386+
16/32/64-bit
movsx instruction.
MOVSX r32, r/m8
o32 0F BE /r
386+
16/32/64-bit
movsx instruction.
MOVSX r64, r/m8
o64 0F BE /r
X64
64-bit
movsx instruction.
MOVSX r16, r/m16
o16 0F BF /r
386+
16/32/64-bit
movsx instruction.
MOVSX r32, r/m16
o32 0F BF /r
386+
16/32/64-bit
movsx instruction.
MOVSX r64, r/m16
o64 0F BF /r
X64
64-bit
movsx instruction.
MOVSX r16, r/m16
o16 0F BF /r
386+
16/32/64-bit
MOVSX r16, r/m8
o16 0F BE /r
386+
16/32/64-bit
movsx instruction.
MOVSX r32, r/m16
o32 0F BF /r
386+
16/32/64-bit
MOVSX r32, r/m8
o32 0F BE /r
386+
16/32/64-bit
movsx instruction.
MOVSX r64, r/m16
o64 0F BF /r
X64
64-bit
MOVSX r64, r/m8
o64 0F BE /r
X64
64-bit
movsxd instruction.
MOVSXD r16, r/m16
o16 63 /r
X64
64-bit
movsxd instruction.
MOVSXD r32, r/m32
o32 63 /r
X64
64-bit
movsxd instruction.
MOVSXD r64, r/m32
o64 63 /r
X64
64-bit
movsxd instruction.
MOVSXD r16, r/m16
o16 63 /r
X64
64-bit
movsxd instruction.
MOVSXD r32, r/m32
o32 63 /r
X64
64-bit
movsxd instruction.
MOVSXD r64, r/m32
o64 63 /r
X64
64-bit
movupd instruction.
MOVUPD xmm1, xmm2/m128
66 0F 10 /r
SSE2
16/32/64-bit
movupd instruction.
MOVUPD xmm2/m128, xmm1
66 0F 11 /r
SSE2
16/32/64-bit
movupd instruction.
MOVUPD xmm1, xmm2/m128
66 0F 10 /r
SSE2
16/32/64-bit
movups instruction.
MOVUPS xmm1, xmm2/m128
NP 0F 10 /r
SSE
16/32/64-bit
movups instruction.
MOVUPS xmm2/m128, xmm1
NP 0F 11 /r
SSE
16/32/64-bit
movups instruction.
MOVUPS xmm1, xmm2/m128
NP 0F 10 /r
SSE
16/32/64-bit
movzx instruction.
MOVZX r16, r/m8
o16 0F B6 /r
386+
16/32/64-bit
movzx instruction.
MOVZX r32, r/m8
o32 0F B6 /r
386+
16/32/64-bit
movzx instruction.
MOVZX r64, r/m8
o64 0F B6 /r
X64
64-bit
movzx instruction.
MOVZX r16, r/m16
o16 0F B7 /r
386+
16/32/64-bit
movzx instruction.
MOVZX r32, r/m16
o32 0F B7 /r
386+
16/32/64-bit
movzx instruction.
MOVZX r64, r/m16
o64 0F B7 /r
X64
64-bit
movzx instruction.
MOVZX r16, r/m16
o16 0F B7 /r
386+
16/32/64-bit
MOVZX r16, r/m8
o16 0F B6 /r
386+
16/32/64-bit
movzx instruction.
MOVZX r32, r/m16
o32 0F B7 /r
386+
16/32/64-bit
MOVZX r32, r/m8
o32 0F B6 /r
386+
16/32/64-bit
movzx instruction.
MOVZX r64, r/m16
o64 0F B7 /r
X64
64-bit
MOVZX r64, r/m8
o64 0F B6 /r
X64
64-bit
mpsadbw instruction.
MPSADBW xmm1, xmm2/m128, imm8
66 0F 3A 42 /r ib
SSE4.1
16/32/64-bit
mpsadbw instruction.
MPSADBW xmm1, xmm2/m128, imm8
66 0F 3A 42 /r ib
SSE4.1
16/32/64-bit
mpsadbw instruction.
MPSADBW xmm1, xmm2/m128, imm8
66 0F 3A 42 /r ib
SSE4.1
16/32/64-bit
mpsadbw instruction.
MPSADBW xmm1, xmm2/m128, imm8
66 0F 3A 42 /r ib
SSE4.1
16/32/64-bit
mul instruction.
MUL r/m8
F6 /4
8086+
16/32/64-bit
mul instruction.
MUL r/m16
o16 F7 /4
8086+
16/32/64-bit
mul instruction.
MUL r/m32
o32 F7 /4
386+
16/32/64-bit
mul instruction.
MUL r/m64
o64 F7 /4
X64
64-bit
mul instruction.
MUL r/m64
o64 F7 /4
X64
64-bit
MUL r/m32
o32 F7 /4
386+
16/32/64-bit
MUL r/m16
o16 F7 /4
8086+
16/32/64-bit
MUL r/m8
F6 /4
8086+
16/32/64-bit
mulpd instruction.
MULPD xmm1, xmm2/m128
66 0F 59 /r
SSE2
16/32/64-bit
mulpd instruction.
MULPD xmm1, xmm2/m128
66 0F 59 /r
SSE2
16/32/64-bit
mulps instruction.
MULPS xmm1, xmm2/m128
NP 0F 59 /r
SSE
16/32/64-bit
mulps instruction.
MULPS xmm1, xmm2/m128
NP 0F 59 /r
SSE
16/32/64-bit
mulsd instruction.
MULSD xmm1, xmm2/m64
F2 0F 59 /r
SSE2
16/32/64-bit
mulsd instruction.
MULSD xmm1, xmm2/m64
F2 0F 59 /r
SSE2
16/32/64-bit
mulss instruction.
MULSS xmm1, xmm2/m32
F3 0F 59 /r
SSE
16/32/64-bit
mulss instruction.
MULSS xmm1, xmm2/m32
F3 0F 59 /r
SSE
16/32/64-bit
mulx instruction.
MULX r32a, r32b, r/m32
VEX.LZ.F2.0F38.W0 F6 /r
BMI2
16/32/64-bit
mulx instruction.
MULX r64a, r64b, r/m64
VEX.LZ.F2.0F38.W1 F6 /r
BMI2
64-bit
mulx instruction.
MULX r32a, r32b, r/m32
VEX.LZ.F2.0F38.W0 F6 /r
BMI2
16/32/64-bit
mulx instruction.
MULX r64a, r64b, r/m64
VEX.LZ.F2.0F38.W1 F6 /r
BMI2
64-bit
mwait instruction.
MWAIT
NP 0F 01 C9
MONITOR
16/32/64-bit
mwaitx instruction.
MWAITX
NP 0F 01 FB
MONITORX
16/32/64-bit
neg instruction.
NEG r/m8
F6 /3
8086+
16/32/64-bit
neg instruction.
NEG r/m16
o16 F7 /3
8086+
16/32/64-bit
neg instruction.
NEG r/m32
o32 F7 /3
386+
16/32/64-bit
neg instruction.
NEG r/m64
o64 F7 /3
X64
64-bit
neg instruction.
NEG r/m64
o64 F7 /3
X64
64-bit
NEG r/m32
o32 F7 /3
386+
16/32/64-bit
NEG r/m16
o16 F7 /3
8086+
16/32/64-bit
NEG r/m8
F6 /3
8086+
16/32/64-bit
nop instruction.
NOP
o32 90
8086+
16/32/64-bit
NOP
o16 90
8086+
16/32/64-bit
nop instruction.
NOP r/m16
o16 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
nop instruction.
NOP r/m32
o32 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
nop instruction.
NOP r/m64
o64 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
nop instruction.
NOP r/m64
o64 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
NOP r/m32
o32 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
NOP r/m16
o16 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
not instruction.
NOT r/m8
F6 /2
8086+
16/32/64-bit
not instruction.
NOT r/m16
o16 F7 /2
8086+
16/32/64-bit
not instruction.
NOT r/m32
o32 F7 /2
386+
16/32/64-bit
not instruction.
NOT r/m64
o64 F7 /2
X64
64-bit
not instruction.
NOT r/m64
o64 F7 /2
X64
64-bit
NOT r/m32
o32 F7 /2
386+
16/32/64-bit
NOT r/m16
o16 F7 /2
8086+
16/32/64-bit
NOT r/m8
F6 /2
8086+
16/32/64-bit
or instruction.
OR r/m8, r8
08 /r
8086+
16/32/64-bit
or instruction.
OR r/m8, r8
08 /r
8086+
16/32/64-bit
or instruction.
OR r/m16, r16
o16 09 /r
8086+
16/32/64-bit
or instruction.
OR r/m16, r16
o16 09 /r
8086+
16/32/64-bit
or instruction.
OR r/m32, r32
o32 09 /r
386+
16/32/64-bit
or instruction.
OR r/m32, r32
o32 09 /r
386+
16/32/64-bit
or instruction.
OR r/m64, r64
o64 09 /r
X64
64-bit
or instruction.
OR r/m64, r64
o64 09 /r
X64
64-bit
or instruction.
OR r8, r/m8
0A /r
8086+
16/32/64-bit
or instruction.
OR r16, r/m16
o16 0B /r
8086+
16/32/64-bit
or instruction.
OR r32, r/m32
o32 0B /r
386+
16/32/64-bit
or instruction.
OR r64, r/m64
o64 0B /r
X64
64-bit
or instruction.
OR AL, imm8
0C ib
8086+
16/32/64-bit
OR r/m8, imm8
80 /1 ib
8086+
16/32/64-bit
or instruction.
OR AX, imm16
o16 0D iw
8086+
16/32/64-bit
OR r/m16, imm16
o16 81 /1 iw
8086+
16/32/64-bit
OR r/m16, imm8
o16 83 /1 ib
8086+
16/32/64-bit
or instruction.
OR EAX, imm32
o32 0D id
386+
16/32/64-bit
OR r/m32, imm32
o32 81 /1 id
386+
16/32/64-bit
OR r/m32, imm8
o32 83 /1 ib
386+
16/32/64-bit
or instruction.
OR RAX, imm32
o64 0D id
X64
64-bit
OR r/m64, imm32
o64 81 /1 id
X64
64-bit
OR r/m64, imm8
o64 83 /1 ib
X64
64-bit
or instruction.
OR r/m64, imm32
o64 81 /1 id
X64
64-bit
OR r/m64, imm8
o64 83 /1 ib
X64
64-bit
OR r/m32, imm32
o32 81 /1 id
386+
16/32/64-bit
OR r/m32, imm8
o32 83 /1 ib
386+
16/32/64-bit
OR r/m16, imm16
o16 81 /1 iw
8086+
16/32/64-bit
OR r/m16, imm8
o16 83 /1 ib
8086+
16/32/64-bit
OR r/m8, imm8
80 /1 ib
8086+
16/32/64-bit
or instruction.
OR AL, imm8
0C ib
8086+
16/32/64-bit
OR r/m8, imm8
80 /1 ib
8086+
16/32/64-bit
or instruction.
OR AX, imm16
o16 0D iw
8086+
16/32/64-bit
OR r/m16, imm16
o16 81 /1 iw
8086+
16/32/64-bit
OR r/m16, imm8
o16 83 /1 ib
8086+
16/32/64-bit
or instruction.
OR EAX, imm32
o32 0D id
386+
16/32/64-bit
OR r/m32, imm32
o32 81 /1 id
386+
16/32/64-bit
OR r/m32, imm8
o32 83 /1 ib
386+
16/32/64-bit
or instruction.
OR r/m32, imm32
o32 81 /1 id
386+
16/32/64-bit
OR r/m32, imm8
o32 83 /1 ib
386+
16/32/64-bit
OR r/m16, imm16
o16 81 /1 iw
8086+
16/32/64-bit
OR r/m16, imm8
o16 83 /1 ib
8086+
16/32/64-bit
OR r/m8, imm8
80 /1 ib
8086+
16/32/64-bit
orpd instruction.
ORPD xmm1, xmm2/m128
66 0F 56 /r
SSE2
16/32/64-bit
orpd instruction.
ORPD xmm1, xmm2/m128
66 0F 56 /r
SSE2
16/32/64-bit
orps instruction.
ORPS xmm1, xmm2/m128
NP 0F 56 /r
SSE
16/32/64-bit
orps instruction.
ORPS xmm1, xmm2/m128
NP 0F 56 /r
SSE
16/32/64-bit
out instruction.
OUT DX, AL
EE
8086+
16/32/64-bit
out instruction.
OUT imm8, AL
E6 ib
8086+
16/32/64-bit
out instruction.
OUT imm8, AL
E6 ib
8086+
16/32/64-bit
out instruction.
OUT DX, AX
o16 EF
8086+
16/32/64-bit
out instruction.
OUT imm8, AX
o16 E7 ib
8086+
16/32/64-bit
out instruction.
OUT imm8, AX
o16 E7 ib
8086+
16/32/64-bit
out instruction.
OUT DX, EAX
o32 EF
386+
16/32/64-bit
out instruction.
OUT imm8, EAX
o32 E7 ib
386+
16/32/64-bit
out instruction.
OUT imm8, EAX
o32 E7 ib
386+
16/32/64-bit
outsb instruction.
OUTSB
6E
186+
16/32/64-bit
outsd instruction.
OUTSD
o32 6F
386+
16/32/64-bit
outsw instruction.
OUTSW
o16 6F
186+
16/32/64-bit
pabsb instruction.
PABSB mm1, mm2/m64
NP 0F 38 1C /r
SSSE3
16/32/64-bit
pabsb instruction.
PABSB xmm1, xmm2/m128
66 0F 38 1C /r
SSSE3
16/32/64-bit
pabsb instruction.
PABSB mm1, mm2/m64
NP 0F 38 1C /r
SSSE3
16/32/64-bit
pabsb instruction.
PABSB xmm1, xmm2/m128
66 0F 38 1C /r
SSSE3
16/32/64-bit
pabsd instruction.
PABSD mm1, mm2/m64
NP 0F 38 1E /r
SSSE3
16/32/64-bit
pabsd instruction.
PABSD xmm1, xmm2/m128
66 0F 38 1E /r
SSSE3
16/32/64-bit
pabsd instruction.
PABSD mm1, mm2/m64
NP 0F 38 1E /r
SSSE3
16/32/64-bit
pabsd instruction.
PABSD xmm1, xmm2/m128
66 0F 38 1E /r
SSSE3
16/32/64-bit
pabsw instruction.
PABSW mm1, mm2/m64
NP 0F 38 1D /r
SSSE3
16/32/64-bit
pabsw instruction.
PABSW xmm1, xmm2/m128
66 0F 38 1D /r
SSSE3
16/32/64-bit
pabsw instruction.
PABSW mm1, mm2/m64
NP 0F 38 1D /r
SSSE3
16/32/64-bit
pabsw instruction.
PABSW xmm1, xmm2/m128
66 0F 38 1D /r
SSSE3
16/32/64-bit
packssdw instruction.
PACKSSDW mm1, mm2/m64
NP 0F 6B /r
MMX
16/32/64-bit
packssdw instruction.
PACKSSDW xmm1, xmm2/m128
66 0F 6B /r
SSE2
16/32/64-bit
packssdw instruction.
PACKSSDW mm1, mm2/m64
NP 0F 6B /r
MMX
16/32/64-bit
packssdw instruction.
PACKSSDW xmm1, xmm2/m128
66 0F 6B /r
SSE2
16/32/64-bit
packsswb instruction.
PACKSSWB mm1, mm2/m64
NP 0F 63 /r
MMX
16/32/64-bit
packsswb instruction.
PACKSSWB xmm1, xmm2/m128
66 0F 63 /r
SSE2
16/32/64-bit
packsswb instruction.
PACKSSWB mm1, mm2/m64
NP 0F 63 /r
MMX
16/32/64-bit
packsswb instruction.
PACKSSWB xmm1, xmm2/m128
66 0F 63 /r
SSE2
16/32/64-bit
packusdw instruction.
PACKUSDW xmm1, xmm2/m128
66 0F 38 2B /r
SSE4.1
16/32/64-bit
packusdw instruction.
PACKUSDW xmm1, xmm2/m128
66 0F 38 2B /r
SSE4.1
16/32/64-bit
packuswb instruction.
PACKUSWB mm, mm/m64
NP 0F 67 /r
MMX
16/32/64-bit
packuswb instruction.
PACKUSWB xmm1, xmm2/m128
66 0F 67 /r
SSE2
16/32/64-bit
packuswb instruction.
PACKUSWB mm, mm/m64
NP 0F 67 /r
MMX
16/32/64-bit
packuswb instruction.
PACKUSWB xmm1, xmm2/m128
66 0F 67 /r
SSE2
16/32/64-bit
paddb instruction.
PADDB mm, mm/m64
NP 0F FC /r
MMX
16/32/64-bit
paddb instruction.
PADDB xmm1, xmm2/m128
66 0F FC /r
SSE2
16/32/64-bit
paddb instruction.
PADDB mm, mm/m64
NP 0F FC /r
MMX
16/32/64-bit
paddb instruction.
PADDB xmm1, xmm2/m128
66 0F FC /r
SSE2
16/32/64-bit
paddd instruction.
PADDD mm, mm/m64
NP 0F FE /r
MMX
16/32/64-bit
paddd instruction.
PADDD xmm1, xmm2/m128
66 0F FE /r
SSE2
16/32/64-bit
paddd instruction.
PADDD mm, mm/m64
NP 0F FE /r
MMX
16/32/64-bit
paddd instruction.
PADDD xmm1, xmm2/m128
66 0F FE /r
SSE2
16/32/64-bit
paddq instruction.
PADDQ mm, mm/m64
NP 0F D4 /r
MMX
16/32/64-bit
paddq instruction.
PADDQ xmm1, xmm2/m128
66 0F D4 /r
SSE2
16/32/64-bit
paddq instruction.
PADDQ mm, mm/m64
NP 0F D4 /r
MMX
16/32/64-bit
paddq instruction.
PADDQ xmm1, xmm2/m128
66 0F D4 /r
SSE2
16/32/64-bit
paddsb instruction.
PADDSB mm, mm/m64
NP 0F EC /r
MMX
16/32/64-bit
paddsb instruction.
PADDSB xmm1, xmm2/m128
66 0F EC /r
SSE2
16/32/64-bit
paddsb instruction.
PADDSB mm, mm/m64
NP 0F EC /r
MMX
16/32/64-bit
paddsb instruction.
PADDSB xmm1, xmm2/m128
66 0F EC /r
SSE2
16/32/64-bit
paddsiw instruction.
PADDSIW mm, mm/m64
0F 51 /r
CYRIX_EMMI
16/32-bit
paddsiw instruction.
PADDSIW mm, mm/m64
0F 51 /r
CYRIX_EMMI
16/32-bit
paddsw instruction.
PADDSW mm, mm/m64
NP 0F ED /r
MMX
16/32/64-bit
paddsw instruction.
PADDSW xmm1, xmm2/m128
66 0F ED /r
SSE2
16/32/64-bit
paddsw instruction.
PADDSW mm, mm/m64
NP 0F ED /r
MMX
16/32/64-bit
paddsw instruction.
PADDSW xmm1, xmm2/m128
66 0F ED /r
SSE2
16/32/64-bit
paddusb instruction.
PADDUSB mm, mm/m64
NP 0F DC /r
MMX
16/32/64-bit
paddusb instruction.
PADDUSB xmm1, xmm2/m128
66 0F DC /r
SSE2
16/32/64-bit
paddusb instruction.
PADDUSB mm, mm/m64
NP 0F DC /r
MMX
16/32/64-bit
paddusb instruction.
PADDUSB xmm1, xmm2/m128
66 0F DC /r
SSE2
16/32/64-bit
paddusw instruction.
PADDUSW mm, mm/m64
NP 0F DD /r
MMX
16/32/64-bit
paddusw instruction.
PADDUSW xmm1, xmm2/m128
66 0F DD /r
SSE2
16/32/64-bit
paddusw instruction.
PADDUSW mm, mm/m64
NP 0F DD /r
MMX
16/32/64-bit
paddusw instruction.
PADDUSW xmm1, xmm2/m128
66 0F DD /r
SSE2
16/32/64-bit
paddw instruction.
PADDW mm, mm/m64
NP 0F FD /r
MMX
16/32/64-bit
paddw instruction.
PADDW xmm1, xmm2/m128
66 0F FD /r
SSE2
16/32/64-bit
paddw instruction.
PADDW mm, mm/m64
NP 0F FD /r
MMX
16/32/64-bit
paddw instruction.
PADDW xmm1, xmm2/m128
66 0F FD /r
SSE2
16/32/64-bit
palignr instruction.
PALIGNR mm1, mm2/m64, imm8
NP 0F 3A 0F /r ib
SSSE3
16/32/64-bit
palignr instruction.
PALIGNR xmm1, xmm2/m128, imm8
66 0F 3A 0F /r ib
SSSE3
16/32/64-bit
palignr instruction.
PALIGNR mm1, mm2/m64, imm8
NP 0F 3A 0F /r ib
SSSE3
16/32/64-bit
palignr instruction.
PALIGNR xmm1, xmm2/m128, imm8
66 0F 3A 0F /r ib
SSSE3
16/32/64-bit
palignr instruction.
PALIGNR mm1, mm2/m64, imm8
NP 0F 3A 0F /r ib
SSSE3
16/32/64-bit
palignr instruction.
PALIGNR xmm1, xmm2/m128, imm8
66 0F 3A 0F /r ib
SSSE3
16/32/64-bit
palignr instruction.
PALIGNR mm1, mm2/m64, imm8
NP 0F 3A 0F /r ib
SSSE3
16/32/64-bit
palignr instruction.
PALIGNR xmm1, xmm2/m128, imm8
66 0F 3A 0F /r ib
SSSE3
16/32/64-bit
pand instruction.
PAND mm, mm/m64
NP 0F DB /r
MMX
16/32/64-bit
pand instruction.
PAND xmm1, xmm2/m128
66 0F DB /r
SSE2
16/32/64-bit
pand instruction.
PAND mm, mm/m64
NP 0F DB /r
MMX
16/32/64-bit
pand instruction.
PAND xmm1, xmm2/m128
66 0F DB /r
SSE2
16/32/64-bit
pandn instruction.
PANDN mm, mm/m64
NP 0F DF /r
MMX
16/32/64-bit
pandn instruction.
PANDN xmm1, xmm2/m128
66 0F DF /r
SSE2
16/32/64-bit
pandn instruction.
PANDN mm, mm/m64
NP 0F DF /r
MMX
16/32/64-bit
pandn instruction.
PANDN xmm1, xmm2/m128
66 0F DF /r
SSE2
16/32/64-bit
pause instruction.
PAUSE
F3 90
Pentium 4 or later
16/32/64-bit
paveb instruction.
PAVEB mm, mm/m64
0F 50 /r
CYRIX_EMMI
16/32-bit
paveb instruction.
PAVEB mm, mm/m64
0F 50 /r
CYRIX_EMMI
16/32-bit
pavgb instruction.
PAVGB mm1, mm2/m64
NP 0F E0 /r
SSE
16/32/64-bit
pavgb instruction.
PAVGB xmm1, xmm2/m128
66 0F E0 /r
SSE2
16/32/64-bit
pavgb instruction.
PAVGB mm1, mm2/m64
NP 0F E0 /r
SSE
16/32/64-bit
pavgb instruction.
PAVGB xmm1, xmm2/m128
66 0F E0 /r
SSE2
16/32/64-bit
pavgusb instruction.
PAVGUSB mm, mm/m64
0F 0F /r BF
3DNOW
16/32/64-bit
pavgusb instruction.
PAVGUSB mm, mm/m64
0F 0F /r BF
3DNOW
16/32/64-bit
pavgw instruction.
PAVGW mm1, mm2/m64
NP 0F E3 /r
SSE
16/32/64-bit
pavgw instruction.
PAVGW xmm1, xmm2/m128
66 0F E3 /r
SSE2
16/32/64-bit
pavgw instruction.
PAVGW mm1, mm2/m64
NP 0F E3 /r
SSE
16/32/64-bit
pavgw instruction.
PAVGW xmm1, xmm2/m128
66 0F E3 /r
SSE2
16/32/64-bit
pblendvb instruction.
PBLENDVB xmm1, xmm2/m128, <XMM0>
66 0F 38 10 /r
SSE4.1
16/32/64-bit
pblendvb instruction.
PBLENDVB xmm1, xmm2/m128, <XMM0>
66 0F 38 10 /r
SSE4.1
16/32/64-bit
pblendw instruction.
PBLENDW xmm1, xmm2/m128, imm8
66 0F 3A 0E /r ib
SSE4.1
16/32/64-bit
pblendw instruction.
PBLENDW xmm1, xmm2/m128, imm8
66 0F 3A 0E /r ib
SSE4.1
16/32/64-bit
pblendw instruction.
PBLENDW xmm1, xmm2/m128, imm8
66 0F 3A 0E /r ib
SSE4.1
16/32/64-bit
pblendw instruction.
PBLENDW xmm1, xmm2/m128, imm8
66 0F 3A 0E /r ib
SSE4.1
16/32/64-bit
pbndkb instruction.
PBNDKB
NP 0F 01 C7
TSE
64-bit
pclmulhqhqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmulhqhqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmulhqlqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmulhqlqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmullqhqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmullqhqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmullqlqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmullqlqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmulqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmulqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmulqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pclmulqdq instruction.
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
pcmpeqb instruction.
PCMPEQB mm, mm/m64
NP 0F 74 /r
MMX
16/32/64-bit
pcmpeqb instruction.
PCMPEQB xmm1, xmm2/m128
66 0F 74 /r
SSE2
16/32/64-bit
pcmpeqb instruction.
PCMPEQB mm, mm/m64
NP 0F 74 /r
MMX
16/32/64-bit
pcmpeqb instruction.
PCMPEQB xmm1, xmm2/m128
66 0F 74 /r
SSE2
16/32/64-bit
pcmpeqd instruction.
PCMPEQD mm, mm/m64
NP 0F 76 /r
MMX
16/32/64-bit
pcmpeqd instruction.
PCMPEQD xmm1, xmm2/m128
66 0F 76 /r
SSE2
16/32/64-bit
pcmpeqd instruction.
PCMPEQD mm, mm/m64
NP 0F 76 /r
MMX
16/32/64-bit
pcmpeqd instruction.
PCMPEQD xmm1, xmm2/m128
66 0F 76 /r
SSE2
16/32/64-bit
pcmpeqq instruction.
PCMPEQQ xmm1, xmm2/m128
66 0F 38 29 /r
SSE4.1
16/32/64-bit
pcmpeqq instruction.
PCMPEQQ xmm1, xmm2/m128
66 0F 38 29 /r
SSE4.1
16/32/64-bit
pcmpeqw instruction.
PCMPEQW mm, mm/m64
NP 0F 75 /r
MMX
16/32/64-bit
pcmpeqw instruction.
PCMPEQW xmm1, xmm2/m128
66 0F 75 /r
SSE2
16/32/64-bit
pcmpeqw instruction.
PCMPEQW mm, mm/m64
NP 0F 75 /r
MMX
16/32/64-bit
pcmpeqw instruction.
PCMPEQW xmm1, xmm2/m128
66 0F 75 /r
SSE2
16/32/64-bit
pcmpestri instruction.
PCMPESTRI xmm1, xmm2/m128, imm8
66 0F 3A 61 /r ib
SSE4.2
16/32/64-bit
pcmpestri instruction.
PCMPESTRI xmm1, xmm2/m128, imm8
66 0F 3A 61 /r ib
SSE4.2
16/32/64-bit
pcmpestri instruction.
PCMPESTRI xmm1, xmm2/m128, imm8
66 0F 3A 61 /r ib
SSE4.2
16/32/64-bit
pcmpestri instruction.
PCMPESTRI xmm1, xmm2/m128, imm8
66 0F 3A 61 /r ib
SSE4.2
16/32/64-bit
pcmpestri64 instruction.
PCMPESTRI64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 61 /r ib
SSE4.2
64-bit
pcmpestri64 instruction.
PCMPESTRI64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 61 /r ib
SSE4.2
64-bit
pcmpestri64 instruction.
PCMPESTRI64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 61 /r ib
SSE4.2
64-bit
pcmpestri64 instruction.
PCMPESTRI64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 61 /r ib
SSE4.2
64-bit
pcmpestrm instruction.
PCMPESTRM xmm1, xmm2/m128, imm8
66 0F 3A 60 /r ib
SSE4.2
16/32/64-bit
pcmpestrm instruction.
PCMPESTRM xmm1, xmm2/m128, imm8
66 0F 3A 60 /r ib
SSE4.2
16/32/64-bit
pcmpestrm instruction.
PCMPESTRM xmm1, xmm2/m128, imm8
66 0F 3A 60 /r ib
SSE4.2
16/32/64-bit
pcmpestrm instruction.
PCMPESTRM xmm1, xmm2/m128, imm8
66 0F 3A 60 /r ib
SSE4.2
16/32/64-bit
pcmpestrm64 instruction.
PCMPESTRM64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 60 /r ib
SSE4.2
64-bit
pcmpestrm64 instruction.
PCMPESTRM64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 60 /r ib
SSE4.2
64-bit
pcmpestrm64 instruction.
PCMPESTRM64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 60 /r ib
SSE4.2
64-bit
pcmpestrm64 instruction.
PCMPESTRM64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 60 /r ib
SSE4.2
64-bit
pcmpgtb instruction.
PCMPGTB mm, mm/m64
NP 0F 64 /r
MMX
16/32/64-bit
pcmpgtb instruction.
PCMPGTB xmm1, xmm2/m128
66 0F 64 /r
SSE2
16/32/64-bit
pcmpgtb instruction.
PCMPGTB mm, mm/m64
NP 0F 64 /r
MMX
16/32/64-bit
pcmpgtb instruction.
PCMPGTB xmm1, xmm2/m128
66 0F 64 /r
SSE2
16/32/64-bit
pcmpgtd instruction.
PCMPGTD mm, mm/m64
NP 0F 66 /r
MMX
16/32/64-bit
pcmpgtd instruction.
PCMPGTD xmm1, xmm2/m128
66 0F 66 /r
SSE2
16/32/64-bit
pcmpgtd instruction.
PCMPGTD mm, mm/m64
NP 0F 66 /r
MMX
16/32/64-bit
pcmpgtd instruction.
PCMPGTD xmm1, xmm2/m128
66 0F 66 /r
SSE2
16/32/64-bit
pcmpgtq instruction.
PCMPGTQ xmm1, xmm2/m128
66 0F 38 37 /r
SSE4.2
16/32/64-bit
pcmpgtq instruction.
PCMPGTQ xmm1, xmm2/m128
66 0F 38 37 /r
SSE4.2
16/32/64-bit
pcmpgtw instruction.
PCMPGTW mm, mm/m64
NP 0F 65 /r
MMX
16/32/64-bit
pcmpgtw instruction.
PCMPGTW xmm1, xmm2/m128
66 0F 65 /r
SSE2
16/32/64-bit
pcmpgtw instruction.
PCMPGTW mm, mm/m64
NP 0F 65 /r
MMX
16/32/64-bit
pcmpgtw instruction.
PCMPGTW xmm1, xmm2/m128
66 0F 65 /r
SSE2
16/32/64-bit
pcmpistri instruction.
PCMPISTRI xmm1, xmm2/m128, imm8
66 0F 3A 63 /r ib
SSE4.2
16/32/64-bit
pcmpistri instruction.
PCMPISTRI xmm1, xmm2/m128, imm8
66 0F 3A 63 /r ib
SSE4.2
16/32/64-bit
pcmpistri instruction.
PCMPISTRI xmm1, xmm2/m128, imm8
66 0F 3A 63 /r ib
SSE4.2
16/32/64-bit
pcmpistri instruction.
PCMPISTRI xmm1, xmm2/m128, imm8
66 0F 3A 63 /r ib
SSE4.2
16/32/64-bit
pcmpistrm instruction.
PCMPISTRM xmm1, xmm2/m128, imm8
66 0F 3A 62 /r ib
SSE4.2
16/32/64-bit
pcmpistrm instruction.
PCMPISTRM xmm1, xmm2/m128, imm8
66 0F 3A 62 /r ib
SSE4.2
16/32/64-bit
pcmpistrm instruction.
PCMPISTRM xmm1, xmm2/m128, imm8
66 0F 3A 62 /r ib
SSE4.2
16/32/64-bit
pcmpistrm instruction.
PCMPISTRM xmm1, xmm2/m128, imm8
66 0F 3A 62 /r ib
SSE4.2
16/32/64-bit
pcommit instruction.
PCOMMIT
66 0F AE F8
PCOMMIT
16/32/64-bit
pconfig instruction.
PCONFIG
NP 0F 01 C5
PCONFIG
16/32/64-bit
pdep instruction.
PDEP r32a, r32b, r/m32
VEX.LZ.F2.0F38.W0 F5 /r
BMI2
16/32/64-bit
pdep instruction.
PDEP r64a, r64b, r/m64
VEX.LZ.F2.0F38.W1 F5 /r
BMI2
64-bit
pdep instruction.
PDEP r32a, r32b, r/m32
VEX.LZ.F2.0F38.W0 F5 /r
BMI2
16/32/64-bit
pdep instruction.
PDEP r64a, r64b, r/m64
VEX.LZ.F2.0F38.W1 F5 /r
BMI2
64-bit
pdistib instruction.
PDISTIB mm, m64
0F 54 /r
CYRIX_EMMI
16/32-bit
pext instruction.
PEXT r32a, r32b, r/m32
VEX.LZ.F3.0F38.W0 F5 /r
BMI2
16/32/64-bit
pext instruction.
PEXT r64a, r64b, r/m64
VEX.LZ.F3.0F38.W1 F5 /r
BMI2
64-bit
pext instruction.
PEXT r32a, r32b, r/m32
VEX.LZ.F3.0F38.W0 F5 /r
BMI2
16/32/64-bit
pext instruction.
PEXT r64a, r64b, r/m64
VEX.LZ.F3.0F38.W1 F5 /r
BMI2
64-bit
pextrb instruction.
PEXTRB r32/m8, xmm2, imm8
66 0F 3A 14 /r ib
SSE4.1
16/32/64-bit
pextrb instruction.
PEXTRB r64/m8, xmm2, imm8
66 o64 0F 3A 14 /r ib
SSE4.1
64-bit
pextrb instruction.
PEXTRB r32/m8, xmm2, imm8
66 0F 3A 14 /r ib
SSE4.1
16/32/64-bit
pextrb instruction.
PEXTRB r32/m8, xmm2, imm8
66 0F 3A 14 /r ib
SSE4.1
16/32/64-bit
pextrb instruction.
PEXTRB r64/m8, xmm2, imm8
66 o64 0F 3A 14 /r ib
SSE4.1
64-bit
pextrb instruction.
PEXTRB r32/m8, xmm2, imm8
66 0F 3A 14 /r ib
SSE4.1
16/32/64-bit
pextrd instruction.
PEXTRD r/m32, xmm2, imm8
66 0F 3A 16 /r ib
SSE4.1
16/32/64-bit
pextrd instruction.
PEXTRD r/m32, xmm2, imm8
66 0F 3A 16 /r ib
SSE4.1
16/32/64-bit
pextrd instruction.
PEXTRD r/m32, xmm2, imm8
66 0F 3A 16 /r ib
SSE4.1
16/32/64-bit
pextrd instruction.
PEXTRD r/m32, xmm2, imm8
66 0F 3A 16 /r ib
SSE4.1
16/32/64-bit
pextrq instruction.
PEXTRQ r/m64, xmm2, imm8
66 o64 0F 3A 16 /r ib
SSE4.1
64-bit
pextrq instruction.
PEXTRQ r/m64, xmm2, imm8
66 o64 0F 3A 16 /r ib
SSE4.1
64-bit
pextrq instruction.
PEXTRQ r/m64, xmm2, imm8
66 o64 0F 3A 16 /r ib
SSE4.1
64-bit
pextrq instruction.
PEXTRQ r/m64, xmm2, imm8
66 o64 0F 3A 16 /r ib
SSE4.1
64-bit
pextrw instruction.
PEXTRW r32, mm, imm8
NP 0F C5 /r ib
SSE
16/32/64-bit
pextrw instruction.
PEXTRW r64, mm, imm8
NP o64 0F C5 /r ib
SSE
64-bit
pextrw instruction.
PEXTRW r32, xmm, imm8
66 0F C5 /r ib
SSE2
16/32/64-bit
pextrw instruction.
PEXTRW r64, xmm, imm8
66 o64 0F C5 /r ib
SSE2
64-bit
pextrw instruction.
PEXTRW r32/m16, xmm, imm8
66 0F 3A 15 /r ib
SSE4.1
16/32/64-bit
pextrw instruction.
PEXTRW r32, mm, imm8
NP 0F C5 /r ib
SSE
16/32/64-bit
pextrw instruction.
PEXTRW r64, mm, imm8
NP o64 0F C5 /r ib
SSE
64-bit
pextrw instruction.
PEXTRW r32, xmm, imm8
66 0F C5 /r ib
SSE2
16/32/64-bit
pextrw instruction.
PEXTRW r64, xmm, imm8
66 o64 0F C5 /r ib
SSE2
64-bit
pextrw instruction.
PEXTRW r32/m16, xmm, imm8
66 0F 3A 15 /r ib
SSE4.1
16/32/64-bit
pf2id instruction.
PF2ID mm, mm/m64
0F 0F /r 1D
3DNOW
16/32/64-bit
pf2id instruction.
PF2ID mm, mm/m64
0F 0F /r 1D
3DNOW
16/32/64-bit
pf2iw instruction.
PF2IW mm, mm/m64
0F 0F /r 1C
3DNOWEXT
16/32/64-bit
pf2iw instruction.
PF2IW mm, mm/m64
0F 0F /r 1C
3DNOWEXT
16/32/64-bit
pfacc instruction.
PFACC mm, mm/m64
0F 0F /r AE
3DNOW
16/32/64-bit
pfacc instruction.
PFACC mm, mm/m64
0F 0F /r AE
3DNOW
16/32/64-bit
pfadd instruction.
PFADD mm, mm/m64
0F 0F /r 9E
3DNOW
16/32/64-bit
pfadd instruction.
PFADD mm, mm/m64
0F 0F /r 9E
3DNOW
16/32/64-bit
pfcmpeq instruction.
PFCMPEQ mm, mm/m64
0F 0F /r B0
3DNOW
16/32/64-bit
pfcmpeq instruction.
PFCMPEQ mm, mm/m64
0F 0F /r B0
3DNOW
16/32/64-bit
pfcmpge instruction.
PFCMPGE mm, mm/m64
0F 0F /r 90
3DNOW
16/32/64-bit
pfcmpge instruction.
PFCMPGE mm, mm/m64
0F 0F /r 90
3DNOW
16/32/64-bit
pfcmpgt instruction.
PFCMPGT mm, mm/m64
0F 0F /r A0
3DNOW
16/32/64-bit
pfcmpgt instruction.
PFCMPGT mm, mm/m64
0F 0F /r A0
3DNOW
16/32/64-bit
pfmax instruction.
PFMAX mm, mm/m64
0F 0F /r A4
3DNOW
16/32/64-bit
pfmax instruction.
PFMAX mm, mm/m64
0F 0F /r A4
3DNOW
16/32/64-bit
pfmin instruction.
PFMIN mm, mm/m64
0F 0F /r 94
3DNOW
16/32/64-bit
pfmin instruction.
PFMIN mm, mm/m64
0F 0F /r 94
3DNOW
16/32/64-bit
pfmul instruction.
PFMUL mm, mm/m64
0F 0F /r B4
3DNOW
16/32/64-bit
pfmul instruction.
PFMUL mm, mm/m64
0F 0F /r B4
3DNOW
16/32/64-bit
pfnacc instruction.
PFNACC mm, mm/m64
0F 0F /r 8A
3DNOWEXT
16/32/64-bit
pfnacc instruction.
PFNACC mm, mm/m64
0F 0F /r 8A
3DNOWEXT
16/32/64-bit
pfpnacc instruction.
PFPNACC mm, mm/m64
0F 0F /r 8E
3DNOWEXT
16/32/64-bit
pfpnacc instruction.
PFPNACC mm, mm/m64
0F 0F /r 8E
3DNOWEXT
16/32/64-bit
pfrcp instruction.
PFRCP mm, mm/m64
0F 0F /r 96
3DNOW
16/32/64-bit
pfrcp instruction.
PFRCP mm, mm/m64
0F 0F /r 96
3DNOW
16/32/64-bit
pfrcpit1 instruction.
PFRCPIT1 mm, mm/m64
0F 0F /r A6
3DNOW
16/32/64-bit
pfrcpit1 instruction.
PFRCPIT1 mm, mm/m64
0F 0F /r A6
3DNOW
16/32/64-bit
pfrcpit2 instruction.
PFRCPIT2 mm, mm/m64
0F 0F /r B6
3DNOW
16/32/64-bit
pfrcpit2 instruction.
PFRCPIT2 mm, mm/m64
0F 0F /r B6
3DNOW
16/32/64-bit
pfrcpv instruction.
PFRCPV mm, mm/m64
0F 0F /r 86
AMD Geode GX/LX
16/32-bit
pfrcpv instruction.
PFRCPV mm, mm/m64
0F 0F /r 86
AMD Geode GX/LX
16/32-bit
pfrsqit1 instruction.
PFRSQIT1 mm, mm/m64
0F 0F /r A7
3DNOW
16/32/64-bit
pfrsqit1 instruction.
PFRSQIT1 mm, mm/m64
0F 0F /r A7
3DNOW
16/32/64-bit
pfrsqrt instruction.
PFRSQRT mm, mm/m64
0F 0F /r 97
3DNOW
16/32/64-bit
pfrsqrt instruction.
PFRSQRT mm, mm/m64
0F 0F /r 97
3DNOW
16/32/64-bit
pfrsqrtv instruction.
PFRSQRTV mm, mm/m64
0F 0F /r 87
AMD Geode GX/LX
16/32-bit
pfrsqrtv instruction.
PFRSQRTV mm, mm/m64
0F 0F /r 87
AMD Geode GX/LX
16/32-bit
pfsub instruction.
PFSUB mm, mm/m64
0F 0F /r 9A
3DNOW
16/32/64-bit
pfsub instruction.
PFSUB mm, mm/m64
0F 0F /r 9A
3DNOW
16/32/64-bit
pfsubr instruction.
PFSUBR mm, mm/m64
0F 0F /r AA
3DNOW
16/32/64-bit
pfsubr instruction.
PFSUBR mm, mm/m64
0F 0F /r AA
3DNOW
16/32/64-bit
phaddd instruction.
PHADDD mm1, mm2/m64
NP 0F 38 02 /r
SSSE3
16/32/64-bit
phaddd instruction.
PHADDD xmm1, xmm2/m128
66 0F 38 02 /r
SSSE3
16/32/64-bit
phaddd instruction.
PHADDD mm1, mm2/m64
NP 0F 38 02 /r
SSSE3
16/32/64-bit
phaddd instruction.
PHADDD xmm1, xmm2/m128
66 0F 38 02 /r
SSSE3
16/32/64-bit
phaddsw instruction.
PHADDSW mm1, mm2/m64
NP 0F 38 03 /r
SSSE3
16/32/64-bit
phaddsw instruction.
PHADDSW xmm1, xmm2/m128
66 0F 38 03 /r
SSSE3
16/32/64-bit
phaddsw instruction.
PHADDSW mm1, mm2/m64
NP 0F 38 03 /r
SSSE3
16/32/64-bit
phaddsw instruction.
PHADDSW xmm1, xmm2/m128
66 0F 38 03 /r
SSSE3
16/32/64-bit
phaddw instruction.
PHADDW mm1, mm2/m64
NP 0F 38 01 /r
SSSE3
16/32/64-bit
phaddw instruction.
PHADDW xmm1, xmm2/m128
66 0F 38 01 /r
SSSE3
16/32/64-bit
phaddw instruction.
PHADDW mm1, mm2/m64
NP 0F 38 01 /r
SSSE3
16/32/64-bit
phaddw instruction.
PHADDW xmm1, xmm2/m128
66 0F 38 01 /r
SSSE3
16/32/64-bit
phminposuw instruction.
PHMINPOSUW xmm1, xmm2/m128
66 0F 38 41 /r
SSE4.1
16/32/64-bit
phminposuw instruction.
PHMINPOSUW xmm1, xmm2/m128
66 0F 38 41 /r
SSE4.1
16/32/64-bit
phsubd instruction.
PHSUBD mm1, mm2/m64
NP 0F 38 06 /r
SSSE3
16/32/64-bit
phsubd instruction.
PHSUBD xmm1, xmm2/m128
66 0F 38 06 /r
SSSE3
16/32/64-bit
phsubd instruction.
PHSUBD mm1, mm2/m64
NP 0F 38 06 /r
SSSE3
16/32/64-bit
phsubd instruction.
PHSUBD xmm1, xmm2/m128
66 0F 38 06 /r
SSSE3
16/32/64-bit
phsubsw instruction.
PHSUBSW mm1, mm2/m64
NP 0F 38 07 /r
SSSE3
16/32/64-bit
phsubsw instruction.
PHSUBSW xmm1, xmm2/m128
66 0F 38 07 /r
SSSE3
16/32/64-bit
phsubsw instruction.
PHSUBSW mm1, mm2/m64
NP 0F 38 07 /r
SSSE3
16/32/64-bit
phsubsw instruction.
PHSUBSW xmm1, xmm2/m128
66 0F 38 07 /r
SSSE3
16/32/64-bit
phsubw instruction.
PHSUBW mm1, mm2/m64
NP 0F 38 05 /r
SSSE3
16/32/64-bit
phsubw instruction.
PHSUBW xmm1, xmm2/m128
66 0F 38 05 /r
SSSE3
16/32/64-bit
phsubw instruction.
PHSUBW mm1, mm2/m64
NP 0F 38 05 /r
SSSE3
16/32/64-bit
phsubw instruction.
PHSUBW xmm1, xmm2/m128
66 0F 38 05 /r
SSSE3
16/32/64-bit
pi2fd instruction.
PI2FD mm, mm/m64
0F 0F /r 0D
3DNOW
16/32/64-bit
pi2fd instruction.
PI2FD mm, mm/m64
0F 0F /r 0D
3DNOW
16/32/64-bit
pi2fw instruction.
PI2FW mm, mm/m64
0F 0F /r 0C
3DNOWEXT
16/32/64-bit
pi2fw instruction.
PI2FW mm, mm/m64
0F 0F /r 0C
3DNOWEXT
16/32/64-bit
pinsrb instruction.
PINSRB xmm1, r32/m8, imm8
66 0F 3A 20 /r ib
SSE4.1
16/32/64-bit
pinsrb instruction.
PINSRB xmm1, r64/m8, imm8
66 o64 0F 3A 20 /r ib
SSE4.1
64-bit
pinsrb instruction.
PINSRB xmm1, r32/m8, imm8
66 0F 3A 20 /r ib
SSE4.1
16/32/64-bit
pinsrb instruction.
PINSRB xmm1, r32/m8, imm8
66 0F 3A 20 /r ib
SSE4.1
16/32/64-bit
pinsrb instruction.
PINSRB xmm1, r64/m8, imm8
66 o64 0F 3A 20 /r ib
SSE4.1
64-bit
pinsrb instruction.
PINSRB xmm1, r32/m8, imm8
66 0F 3A 20 /r ib
SSE4.1
16/32/64-bit
pinsrd instruction.
PINSRD xmm1, r/m32, imm8
66 0F 3A 22 /r ib
SSE4.1
16/32/64-bit
pinsrd instruction.
PINSRD xmm1, r/m32, imm8
66 0F 3A 22 /r ib
SSE4.1
16/32/64-bit
pinsrd instruction.
PINSRD xmm1, r/m32, imm8
66 0F 3A 22 /r ib
SSE4.1
16/32/64-bit
pinsrd instruction.
PINSRD xmm1, r/m32, imm8
66 0F 3A 22 /r ib
SSE4.1
16/32/64-bit
pinsrq instruction.
PINSRQ xmm1, r/m64, imm8
66 o64 0F 3A 22 /r ib
SSE4.1
64-bit
pinsrq instruction.
PINSRQ xmm1, r/m64, imm8
66 o64 0F 3A 22 /r ib
SSE4.1
64-bit
pinsrq instruction.
PINSRQ xmm1, r/m64, imm8
66 o64 0F 3A 22 /r ib
SSE4.1
64-bit
pinsrq instruction.
PINSRQ xmm1, r/m64, imm8
66 o64 0F 3A 22 /r ib
SSE4.1
64-bit
pinsrw instruction.
PINSRW mm, r32/m16, imm8
NP 0F C4 /r ib
SSE
16/32/64-bit
pinsrw instruction.
PINSRW xmm, r32/m16, imm8
66 0F C4 /r ib
SSE2
16/32/64-bit
pinsrw instruction.
PINSRW mm, r64/m16, imm8
NP o64 0F C4 /r ib
SSE
64-bit
pinsrw instruction.
PINSRW xmm, r64/m16, imm8
66 o64 0F C4 /r ib
SSE2
64-bit
pinsrw instruction.
PINSRW mm, r32/m16, imm8
NP 0F C4 /r ib
SSE
16/32/64-bit
pinsrw instruction.
PINSRW xmm, r32/m16, imm8
66 0F C4 /r ib
SSE2
16/32/64-bit
pinsrw instruction.
PINSRW mm, r32/m16, imm8
NP 0F C4 /r ib
SSE
16/32/64-bit
pinsrw instruction.
PINSRW xmm, r32/m16, imm8
66 0F C4 /r ib
SSE2
16/32/64-bit
pinsrw instruction.
PINSRW mm, r64/m16, imm8
NP o64 0F C4 /r ib
SSE
64-bit
pinsrw instruction.
PINSRW xmm, r64/m16, imm8
66 o64 0F C4 /r ib
SSE2
64-bit
pinsrw instruction.
PINSRW mm, r32/m16, imm8
NP 0F C4 /r ib
SSE
16/32/64-bit
pinsrw instruction.
PINSRW xmm, r32/m16, imm8
66 0F C4 /r ib
SSE2
16/32/64-bit
pmachriw instruction.
PMACHRIW mm, m64
0F 5E /r
CYRIX_EMMI
16/32-bit
pmaddubsw instruction.
PMADDUBSW mm1, mm2/m64
NP 0F 38 04 /r
SSSE3
16/32/64-bit
pmaddubsw instruction.
PMADDUBSW xmm1, xmm2/m128
66 0F 38 04 /r
SSSE3
16/32/64-bit
pmaddubsw instruction.
PMADDUBSW mm1, mm2/m64
NP 0F 38 04 /r
SSSE3
16/32/64-bit
pmaddubsw instruction.
PMADDUBSW xmm1, xmm2/m128
66 0F 38 04 /r
SSSE3
16/32/64-bit
pmaddwd instruction.
PMADDWD mm, mm/m64
NP 0F F5 /r
MMX
16/32/64-bit
pmaddwd instruction.
PMADDWD xmm1, xmm2/m128
66 0F F5 /r
SSE2
16/32/64-bit
pmaddwd instruction.
PMADDWD mm, mm/m64
NP 0F F5 /r
MMX
16/32/64-bit
pmaddwd instruction.
PMADDWD xmm1, xmm2/m128
66 0F F5 /r
SSE2
16/32/64-bit
pmagw instruction.
PMAGW mm, mm/m64
0F 52 /r
CYRIX_EMMI
16/32-bit
pmagw instruction.
PMAGW mm, mm/m64
0F 52 /r
CYRIX_EMMI
16/32-bit
pmaxsb instruction.
PMAXSB xmm1, xmm2/m128
66 0F 38 3C /r
SSE4.1
16/32/64-bit
pmaxsb instruction.
PMAXSB xmm1, xmm2/m128
66 0F 38 3C /r
SSE4.1
16/32/64-bit
pmaxsd instruction.
PMAXSD xmm1, xmm2/m128
66 0F 38 3D /r
SSE4.1
16/32/64-bit
pmaxsd instruction.
PMAXSD xmm1, xmm2/m128
66 0F 38 3D /r
SSE4.1
16/32/64-bit
pmaxsw instruction.
PMAXSW mm1, mm2/m64
NP 0F EE /r
SSE
16/32/64-bit
pmaxsw instruction.
PMAXSW xmm1, xmm2/m128
66 0F EE /r
SSE2
16/32/64-bit
pmaxsw instruction.
PMAXSW mm1, mm2/m64
NP 0F EE /r
SSE
16/32/64-bit
pmaxsw instruction.
PMAXSW xmm1, xmm2/m128
66 0F EE /r
SSE2
16/32/64-bit
pmaxub instruction.
PMAXUB mm1, mm2/m64
NP 0F DE /r
SSE
16/32/64-bit
pmaxub instruction.
PMAXUB xmm1, xmm2/m128
66 0F DE /r
SSE2
16/32/64-bit
pmaxub instruction.
PMAXUB mm1, mm2/m64
NP 0F DE /r
SSE
16/32/64-bit
pmaxub instruction.
PMAXUB xmm1, xmm2/m128
66 0F DE /r
SSE2
16/32/64-bit
pmaxud instruction.
PMAXUD xmm1, xmm2/m128
66 0F 38 3F /r
SSE4.1
16/32/64-bit
pmaxud instruction.
PMAXUD xmm1, xmm2/m128
66 0F 38 3F /r
SSE4.1
16/32/64-bit
pmaxuw instruction.
PMAXUW xmm1, xmm2/m128
66 0F 38 3E /r
SSE4.1
16/32/64-bit
pmaxuw instruction.
PMAXUW xmm1, xmm2/m128
66 0F 38 3E /r
SSE4.1
16/32/64-bit
pminsb instruction.
PMINSB xmm1, xmm2/m128
66 0F 38 38 /r
SSE4.1
16/32/64-bit
pminsb instruction.
PMINSB xmm1, xmm2/m128
66 0F 38 38 /r
SSE4.1
16/32/64-bit
pminsd instruction.
PMINSD xmm1, xmm2/m128
66 0F 38 39 /r
SSE4.1
16/32/64-bit
pminsd instruction.
PMINSD xmm1, xmm2/m128
66 0F 38 39 /r
SSE4.1
16/32/64-bit
pminsw instruction.
PMINSW mm1, mm2/m64
NP 0F EA /r
SSE
16/32/64-bit
pminsw instruction.
PMINSW xmm1, xmm2/m128
66 0F EA /r
SSE2
16/32/64-bit
pminsw instruction.
PMINSW mm1, mm2/m64
NP 0F EA /r
SSE
16/32/64-bit
pminsw instruction.
PMINSW xmm1, xmm2/m128
66 0F EA /r
SSE2
16/32/64-bit
pminub instruction.
PMINUB mm1, mm2/m64
NP 0F DA /r
SSE
16/32/64-bit
pminub instruction.
PMINUB xmm1, xmm2/m128
66 0F DA /r
SSE2
16/32/64-bit
pminub instruction.
PMINUB mm1, mm2/m64
NP 0F DA /r
SSE
16/32/64-bit
pminub instruction.
PMINUB xmm1, xmm2/m128
66 0F DA /r
SSE2
16/32/64-bit
pminud instruction.
PMINUD xmm1, xmm2/m128
66 0F 38 3B /r
SSE4.1
16/32/64-bit
pminud instruction.
PMINUD xmm1, xmm2/m128
66 0F 38 3B /r
SSE4.1
16/32/64-bit
pminuw instruction.
PMINUW xmm1, xmm2/m128
66 0F 38 3A /r
SSE4.1
16/32/64-bit
pminuw instruction.
PMINUW xmm1, xmm2/m128
66 0F 38 3A /r
SSE4.1
16/32/64-bit
pmovmskb instruction.
PMOVMSKB r32, mm
NP 0F D7 /r
SSE
16/32/64-bit
pmovmskb instruction.
PMOVMSKB r64, mm
NP o64 0F D7 /r
SSE
64-bit
pmovmskb instruction.
PMOVMSKB r32, xmm
66 0F D7 /r
SSE2
16/32/64-bit
pmovmskb instruction.
PMOVMSKB r64, xmm
66 o64 0F D7 /r
SSE2
64-bit
pmovsxbd instruction.
PMOVSXBD xmm1, xmm2/m32
66 0F 38 21 /r
SSE4.1
16/32/64-bit
pmovsxbd instruction.
PMOVSXBD xmm1, xmm2/m32
66 0F 38 21 /r
SSE4.1
16/32/64-bit
pmovsxbq instruction.
PMOVSXBQ xmm1, xmm2/m16
66 0F 38 22 /r
SSE4.1
16/32/64-bit
pmovsxbq instruction.
PMOVSXBQ xmm1, xmm2/m16
66 0F 38 22 /r
SSE4.1
16/32/64-bit
pmovsxbw instruction.
PMOVSXBW xmm1, xmm2/m64
66 0F 38 20 /r
SSE4.1
16/32/64-bit
pmovsxbw instruction.
PMOVSXBW xmm1, xmm2/m64
66 0F 38 20 /r
SSE4.1
16/32/64-bit
pmovsxdq instruction.
PMOVSXDQ xmm1, xmm2/m64
66 0F 38 25 /r
SSE4.1
16/32/64-bit
pmovsxdq instruction.
PMOVSXDQ xmm1, xmm2/m64
66 0F 38 25 /r
SSE4.1
16/32/64-bit
pmovsxwd instruction.
PMOVSXWD xmm1, xmm2/m64
66 0F 38 23 /r
SSE4.1
16/32/64-bit
pmovsxwd instruction.
PMOVSXWD xmm1, xmm2/m64
66 0F 38 23 /r
SSE4.1
16/32/64-bit
pmovsxwq instruction.
PMOVSXWQ xmm1, xmm2/m32
66 0F 38 24 /r
SSE4.1
16/32/64-bit
pmovsxwq instruction.
PMOVSXWQ xmm1, xmm2/m32
66 0F 38 24 /r
SSE4.1
16/32/64-bit
pmovzxbd instruction.
PMOVZXBD xmm1, xmm2/m32
66 0F 38 31 /r
SSE4.1
16/32/64-bit
pmovzxbd instruction.
PMOVZXBD xmm1, xmm2/m32
66 0F 38 31 /r
SSE4.1
16/32/64-bit
pmovzxbq instruction.
PMOVZXBQ xmm1, xmm2/m16
66 0F 38 32 /r
SSE4.1
16/32/64-bit
pmovzxbq instruction.
PMOVZXBQ xmm1, xmm2/m16
66 0F 38 32 /r
SSE4.1
16/32/64-bit
pmovzxbw instruction.
PMOVZXBW xmm1, xmm2/m64
66 0F 38 30 /r
SSE4.1
16/32/64-bit
pmovzxbw instruction.
PMOVZXBW xmm1, xmm2/m64
66 0F 38 30 /r
SSE4.1
16/32/64-bit
pmovzxdq instruction.
PMOVZXDQ xmm1, xmm2/m64
66 0F 38 35 /r
SSE4.1
16/32/64-bit
pmovzxdq instruction.
PMOVZXDQ xmm1, xmm2/m64
66 0F 38 35 /r
SSE4.1
16/32/64-bit
pmovzxwd instruction.
PMOVZXWD xmm1, xmm2/m64
66 0F 38 33 /r
SSE4.1
16/32/64-bit
pmovzxwd instruction.
PMOVZXWD xmm1, xmm2/m64
66 0F 38 33 /r
SSE4.1
16/32/64-bit
pmovzxwq instruction.
PMOVZXWQ xmm1, xmm2/m32
66 0F 38 34 /r
SSE4.1
16/32/64-bit
pmovzxwq instruction.
PMOVZXWQ xmm1, xmm2/m32
66 0F 38 34 /r
SSE4.1
16/32/64-bit
pmuldq instruction.
PMULDQ xmm1, xmm2/m128
66 0F 38 28 /r
SSE4.1
16/32/64-bit
pmuldq instruction.
PMULDQ xmm1, xmm2/m128
66 0F 38 28 /r
SSE4.1
16/32/64-bit
pmulhriw instruction.
PMULHRIW mm, mm/m64
0F 5D /r
CYRIX_EMMI
16/32-bit
pmulhriw instruction.
PMULHRIW mm, mm/m64
0F 5D /r
CYRIX_EMMI
16/32-bit
pmulhrsw instruction.
PMULHRSW mm1, mm2/m64
NP 0F 38 0B /r
SSSE3
16/32/64-bit
pmulhrsw instruction.
PMULHRSW xmm1, xmm2/m128
66 0F 38 0B /r
SSSE3
16/32/64-bit
pmulhrsw instruction.
PMULHRSW mm1, mm2/m64
NP 0F 38 0B /r
SSSE3
16/32/64-bit
pmulhrsw instruction.
PMULHRSW xmm1, xmm2/m128
66 0F 38 0B /r
SSSE3
16/32/64-bit
pmulhrw instruction.
PMULHRW mm, mm/m64
0F 0F /r B7
3DNOW
16/32/64-bit
pmulhrw instruction.
PMULHRW mm, mm/m64
0F 0F /r B7
3DNOW
16/32/64-bit
pmulhrw_cyrix instruction.
PMULHRW mm, mm/m64
0F 59 /r
CYRIX_EMMI
16/32-bit
pmulhrw_cyrix instruction.
PMULHRW mm, mm/m64
0F 59 /r
CYRIX_EMMI
16/32-bit
pmulhuw instruction.
PMULHUW mm1, mm2/m64
NP 0F E4 /r
SSE
16/32/64-bit
pmulhuw instruction.
PMULHUW xmm1, xmm2/m128
66 0F E4 /r
SSE2
16/32/64-bit
pmulhuw instruction.
PMULHUW mm1, mm2/m64
NP 0F E4 /r
SSE
16/32/64-bit
pmulhuw instruction.
PMULHUW xmm1, xmm2/m128
66 0F E4 /r
SSE2
16/32/64-bit
pmulhw instruction.
PMULHW mm, mm/m64
NP 0F E5 /r
MMX
16/32/64-bit
pmulhw instruction.
PMULHW xmm1, xmm2/m128
66 0F E5 /r
SSE2
16/32/64-bit
pmulhw instruction.
PMULHW mm, mm/m64
NP 0F E5 /r
MMX
16/32/64-bit
pmulhw instruction.
PMULHW xmm1, xmm2/m128
66 0F E5 /r
SSE2
16/32/64-bit
pmulld instruction.
PMULLD xmm1, xmm2/m128
66 0F 38 40 /r
SSE4.1
16/32/64-bit
pmulld instruction.
PMULLD xmm1, xmm2/m128
66 0F 38 40 /r
SSE4.1
16/32/64-bit
pmullw instruction.
PMULLW mm, mm/m64
NP 0F D5 /r
MMX
16/32/64-bit
pmullw instruction.
PMULLW xmm1, xmm2/m128
66 0F D5 /r
SSE2
16/32/64-bit
pmullw instruction.
PMULLW mm, mm/m64
NP 0F D5 /r
MMX
16/32/64-bit
pmullw instruction.
PMULLW xmm1, xmm2/m128
66 0F D5 /r
SSE2
16/32/64-bit
pmuludq instruction.
PMULUDQ mm1, mm2/m64
NP 0F F4 /r
SSE2
16/32/64-bit
pmuludq instruction.
PMULUDQ xmm1, xmm2/m128
66 0F F4 /r
SSE2
16/32/64-bit
pmuludq instruction.
PMULUDQ mm1, mm2/m64
NP 0F F4 /r
SSE2
16/32/64-bit
pmuludq instruction.
PMULUDQ xmm1, xmm2/m128
66 0F F4 /r
SSE2
16/32/64-bit
pmvgezb instruction.
PMVGEZB mm, m64
0F 5C /r
CYRIX_EMMI
16/32-bit
pmvlzb instruction.
PMVLZB mm, m64
0F 5B /r
CYRIX_EMMI
16/32-bit
pmvnzb instruction.
PMVNZB mm, m64
0F 5A /r
CYRIX_EMMI
16/32-bit
pmvzb instruction.
PMVZB mm, m64
0F 58 /r
CYRIX_EMMI
16/32-bit
pop instruction.
POP r16
o16 58+rw
8086+
16/32/64-bit
pop instruction.
POP r32
o32 58+rd
386+
16/32-bit
pop instruction.
POP r64
o64 58+ro
X64
64-bit
pop instruction.
POP FS
o64 0F A1
X64
64-bit
POP GS
o64 0F A9
X64
64-bit
POP ES
o32 07
386+
16/32-bit
POP SS
o32 17
386+
16/32-bit
POP DS
o32 1F
386+
16/32-bit
POP FS
o32 0F A1
386+
16/32-bit
POP GS
o32 0F A9
386+
16/32-bit
POP ES
o16 07
8086+
16/32-bit
POP SS
o16 17
8086+
16/32-bit
POP DS
o16 1F
8086+
16/32-bit
POP FS
o16 0F A1
386+
16/32/64-bit
POP GS
o16 0F A9
386+
16/32/64-bit
pop instruction.
POP r/m64
o64 8F /0
X64
64-bit
POP r/m32
o32 8F /0
386+
16/32-bit
POP r/m16
o16 8F /0
8086+
16/32/64-bit
popa instruction.
POPA
o16 61
186+
16/32-bit
popad instruction.
POPAD
o32 61
386+
16/32-bit
popcnt instruction.
POPCNT r16, r/m16
o16 F3 0F B8 /r
POPCNT
16/32/64-bit
popcnt instruction.
POPCNT r32, r/m32
o32 F3 0F B8 /r
POPCNT
16/32/64-bit
popcnt instruction.
POPCNT r64, r/m64
F3 o64 0F B8 /r
POPCNT
64-bit
popcnt instruction.
POPCNT r16, r/m16
o16 F3 0F B8 /r
POPCNT
16/32/64-bit
popcnt instruction.
POPCNT r32, r/m32
o32 F3 0F B8 /r
POPCNT
16/32/64-bit
popcnt instruction.
POPCNT r64, r/m64
F3 o64 0F B8 /r
POPCNT
64-bit
popf instruction.
POPF
o16 9D
8086+
16/32/64-bit
popfd instruction.
POPFD
o32 9D
386+
16/32-bit
popfq instruction.
POPFQ
o64 9D
X64
64-bit
por instruction.
POR mm, mm/m64
NP 0F EB /r
MMX
16/32/64-bit
por instruction.
POR xmm1, xmm2/m128
66 0F EB /r
SSE2
16/32/64-bit
por instruction.
POR mm, mm/m64
NP 0F EB /r
MMX
16/32/64-bit
por instruction.
POR xmm1, xmm2/m128
66 0F EB /r
SSE2
16/32/64-bit
prefetch instruction.
PREFETCH m8
0F 0D /0
PREFETCHW
16/32/64-bit
prefetchit0 instruction.
PREFETCHIT0 m8
0F 18 /7
PREFETCHITI
16/32/64-bit
prefetchit1 instruction.
PREFETCHIT1 m8
0F 18 /6
PREFETCHITI
16/32/64-bit
prefetchnta instruction.
PREFETCHNTA m8
0F 18 /0
SSE
16/32/64-bit
prefetcht0 instruction.
PREFETCHT0 m8
0F 18 /1
SSE
16/32/64-bit
prefetcht1 instruction.
PREFETCHT1 m8
0F 18 /2
SSE
16/32/64-bit
prefetcht2 instruction.
PREFETCHT2 m8
0F 18 /3
SSE
16/32/64-bit
prefetchw instruction.
PREFETCHW m8
0F 0D /1
PREFETCHW
16/32/64-bit
prefetchwt1 instruction.
PREFETCHWT1 m8
0F 0D /2
PREFETCHWT1
16/32/64-bit
psadbw instruction.
PSADBW mm1, mm2/m64
NP 0F F6 /r
SSE
16/32/64-bit
psadbw instruction.
PSADBW xmm1, xmm2/m128
66 0F F6 /r
SSE2
16/32/64-bit
psadbw instruction.
PSADBW mm1, mm2/m64
NP 0F F6 /r
SSE
16/32/64-bit
psadbw instruction.
PSADBW xmm1, xmm2/m128
66 0F F6 /r
SSE2
16/32/64-bit
pshufb instruction.
PSHUFB mm1, mm2/m64
NP 0F 38 00 /r
SSSE3
16/32/64-bit
pshufb instruction.
PSHUFB xmm1, xmm2/m128
66 0F 38 00 /r
SSSE3
16/32/64-bit
pshufb instruction.
PSHUFB mm1, mm2/m64
NP 0F 38 00 /r
SSSE3
16/32/64-bit
pshufb instruction.
PSHUFB xmm1, xmm2/m128
66 0F 38 00 /r
SSSE3
16/32/64-bit
pshufd instruction.
PSHUFD xmm1, xmm2/m128, imm8
66 0F 70 /r ib
SSE2
16/32/64-bit
pshufd instruction.
PSHUFD xmm1, xmm2/m128, imm8
66 0F 70 /r ib
SSE2
16/32/64-bit
pshufd instruction.
PSHUFD xmm1, xmm2/m128, imm8
66 0F 70 /r ib
SSE2
16/32/64-bit
pshufd instruction.
PSHUFD xmm1, xmm2/m128, imm8
66 0F 70 /r ib
SSE2
16/32/64-bit
pshufhw instruction.
PSHUFHW xmm1, xmm2/m128, imm8
F3 0F 70 /r ib
SSE2
16/32/64-bit
pshufhw instruction.
PSHUFHW xmm1, xmm2/m128, imm8
F3 0F 70 /r ib
SSE2
16/32/64-bit
pshufhw instruction.
PSHUFHW xmm1, xmm2/m128, imm8
F3 0F 70 /r ib
SSE2
16/32/64-bit
pshufhw instruction.
PSHUFHW xmm1, xmm2/m128, imm8
F3 0F 70 /r ib
SSE2
16/32/64-bit
pshuflw instruction.
PSHUFLW xmm1, xmm2/m128, imm8
F2 0F 70 /r ib
SSE2
16/32/64-bit
pshuflw instruction.
PSHUFLW xmm1, xmm2/m128, imm8
F2 0F 70 /r ib
SSE2
16/32/64-bit
pshuflw instruction.
PSHUFLW xmm1, xmm2/m128, imm8
F2 0F 70 /r ib
SSE2
16/32/64-bit
pshuflw instruction.
PSHUFLW xmm1, xmm2/m128, imm8
F2 0F 70 /r ib
SSE2
16/32/64-bit
pshufw instruction.
PSHUFW mm1, mm2/m64, imm8
NP 0F 70 /r ib
SSE
16/32/64-bit
pshufw instruction.
PSHUFW mm1, mm2/m64, imm8
NP 0F 70 /r ib
SSE
16/32/64-bit
pshufw instruction.
PSHUFW mm1, mm2/m64, imm8
NP 0F 70 /r ib
SSE
16/32/64-bit
pshufw instruction.
PSHUFW mm1, mm2/m64, imm8
NP 0F 70 /r ib
SSE
16/32/64-bit
psignb instruction.
PSIGNB mm1, mm2/m64
NP 0F 38 08 /r
SSSE3
16/32/64-bit
psignb instruction.
PSIGNB xmm1, xmm2/m128
66 0F 38 08 /r
SSSE3
16/32/64-bit
psignb instruction.
PSIGNB mm1, mm2/m64
NP 0F 38 08 /r
SSSE3
16/32/64-bit
psignb instruction.
PSIGNB xmm1, xmm2/m128
66 0F 38 08 /r
SSSE3
16/32/64-bit
psignd instruction.
PSIGND mm1, mm2/m64
NP 0F 38 0A /r
SSSE3
16/32/64-bit
psignd instruction.
PSIGND xmm1, xmm2/m128
66 0F 38 0A /r
SSSE3
16/32/64-bit
psignd instruction.
PSIGND mm1, mm2/m64
NP 0F 38 0A /r
SSSE3
16/32/64-bit
psignd instruction.
PSIGND xmm1, xmm2/m128
66 0F 38 0A /r
SSSE3
16/32/64-bit
psignw instruction.
PSIGNW mm1, mm2/m64
NP 0F 38 09 /r
SSSE3
16/32/64-bit
psignw instruction.
PSIGNW xmm1, xmm2/m128
66 0F 38 09 /r
SSSE3
16/32/64-bit
psignw instruction.
PSIGNW mm1, mm2/m64
NP 0F 38 09 /r
SSSE3
16/32/64-bit
psignw instruction.
PSIGNW xmm1, xmm2/m128
66 0F 38 09 /r
SSSE3
16/32/64-bit
pslld instruction.
PSLLD mm, mm/m64
NP 0F F2 /r
MMX
16/32/64-bit
pslld instruction.
PSLLD xmm1, xmm2/m128
66 0F F2 /r
SSE2
16/32/64-bit
pslld instruction.
PSLLD mm, mm/m64
NP 0F F2 /r
MMX
16/32/64-bit
pslld instruction.
PSLLD xmm1, xmm2/m128
66 0F F2 /r
SSE2
16/32/64-bit
pslld instruction.
PSLLD mm, imm8
NP 0F 72 /6 ib
MMX
16/32/64-bit
pslld instruction.
PSLLD xmm1, imm8
66 0F 72 /6 ib
SSE2
16/32/64-bit
pslld instruction.
PSLLD mm, imm8
NP 0F 72 /6 ib
MMX
16/32/64-bit
pslld instruction.
PSLLD xmm1, imm8
66 0F 72 /6 ib
SSE2
16/32/64-bit
pslldq instruction.
PSLLDQ xmm1, imm8
66 0F 73 /7 ib
SSE2
16/32/64-bit
pslldq instruction.
PSLLDQ xmm1, imm8
66 0F 73 /7 ib
SSE2
16/32/64-bit
psllq instruction.
PSLLQ mm, mm/m64
NP 0F F3 /r
MMX
16/32/64-bit
psllq instruction.
PSLLQ xmm1, xmm2/m128
66 0F F3 /r
SSE2
16/32/64-bit
psllq instruction.
PSLLQ mm, mm/m64
NP 0F F3 /r
MMX
16/32/64-bit
psllq instruction.
PSLLQ xmm1, xmm2/m128
66 0F F3 /r
SSE2
16/32/64-bit
psllq instruction.
PSLLQ mm, imm8
NP 0F 73 /6 ib
MMX
16/32/64-bit
psllq instruction.
PSLLQ xmm1, imm8
66 0F 73 /6 ib
SSE2
16/32/64-bit
psllq instruction.
PSLLQ mm, imm8
NP 0F 73 /6 ib
MMX
16/32/64-bit
psllq instruction.
PSLLQ xmm1, imm8
66 0F 73 /6 ib
SSE2
16/32/64-bit
psllw instruction.
PSLLW mm, mm/m64
NP 0F F1 /r
MMX
16/32/64-bit
psllw instruction.
PSLLW xmm1, xmm2/m128
66 0F F1 /r
SSE2
16/32/64-bit
psllw instruction.
PSLLW mm, mm/m64
NP 0F F1 /r
MMX
16/32/64-bit
psllw instruction.
PSLLW xmm1, xmm2/m128
66 0F F1 /r
SSE2
16/32/64-bit
psllw instruction.
PSLLW mm1, imm8
NP 0F 71 /6 ib
MMX
16/32/64-bit
psllw instruction.
PSLLW xmm1, imm8
66 0F 71 /6 ib
SSE2
16/32/64-bit
psllw instruction.
PSLLW mm1, imm8
NP 0F 71 /6 ib
MMX
16/32/64-bit
psllw instruction.
PSLLW xmm1, imm8
66 0F 71 /6 ib
SSE2
16/32/64-bit
psmash instruction.
PSMASH
F3 0F 01 FF
SEV-SNP
64-bit
psrad instruction.
PSRAD mm, mm/m64
NP 0F E2 /r
MMX
16/32/64-bit
psrad instruction.
PSRAD xmm1, xmm2/m128
66 0F E2 /r
SSE2
16/32/64-bit
psrad instruction.
PSRAD mm, mm/m64
NP 0F E2 /r
MMX
16/32/64-bit
psrad instruction.
PSRAD xmm1, xmm2/m128
66 0F E2 /r
SSE2
16/32/64-bit
psrad instruction.
PSRAD mm, imm8
NP 0F 72 /4 ib
MMX
16/32/64-bit
psrad instruction.
PSRAD xmm1, imm8
66 0F 72 /4 ib
SSE2
16/32/64-bit
psrad instruction.
PSRAD mm, imm8
NP 0F 72 /4 ib
MMX
16/32/64-bit
psrad instruction.
PSRAD xmm1, imm8
66 0F 72 /4 ib
SSE2
16/32/64-bit
psraw instruction.
PSRAW mm, mm/m64
NP 0F E1 /r
MMX
16/32/64-bit
psraw instruction.
PSRAW xmm1, xmm2/m128
66 0F E1 /r
SSE2
16/32/64-bit
psraw instruction.
PSRAW mm, mm/m64
NP 0F E1 /r
MMX
16/32/64-bit
psraw instruction.
PSRAW xmm1, xmm2/m128
66 0F E1 /r
SSE2
16/32/64-bit
psraw instruction.
PSRAW mm, imm8
NP 0F 71 /4 ib
MMX
16/32/64-bit
psraw instruction.
PSRAW xmm1, imm8
66 0F 71 /4 ib
SSE2
16/32/64-bit
psraw instruction.
PSRAW mm, imm8
NP 0F 71 /4 ib
MMX
16/32/64-bit
psraw instruction.
PSRAW xmm1, imm8
66 0F 71 /4 ib
SSE2
16/32/64-bit
psrld instruction.
PSRLD mm, mm/m64
NP 0F D2 /r
MMX
16/32/64-bit
psrld instruction.
PSRLD xmm1, xmm2/m128
66 0F D2 /r
SSE2
16/32/64-bit
psrld instruction.
PSRLD mm, mm/m64
NP 0F D2 /r
MMX
16/32/64-bit
psrld instruction.
PSRLD xmm1, xmm2/m128
66 0F D2 /r
SSE2
16/32/64-bit
psrld instruction.
PSRLD mm, imm8
NP 0F 72 /2 ib
MMX
16/32/64-bit
psrld instruction.
PSRLD xmm1, imm8
66 0F 72 /2 ib
SSE2
16/32/64-bit
psrld instruction.
PSRLD mm, imm8
NP 0F 72 /2 ib
MMX
16/32/64-bit
psrld instruction.
PSRLD xmm1, imm8
66 0F 72 /2 ib
SSE2
16/32/64-bit
psrldq instruction.
PSRLDQ xmm1, imm8
66 0F 73 /3 ib
SSE2
16/32/64-bit
psrldq instruction.
PSRLDQ xmm1, imm8
66 0F 73 /3 ib
SSE2
16/32/64-bit
psrlq instruction.
PSRLQ mm, mm/m64
NP 0F D3 /r
MMX
16/32/64-bit
psrlq instruction.
PSRLQ xmm1, xmm2/m128
66 0F D3 /r
SSE2
16/32/64-bit
psrlq instruction.
PSRLQ mm, mm/m64
NP 0F D3 /r
MMX
16/32/64-bit
psrlq instruction.
PSRLQ xmm1, xmm2/m128
66 0F D3 /r
SSE2
16/32/64-bit
psrlq instruction.
PSRLQ mm, imm8
NP 0F 73 /2 ib
MMX
16/32/64-bit
psrlq instruction.
PSRLQ xmm1, imm8
66 0F 73 /2 ib
SSE2
16/32/64-bit
psrlq instruction.
PSRLQ mm, imm8
NP 0F 73 /2 ib
MMX
16/32/64-bit
psrlq instruction.
PSRLQ xmm1, imm8
66 0F 73 /2 ib
SSE2
16/32/64-bit
psrlw instruction.
PSRLW mm, mm/m64
NP 0F D1 /r
MMX
16/32/64-bit
psrlw instruction.
PSRLW xmm1, xmm2/m128
66 0F D1 /r
SSE2
16/32/64-bit
psrlw instruction.
PSRLW mm, mm/m64
NP 0F D1 /r
MMX
16/32/64-bit
psrlw instruction.
PSRLW xmm1, xmm2/m128
66 0F D1 /r
SSE2
16/32/64-bit
psrlw instruction.
PSRLW mm, imm8
NP 0F 71 /2 ib
MMX
16/32/64-bit
psrlw instruction.
PSRLW xmm1, imm8
66 0F 71 /2 ib
SSE2
16/32/64-bit
psrlw instruction.
PSRLW mm, imm8
NP 0F 71 /2 ib
MMX
16/32/64-bit
psrlw instruction.
PSRLW xmm1, imm8
66 0F 71 /2 ib
SSE2
16/32/64-bit
psubb instruction.
PSUBB mm, mm/m64
NP 0F F8 /r
MMX
16/32/64-bit
psubb instruction.
PSUBB xmm1, xmm2/m128
66 0F F8 /r
SSE2
16/32/64-bit
psubb instruction.
PSUBB mm, mm/m64
NP 0F F8 /r
MMX
16/32/64-bit
psubb instruction.
PSUBB xmm1, xmm2/m128
66 0F F8 /r
SSE2
16/32/64-bit
psubd instruction.
PSUBD mm, mm/m64
NP 0F FA /r
MMX
16/32/64-bit
psubd instruction.
PSUBD xmm1, xmm2/m128
66 0F FA /r
SSE2
16/32/64-bit
psubd instruction.
PSUBD mm, mm/m64
NP 0F FA /r
MMX
16/32/64-bit
psubd instruction.
PSUBD xmm1, xmm2/m128
66 0F FA /r
SSE2
16/32/64-bit
psubq instruction.
PSUBQ mm1, mm2/m64
NP 0F FB /r
SSE2
16/32/64-bit
psubq instruction.
PSUBQ xmm1, xmm2/m128
66 0F FB /r
SSE2
16/32/64-bit
psubq instruction.
PSUBQ mm1, mm2/m64
NP 0F FB /r
SSE2
16/32/64-bit
psubq instruction.
PSUBQ xmm1, xmm2/m128
66 0F FB /r
SSE2
16/32/64-bit
psubsb instruction.
PSUBSB mm, mm/m64
NP 0F E8 /r
MMX
16/32/64-bit
psubsb instruction.
PSUBSB xmm1, xmm2/m128
66 0F E8 /r
SSE2
16/32/64-bit
psubsb instruction.
PSUBSB mm, mm/m64
NP 0F E8 /r
MMX
16/32/64-bit
psubsb instruction.
PSUBSB xmm1, xmm2/m128
66 0F E8 /r
SSE2
16/32/64-bit
psubsiw instruction.
PSUBSIW mm, mm/m64
0F 55 /r
CYRIX_EMMI
16/32-bit
psubsiw instruction.
PSUBSIW mm, mm/m64
0F 55 /r
CYRIX_EMMI
16/32-bit
psubsw instruction.
PSUBSW mm, mm/m64
NP 0F E9 /r
MMX
16/32/64-bit
psubsw instruction.
PSUBSW xmm1, xmm2/m128
66 0F E9 /r
SSE2
16/32/64-bit
psubsw instruction.
PSUBSW mm, mm/m64
NP 0F E9 /r
MMX
16/32/64-bit
psubsw instruction.
PSUBSW xmm1, xmm2/m128
66 0F E9 /r
SSE2
16/32/64-bit
psubusb instruction.
PSUBUSB mm, mm/m64
NP 0F D8 /r
MMX
16/32/64-bit
psubusb instruction.
PSUBUSB xmm1, xmm2/m128
66 0F D8 /r
SSE2
16/32/64-bit
psubusb instruction.
PSUBUSB mm, mm/m64
NP 0F D8 /r
MMX
16/32/64-bit
psubusb instruction.
PSUBUSB xmm1, xmm2/m128
66 0F D8 /r
SSE2
16/32/64-bit
psubusw instruction.
PSUBUSW mm, mm/m64
NP 0F D9 /r
MMX
16/32/64-bit
psubusw instruction.
PSUBUSW xmm1, xmm2/m128
66 0F D9 /r
SSE2
16/32/64-bit
psubusw instruction.
PSUBUSW mm, mm/m64
NP 0F D9 /r
MMX
16/32/64-bit
psubusw instruction.
PSUBUSW xmm1, xmm2/m128
66 0F D9 /r
SSE2
16/32/64-bit
psubw instruction.
PSUBW mm, mm/m64
NP 0F F9 /r
MMX
16/32/64-bit
psubw instruction.
PSUBW xmm1, xmm2/m128
66 0F F9 /r
SSE2
16/32/64-bit
psubw instruction.
PSUBW mm, mm/m64
NP 0F F9 /r
MMX
16/32/64-bit
psubw instruction.
PSUBW xmm1, xmm2/m128
66 0F F9 /r
SSE2
16/32/64-bit
pswapd instruction.
PSWAPD mm, mm/m64
0F 0F /r BB
3DNOWEXT
16/32/64-bit
pswapd instruction.
PSWAPD mm, mm/m64
0F 0F /r BB
3DNOWEXT
16/32/64-bit
ptest instruction.
PTEST xmm1, xmm2/m128
66 0F 38 17 /r
SSE4.1
16/32/64-bit
ptest instruction.
PTEST xmm1, xmm2/m128
66 0F 38 17 /r
SSE4.1
16/32/64-bit
ptwrite instruction.
PTWRITE r/m32
F3 0F AE /4
PTWRITE
16/32/64-bit
ptwrite instruction.
PTWRITE r/m64
F3 o64 0F AE /4
PTWRITE
64-bit
ptwrite instruction.
PTWRITE r/m64
F3 o64 0F AE /4
PTWRITE
64-bit
PTWRITE r/m32
F3 0F AE /4
PTWRITE
16/32/64-bit
punpckhbw instruction.
PUNPCKHBW mm, mm/m64
NP 0F 68 /r
MMX
16/32/64-bit
punpckhbw instruction.
PUNPCKHBW xmm1, xmm2/m128
66 0F 68 /r
SSE2
16/32/64-bit
punpckhbw instruction.
PUNPCKHBW mm, mm/m64
NP 0F 68 /r
MMX
16/32/64-bit
punpckhbw instruction.
PUNPCKHBW xmm1, xmm2/m128
66 0F 68 /r
SSE2
16/32/64-bit
punpckhdq instruction.
PUNPCKHDQ mm, mm/m64
NP 0F 6A /r
MMX
16/32/64-bit
punpckhdq instruction.
PUNPCKHDQ xmm1, xmm2/m128
66 0F 6A /r
SSE2
16/32/64-bit
punpckhdq instruction.
PUNPCKHDQ mm, mm/m64
NP 0F 6A /r
MMX
16/32/64-bit
punpckhdq instruction.
PUNPCKHDQ xmm1, xmm2/m128
66 0F 6A /r
SSE2
16/32/64-bit
punpckhqdq instruction.
PUNPCKHQDQ xmm1, xmm2/m128
66 0F 6D /r
SSE2
16/32/64-bit
punpckhqdq instruction.
PUNPCKHQDQ xmm1, xmm2/m128
66 0F 6D /r
SSE2
16/32/64-bit
punpckhwd instruction.
PUNPCKHWD mm, mm/m64
NP 0F 69 /r
MMX
16/32/64-bit
punpckhwd instruction.
PUNPCKHWD xmm1, xmm2/m128
66 0F 69 /r
SSE2
16/32/64-bit
punpckhwd instruction.
PUNPCKHWD mm, mm/m64
NP 0F 69 /r
MMX
16/32/64-bit
punpckhwd instruction.
PUNPCKHWD xmm1, xmm2/m128
66 0F 69 /r
SSE2
16/32/64-bit
punpcklbw instruction.
PUNPCKLBW mm, mm/m32
NP 0F 60 /r
MMX
16/32/64-bit
punpcklbw instruction.
PUNPCKLBW xmm1, xmm2/m128
66 0F 60 /r
SSE2
16/32/64-bit
punpcklbw instruction.
PUNPCKLBW mm, mm/m32
NP 0F 60 /r
MMX
16/32/64-bit
punpcklbw instruction.
PUNPCKLBW xmm1, xmm2/m128
66 0F 60 /r
SSE2
16/32/64-bit
punpckldq instruction.
PUNPCKLDQ mm, mm/m32
NP 0F 62 /r
MMX
16/32/64-bit
punpckldq instruction.
PUNPCKLDQ xmm1, xmm2/m128
66 0F 62 /r
SSE2
16/32/64-bit
punpckldq instruction.
PUNPCKLDQ mm, mm/m32
NP 0F 62 /r
MMX
16/32/64-bit
punpckldq instruction.
PUNPCKLDQ xmm1, xmm2/m128
66 0F 62 /r
SSE2
16/32/64-bit
punpcklqdq instruction.
PUNPCKLQDQ xmm1, xmm2/m128
66 0F 6C /r
SSE2
16/32/64-bit
punpcklqdq instruction.
PUNPCKLQDQ xmm1, xmm2/m128
66 0F 6C /r
SSE2
16/32/64-bit
punpcklwd instruction.
PUNPCKLWD mm, mm/m32
NP 0F 61 /r
MMX
16/32/64-bit
punpcklwd instruction.
PUNPCKLWD xmm1, xmm2/m128
66 0F 61 /r
SSE2
16/32/64-bit
punpcklwd instruction.
PUNPCKLWD mm, mm/m32
NP 0F 61 /r
MMX
16/32/64-bit
punpcklwd instruction.
PUNPCKLWD xmm1, xmm2/m128
66 0F 61 /r
SSE2
16/32/64-bit
push instruction.
PUSH r16
o16 50+rw
8086+
16/32/64-bit
push instruction.
PUSH r32
o32 50+rd
386+
16/32-bit
push instruction.
PUSH r64
o64 50+ro
X64
64-bit
push instruction.
PUSH FS
o64 0F A0
X64
64-bit
PUSH GS
o64 0F A8
X64
64-bit
PUSH ES
o32 06
386+
16/32-bit
PUSH CS
o32 0E
386+
16/32-bit
PUSH SS
o32 16
386+
16/32-bit
PUSH DS
o32 1E
386+
16/32-bit
PUSH FS
o32 0F A0
386+
16/32-bit
PUSH GS
o32 0F A8
386+
16/32-bit
PUSH ES
o16 06
8086+
16/32-bit
PUSH CS
o16 0E
8086+
16/32-bit
PUSH SS
o16 16
8086+
16/32-bit
PUSH DS
o16 1E
8086+
16/32-bit
PUSH FS
o16 0F A0
386+
16/32/64-bit
PUSH GS
o16 0F A8
386+
16/32/64-bit
push instruction.
PUSH r/m64
o64 FF /6
X64
64-bit
PUSH r/m32
o32 FF /6
386+
16/32-bit
PUSH r/m16
o16 FF /6
8086+
16/32/64-bit
push instruction.
PUSH imm32
o64 68 id
X64
64-bit
PUSH imm32
o32 68 id
386+
16/32-bit
PUSH imm16
o16 68 iw
186+
16/32/64-bit
PUSH imm8
o64 6A ib
X64
64-bit
PUSH imm8
o32 6A ib
386+
16/32-bit
PUSH imm8
o16 6A ib
186+
16/32/64-bit
push instruction.
PUSH imm32
o32 68 id
386+
16/32-bit
PUSH imm16
o16 68 iw
186+
16/32/64-bit
PUSH imm8
o32 6A ib
386+
16/32-bit
PUSH imm8
o16 6A ib
186+
16/32/64-bit
pusha instruction.
PUSHA
o16 60
186+
16/32-bit
pushad instruction.
PUSHAD
o32 60
386+
16/32-bit
pushf instruction.
PUSHF
o16 9C
8086+
16/32/64-bit
pushfd instruction.
PUSHFD
o32 9C
386+
16/32-bit
pushfq instruction.
PUSHFQ
o64 9C
X64
64-bit
pvalidate instruction.
PVALIDATE
a64 F2 0F 01 FF
SEV-SNP
64-bit
PVALIDATE
a32 F2 0F 01 FF
SEV-SNP
16/32/64-bit
PVALIDATE
a16 F2 0F 01 FF
SEV-SNP
16/32-bit
pxor instruction.
PXOR mm, mm/m64
NP 0F EF /r
MMX
16/32/64-bit
pxor instruction.
PXOR xmm1, xmm2/m128
66 0F EF /r
SSE2
16/32/64-bit
pxor instruction.
PXOR mm, mm/m64
NP 0F EF /r
MMX
16/32/64-bit
pxor instruction.
PXOR xmm1, xmm2/m128
66 0F EF /r
SSE2
16/32/64-bit
rcl instruction.
RCL r/m8, CL
D2 /2
8086+
16/32/64-bit
rcl instruction.
RCL r/m16, CL
o16 D3 /2
8086+
16/32/64-bit
rcl instruction.
RCL r/m32, CL
o32 D3 /2
386+
16/32/64-bit
rcl instruction.
RCL r/m64, CL
o64 D3 /2
X64
64-bit
rcl instruction.
RCL r/m64, CL
o64 D3 /2
X64
64-bit
RCL r/m32, CL
o32 D3 /2
386+
16/32/64-bit
RCL r/m16, CL
o16 D3 /2
8086+
16/32/64-bit
RCL r/m8, CL
D2 /2
8086+
16/32/64-bit
rcl instruction.
RCL r/m8, 1
D0 /2
8086+
16/32/64-bit
RCL r/m8, imm8
C0 /2 ib
186+
16/32/64-bit
rcl instruction.
RCL r/m16, 1
o16 D1 /2
8086+
16/32/64-bit
RCL r/m16, imm8
o16 C1 /2 ib
186+
16/32/64-bit
rcl instruction.
RCL r/m32, 1
o32 D1 /2
386+
16/32/64-bit
RCL r/m32, imm8
o32 C1 /2 ib
386+
16/32/64-bit
rcl instruction.
RCL r/m64, 1
o64 D1 /2
X64
64-bit
RCL r/m64, imm8
o64 C1 /2 ib
X64
64-bit
rcl instruction.
RCL r/m64, 1
o64 D1 /2
X64
64-bit
RCL r/m64, imm8
o64 C1 /2 ib
X64
64-bit
RCL r/m32, 1
o32 D1 /2
386+
16/32/64-bit
RCL r/m32, imm8
o32 C1 /2 ib
386+
16/32/64-bit
RCL r/m16, 1
o16 D1 /2
8086+
16/32/64-bit
RCL r/m16, imm8
o16 C1 /2 ib
186+
16/32/64-bit
RCL r/m8, 1
D0 /2
8086+
16/32/64-bit
RCL r/m8, imm8
C0 /2 ib
186+
16/32/64-bit
rcl instruction.
RCL r/m8, 1
D0 /2
8086+
16/32/64-bit
RCL r/m8, imm8
C0 /2 ib
186+
16/32/64-bit
rcl instruction.
RCL r/m16, 1
o16 D1 /2
8086+
16/32/64-bit
RCL r/m16, imm8
o16 C1 /2 ib
186+
16/32/64-bit
rcl instruction.
RCL r/m32, 1
o32 D1 /2
386+
16/32/64-bit
RCL r/m32, imm8
o32 C1 /2 ib
386+
16/32/64-bit
rcl instruction.
RCL r/m64, 1
o64 D1 /2
X64
64-bit
RCL r/m64, imm8
o64 C1 /2 ib
X64
64-bit
rcl instruction.
RCL r/m64, 1
o64 D1 /2
X64
64-bit
RCL r/m64, imm8
o64 C1 /2 ib
X64
64-bit
RCL r/m32, 1
o32 D1 /2
386+
16/32/64-bit
RCL r/m32, imm8
o32 C1 /2 ib
386+
16/32/64-bit
RCL r/m16, 1
o16 D1 /2
8086+
16/32/64-bit
RCL r/m16, imm8
o16 C1 /2 ib
186+
16/32/64-bit
RCL r/m8, 1
D0 /2
8086+
16/32/64-bit
RCL r/m8, imm8
C0 /2 ib
186+
16/32/64-bit
rcpps instruction.
RCPPS xmm1, xmm2/m128
NP 0F 53 /r
SSE
16/32/64-bit
rcpps instruction.
RCPPS xmm1, xmm2/m128
NP 0F 53 /r
SSE
16/32/64-bit
rcpss instruction.
RCPSS xmm1, xmm2/m32
F3 0F 53 /r
SSE
16/32/64-bit
rcpss instruction.
RCPSS xmm1, xmm2/m32
F3 0F 53 /r
SSE
16/32/64-bit
rcr instruction.
RCR r/m8, CL
D2 /3
8086+
16/32/64-bit
rcr instruction.
RCR r/m16, CL
o16 D3 /3
8086+
16/32/64-bit
rcr instruction.
RCR r/m32, CL
o32 D3 /3
386+
16/32/64-bit
rcr instruction.
RCR r/m64, CL
o64 D3 /3
X64
64-bit
rcr instruction.
RCR r/m64, CL
o64 D3 /3
X64
64-bit
RCR r/m32, CL
o32 D3 /3
386+
16/32/64-bit
RCR r/m16, CL
o16 D3 /3
8086+
16/32/64-bit
RCR r/m8, CL
D2 /3
8086+
16/32/64-bit
rcr instruction.
RCR r/m8, 1
D0 /3
8086+
16/32/64-bit
RCR r/m8, imm8
C0 /3 ib
186+
16/32/64-bit
rcr instruction.
RCR r/m16, 1
o16 D1 /3
8086+
16/32/64-bit
RCR r/m16, imm8
o16 C1 /3 ib
186+
16/32/64-bit
rcr instruction.
RCR r/m32, 1
o32 D1 /3
386+
16/32/64-bit
RCR r/m32, imm8
o32 C1 /3 ib
386+
16/32/64-bit
rcr instruction.
RCR r/m64, 1
o64 D1 /3
X64
64-bit
RCR r/m64, imm8
o64 C1 /3 ib
X64
64-bit
rcr instruction.
RCR r/m64, 1
o64 D1 /3
X64
64-bit
RCR r/m64, imm8
o64 C1 /3 ib
X64
64-bit
RCR r/m32, 1
o32 D1 /3
386+
16/32/64-bit
RCR r/m32, imm8
o32 C1 /3 ib
386+
16/32/64-bit
RCR r/m16, 1
o16 D1 /3
8086+
16/32/64-bit
RCR r/m16, imm8
o16 C1 /3 ib
186+
16/32/64-bit
RCR r/m8, 1
D0 /3
8086+
16/32/64-bit
RCR r/m8, imm8
C0 /3 ib
186+
16/32/64-bit
rcr instruction.
RCR r/m8, 1
D0 /3
8086+
16/32/64-bit
RCR r/m8, imm8
C0 /3 ib
186+
16/32/64-bit
rcr instruction.
RCR r/m16, 1
o16 D1 /3
8086+
16/32/64-bit
RCR r/m16, imm8
o16 C1 /3 ib
186+
16/32/64-bit
rcr instruction.
RCR r/m32, 1
o32 D1 /3
386+
16/32/64-bit
RCR r/m32, imm8
o32 C1 /3 ib
386+
16/32/64-bit
rcr instruction.
RCR r/m64, 1
o64 D1 /3
X64
64-bit
RCR r/m64, imm8
o64 C1 /3 ib
X64
64-bit
rcr instruction.
RCR r/m64, 1
o64 D1 /3
X64
64-bit
RCR r/m64, imm8
o64 C1 /3 ib
X64
64-bit
RCR r/m32, 1
o32 D1 /3
386+
16/32/64-bit
RCR r/m32, imm8
o32 C1 /3 ib
386+
16/32/64-bit
RCR r/m16, 1
o16 D1 /3
8086+
16/32/64-bit
RCR r/m16, imm8
o16 C1 /3 ib
186+
16/32/64-bit
RCR r/m8, 1
D0 /3
8086+
16/32/64-bit
RCR r/m8, imm8
C0 /3 ib
186+
16/32/64-bit
rdfsbase instruction.
RDFSBASE r32
F3 0F AE /0
FSGSBASE
64-bit
rdfsbase instruction.
RDFSBASE r64
F3 o64 0F AE /0
FSGSBASE
64-bit
rdgsbase instruction.
RDGSBASE r32
F3 0F AE /1
FSGSBASE
64-bit
rdgsbase instruction.
RDGSBASE r64
F3 o64 0F AE /1
FSGSBASE
64-bit
rdm instruction.
RDM
0F 3A
AMD Geode GX/LX
16/32-bit
rdmsr instruction.
RDMSR
0F 32
MSR
16/32/64-bit
rdmsrlist instruction.
RDMSRLIST
F2 0F 01 C6
MSRLIST
64-bit
rdpid instruction.
RDPID r32
F3 0F C7 /7
RDPID
16/32-bit
rdpid instruction.
RDPID r64
F3 0F C7 /7
RDPID
64-bit
rdpkru instruction.
RDPKRU
NP 0F 01 EE
PKU
16/32/64-bit
rdpmc instruction.
RDPMC
0F 33
Pentium MMX or later, or Pentium Pro or later
16/32/64-bit
rdpru instruction.
RDPRU
NP 0F 01 FD
RDPRU
16/32/64-bit
rdrand instruction.
RDRAND r16
o16 0F C7 /6
RDRAND
16/32/64-bit
rdrand instruction.
RDRAND r32
o32 0F C7 /6
RDRAND
16/32/64-bit
rdrand instruction.
RDRAND r64
o64 0F C7 /6
RDRAND
64-bit
rdseed instruction.
RDSEED r16
o16 0F C7 /7
RDSEED
16/32/64-bit
rdseed instruction.
RDSEED r32
o32 0F C7 /7
RDSEED
16/32/64-bit
rdseed instruction.
RDSEED r64
o64 0F C7 /7
RDSEED
64-bit
rdshr instruction.
RDSHR r/m32
0F 36 /0
Cyrix 6x86MX, M II, III
16/32-bit
rdshr instruction.
RDSHR r/m32
0F 36 /0
Cyrix 6x86MX, M II, III
16/32-bit
rdsspd instruction.
RDSSPD r32
F3 0F 1E /1
CET_SS
16/32/64-bit
rdsspq instruction.
RDSSPQ r64
F3 o64 0F 1E /1
CET_SS
64-bit
rdtsc instruction.
RDTSC
0F 31
TSC
16/32/64-bit
rdtscp instruction.
RDTSCP
0F 01 F9
RDTSCP
16/32/64-bit
rdudbg instruction.
RDUDBG
0F 0E
UDBG
16/32/64-bit
reservednop_0f0d instruction.
RESERVEDNOP r/m16, r16
o16 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f0d instruction.
RESERVEDNOP r/m16, r16
o16 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f0d instruction.
RESERVEDNOP r/m32, r32
o32 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f0d instruction.
RESERVEDNOP r/m32, r32
o32 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f0d instruction.
RESERVEDNOP r/m64, r64
o64 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f0d instruction.
RESERVEDNOP r/m64, r64
o64 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f18 instruction.
RESERVEDNOP r/m16, r16
o16 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f18 instruction.
RESERVEDNOP r/m16, r16
o16 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f18 instruction.
RESERVEDNOP r/m32, r32
o32 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f18 instruction.
RESERVEDNOP r/m32, r32
o32 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f18 instruction.
RESERVEDNOP r/m64, r64
o64 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f18 instruction.
RESERVEDNOP r/m64, r64
o64 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f19 instruction.
RESERVEDNOP r/m16, r16
o16 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f19 instruction.
RESERVEDNOP r/m16, r16
o16 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f19 instruction.
RESERVEDNOP r/m32, r32
o32 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f19 instruction.
RESERVEDNOP r/m32, r32
o32 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f19 instruction.
RESERVEDNOP r/m64, r64
o64 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f19 instruction.
RESERVEDNOP r/m64, r64
o64 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1a instruction.
RESERVEDNOP r/m16, r16
o16 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1a instruction.
RESERVEDNOP r/m16, r16
o16 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1a instruction.
RESERVEDNOP r/m32, r32
o32 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1a instruction.
RESERVEDNOP r/m32, r32
o32 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1a instruction.
RESERVEDNOP r/m64, r64
o64 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1a instruction.
RESERVEDNOP r/m64, r64
o64 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1b instruction.
RESERVEDNOP r/m16, r16
o16 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1b instruction.
RESERVEDNOP r/m16, r16
o16 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1b instruction.
RESERVEDNOP r/m32, r32
o32 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1b instruction.
RESERVEDNOP r/m32, r32
o32 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1b instruction.
RESERVEDNOP r/m64, r64
o64 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1b instruction.
RESERVEDNOP r/m64, r64
o64 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1c instruction.
RESERVEDNOP r/m16, r16
o16 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1c instruction.
RESERVEDNOP r/m16, r16
o16 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1c instruction.
RESERVEDNOP r/m32, r32
o32 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1c instruction.
RESERVEDNOP r/m32, r32
o32 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1c instruction.
RESERVEDNOP r/m64, r64
o64 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1c instruction.
RESERVEDNOP r/m64, r64
o64 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1d instruction.
RESERVEDNOP r/m16, r16
o16 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1d instruction.
RESERVEDNOP r/m16, r16
o16 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1d instruction.
RESERVEDNOP r/m32, r32
o32 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1d instruction.
RESERVEDNOP r/m32, r32
o32 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1d instruction.
RESERVEDNOP r/m64, r64
o64 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1d instruction.
RESERVEDNOP r/m64, r64
o64 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1e instruction.
RESERVEDNOP r/m16, r16
o16 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1e instruction.
RESERVEDNOP r/m16, r16
o16 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1e instruction.
RESERVEDNOP r/m32, r32
o32 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1e instruction.
RESERVEDNOP r/m32, r32
o32 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1e instruction.
RESERVEDNOP r/m64, r64
o64 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1e instruction.
RESERVEDNOP r/m64, r64
o64 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1f instruction.
RESERVEDNOP r/m16, r16
o16 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1f instruction.
RESERVEDNOP r/m16, r16
o16 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1f instruction.
RESERVEDNOP r/m32, r32
o32 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1f instruction.
RESERVEDNOP r/m32, r32
o32 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
reservednop_0f1f instruction.
RESERVEDNOP r/m64, r64
o64 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
reservednop_0f1f instruction.
RESERVEDNOP r/m64, r64
o64 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
ret instruction.
RET
o64 C3
X64
64-bit
RET
o32 C3
386+
16/32-bit
RET
o16 C3
8086+
16/32/64-bit
ret instruction.
RET imm16
o64 C2 iw
X64
64-bit
RET imm16
o32 C2 iw
386+
16/32-bit
RET imm16
o16 C2 iw
8086+
16/32/64-bit
ret instruction.
RET imm16
o64 C2 iw
X64
64-bit
RET imm16
o32 C2 iw
386+
16/32-bit
RET imm16
o16 C2 iw
8086+
16/32/64-bit
retf instruction.
RETF
o64 CB
X64
64-bit
RETF
o32 CB
386+
16/32/64-bit
RETF
o16 CB
8086+
16/32/64-bit
retf instruction.
RETF imm16
o64 CA iw
X64
64-bit
RETF imm16
o32 CA iw
386+
16/32/64-bit
RETF imm16
o16 CA iw
8086+
16/32/64-bit
retf instruction.
RETF imm16
o64 CA iw
X64
64-bit
RETF imm16
o32 CA iw
386+
16/32/64-bit
RETF imm16
o16 CA iw
8086+
16/32/64-bit
rmpadjust instruction.
RMPADJUST
F3 0F 01 FE
SEV-SNP
64-bit
rmpquery instruction.
RMPQUERY
F3 0F 01 FD
RMPQUERY
64-bit
rmpupdate instruction.
RMPUPDATE
F2 0F 01 FE
SEV-SNP
64-bit
rol instruction.
ROL r/m8, CL
D2 /0
8086+
16/32/64-bit
rol instruction.
ROL r/m16, CL
o16 D3 /0
8086+
16/32/64-bit
rol instruction.
ROL r/m32, CL
o32 D3 /0
386+
16/32/64-bit
rol instruction.
ROL r/m64, CL
o64 D3 /0
X64
64-bit
rol instruction.
ROL r/m64, CL
o64 D3 /0
X64
64-bit
ROL r/m32, CL
o32 D3 /0
386+
16/32/64-bit
ROL r/m16, CL
o16 D3 /0
8086+
16/32/64-bit
ROL r/m8, CL
D2 /0
8086+
16/32/64-bit
rol instruction.
ROL r/m8, 1
D0 /0
8086+
16/32/64-bit
ROL r/m8, imm8
C0 /0 ib
186+
16/32/64-bit
rol instruction.
ROL r/m16, 1
o16 D1 /0
8086+
16/32/64-bit
ROL r/m16, imm8
o16 C1 /0 ib
186+
16/32/64-bit
rol instruction.
ROL r/m32, 1
o32 D1 /0
386+
16/32/64-bit
ROL r/m32, imm8
o32 C1 /0 ib
386+
16/32/64-bit
rol instruction.
ROL r/m64, 1
o64 D1 /0
X64
64-bit
ROL r/m64, imm8
o64 C1 /0 ib
X64
64-bit
rol instruction.
ROL r/m64, 1
o64 D1 /0
X64
64-bit
ROL r/m64, imm8
o64 C1 /0 ib
X64
64-bit
ROL r/m32, 1
o32 D1 /0
386+
16/32/64-bit
ROL r/m32, imm8
o32 C1 /0 ib
386+
16/32/64-bit
ROL r/m16, 1
o16 D1 /0
8086+
16/32/64-bit
ROL r/m16, imm8
o16 C1 /0 ib
186+
16/32/64-bit
ROL r/m8, 1
D0 /0
8086+
16/32/64-bit
ROL r/m8, imm8
C0 /0 ib
186+
16/32/64-bit
rol instruction.
ROL r/m8, 1
D0 /0
8086+
16/32/64-bit
ROL r/m8, imm8
C0 /0 ib
186+
16/32/64-bit
rol instruction.
ROL r/m16, 1
o16 D1 /0
8086+
16/32/64-bit
ROL r/m16, imm8
o16 C1 /0 ib
186+
16/32/64-bit
rol instruction.
ROL r/m32, 1
o32 D1 /0
386+
16/32/64-bit
ROL r/m32, imm8
o32 C1 /0 ib
386+
16/32/64-bit
rol instruction.
ROL r/m64, 1
o64 D1 /0
X64
64-bit
ROL r/m64, imm8
o64 C1 /0 ib
X64
64-bit
rol instruction.
ROL r/m64, 1
o64 D1 /0
X64
64-bit
ROL r/m64, imm8
o64 C1 /0 ib
X64
64-bit
ROL r/m32, 1
o32 D1 /0
386+
16/32/64-bit
ROL r/m32, imm8
o32 C1 /0 ib
386+
16/32/64-bit
ROL r/m16, 1
o16 D1 /0
8086+
16/32/64-bit
ROL r/m16, imm8
o16 C1 /0 ib
186+
16/32/64-bit
ROL r/m8, 1
D0 /0
8086+
16/32/64-bit
ROL r/m8, imm8
C0 /0 ib
186+
16/32/64-bit
ror instruction.
ROR r/m8, CL
D2 /1
8086+
16/32/64-bit
ror instruction.
ROR r/m16, CL
o16 D3 /1
8086+
16/32/64-bit
ror instruction.
ROR r/m32, CL
o32 D3 /1
386+
16/32/64-bit
ror instruction.
ROR r/m64, CL
o64 D3 /1
X64
64-bit
ror instruction.
ROR r/m64, CL
o64 D3 /1
X64
64-bit
ROR r/m32, CL
o32 D3 /1
386+
16/32/64-bit
ROR r/m16, CL
o16 D3 /1
8086+
16/32/64-bit
ROR r/m8, CL
D2 /1
8086+
16/32/64-bit
ror instruction.
ROR r/m8, 1
D0 /1
8086+
16/32/64-bit
ROR r/m8, imm8
C0 /1 ib
186+
16/32/64-bit
ror instruction.
ROR r/m16, 1
o16 D1 /1
8086+
16/32/64-bit
ROR r/m16, imm8
o16 C1 /1 ib
186+
16/32/64-bit
ror instruction.
ROR r/m32, 1
o32 D1 /1
386+
16/32/64-bit
ROR r/m32, imm8
o32 C1 /1 ib
386+
16/32/64-bit
ror instruction.
ROR r/m64, 1
o64 D1 /1
X64
64-bit
ROR r/m64, imm8
o64 C1 /1 ib
X64
64-bit
ror instruction.
ROR r/m64, 1
o64 D1 /1
X64
64-bit
ROR r/m64, imm8
o64 C1 /1 ib
X64
64-bit
ROR r/m32, 1
o32 D1 /1
386+
16/32/64-bit
ROR r/m32, imm8
o32 C1 /1 ib
386+
16/32/64-bit
ROR r/m16, 1
o16 D1 /1
8086+
16/32/64-bit
ROR r/m16, imm8
o16 C1 /1 ib
186+
16/32/64-bit
ROR r/m8, 1
D0 /1
8086+
16/32/64-bit
ROR r/m8, imm8
C0 /1 ib
186+
16/32/64-bit
ror instruction.
ROR r/m8, 1
D0 /1
8086+
16/32/64-bit
ROR r/m8, imm8
C0 /1 ib
186+
16/32/64-bit
ror instruction.
ROR r/m16, 1
o16 D1 /1
8086+
16/32/64-bit
ROR r/m16, imm8
o16 C1 /1 ib
186+
16/32/64-bit
ror instruction.
ROR r/m32, 1
o32 D1 /1
386+
16/32/64-bit
ROR r/m32, imm8
o32 C1 /1 ib
386+
16/32/64-bit
ror instruction.
ROR r/m64, 1
o64 D1 /1
X64
64-bit
ROR r/m64, imm8
o64 C1 /1 ib
X64
64-bit
ror instruction.
ROR r/m64, 1
o64 D1 /1
X64
64-bit
ROR r/m64, imm8
o64 C1 /1 ib
X64
64-bit
ROR r/m32, 1
o32 D1 /1
386+
16/32/64-bit
ROR r/m32, imm8
o32 C1 /1 ib
386+
16/32/64-bit
ROR r/m16, 1
o16 D1 /1
8086+
16/32/64-bit
ROR r/m16, imm8
o16 C1 /1 ib
186+
16/32/64-bit
ROR r/m8, 1
D0 /1
8086+
16/32/64-bit
ROR r/m8, imm8
C0 /1 ib
186+
16/32/64-bit
rorx instruction.
RORX r32, r/m32, imm8
VEX.LZ.F2.0F3A.W0 F0 /r ib
BMI2
16/32/64-bit
rorx instruction.
RORX r64, r/m64, imm8
VEX.LZ.F2.0F3A.W1 F0 /r ib
BMI2
64-bit
rorx instruction.
RORX r32, r/m32, imm8
VEX.LZ.F2.0F3A.W0 F0 /r ib
BMI2
16/32/64-bit
rorx instruction.
RORX r64, r/m64, imm8
VEX.LZ.F2.0F3A.W1 F0 /r ib
BMI2
64-bit
rorx instruction.
RORX r32, r/m32, imm8
VEX.LZ.F2.0F3A.W0 F0 /r ib
BMI2
16/32/64-bit
rorx instruction.
RORX r64, r/m64, imm8
VEX.LZ.F2.0F3A.W1 F0 /r ib
BMI2
64-bit
rorx instruction.
RORX r32, r/m32, imm8
VEX.LZ.F2.0F3A.W0 F0 /r ib
BMI2
16/32/64-bit
rorx instruction.
RORX r64, r/m64, imm8
VEX.LZ.F2.0F3A.W1 F0 /r ib
BMI2
64-bit
roundpd instruction.
ROUNDPD xmm1, xmm2/m128, imm8
66 0F 3A 09 /r ib
SSE4.1
16/32/64-bit
roundpd instruction.
ROUNDPD xmm1, xmm2/m128, imm8
66 0F 3A 09 /r ib
SSE4.1
16/32/64-bit
roundpd instruction.
ROUNDPD xmm1, xmm2/m128, imm8
66 0F 3A 09 /r ib
SSE4.1
16/32/64-bit
roundpd instruction.
ROUNDPD xmm1, xmm2/m128, imm8
66 0F 3A 09 /r ib
SSE4.1
16/32/64-bit
roundps instruction.
ROUNDPS xmm1, xmm2/m128, imm8
66 0F 3A 08 /r ib
SSE4.1
16/32/64-bit
roundps instruction.
ROUNDPS xmm1, xmm2/m128, imm8
66 0F 3A 08 /r ib
SSE4.1
16/32/64-bit
roundps instruction.
ROUNDPS xmm1, xmm2/m128, imm8
66 0F 3A 08 /r ib
SSE4.1
16/32/64-bit
roundps instruction.
ROUNDPS xmm1, xmm2/m128, imm8
66 0F 3A 08 /r ib
SSE4.1
16/32/64-bit
roundsd instruction.
ROUNDSD xmm1, xmm2/m64, imm8
66 0F 3A 0B /r ib
SSE4.1
16/32/64-bit
roundsd instruction.
ROUNDSD xmm1, xmm2/m64, imm8
66 0F 3A 0B /r ib
SSE4.1
16/32/64-bit
roundsd instruction.
ROUNDSD xmm1, xmm2/m64, imm8
66 0F 3A 0B /r ib
SSE4.1
16/32/64-bit
roundsd instruction.
ROUNDSD xmm1, xmm2/m64, imm8
66 0F 3A 0B /r ib
SSE4.1
16/32/64-bit
roundss instruction.
ROUNDSS xmm1, xmm2/m32, imm8
66 0F 3A 0A /r ib
SSE4.1
16/32/64-bit
roundss instruction.
ROUNDSS xmm1, xmm2/m32, imm8
66 0F 3A 0A /r ib
SSE4.1
16/32/64-bit
roundss instruction.
ROUNDSS xmm1, xmm2/m32, imm8
66 0F 3A 0A /r ib
SSE4.1
16/32/64-bit
roundss instruction.
ROUNDSS xmm1, xmm2/m32, imm8
66 0F 3A 0A /r ib
SSE4.1
16/32/64-bit
rsdc instruction.
RSDC Sreg, m80
0F 79 /r
Cyrix, AMD Geode GX/LX
16/32-bit
rsldt instruction.
RSLDT m80
0F 7B /0
Cyrix, AMD Geode GX/LX
16/32-bit
rsm instruction.
RSM
0F AA
386+
16/32/64-bit
rsqrtps instruction.
RSQRTPS xmm1, xmm2/m128
NP 0F 52 /r
SSE
16/32/64-bit
rsqrtps instruction.
RSQRTPS xmm1, xmm2/m128
NP 0F 52 /r
SSE
16/32/64-bit
rsqrtss instruction.
RSQRTSS xmm1, xmm2/m32
F3 0F 52 /r
SSE
16/32/64-bit
rsqrtss instruction.
RSQRTSS xmm1, xmm2/m32
F3 0F 52 /r
SSE
16/32/64-bit
rstorssp instruction.
RSTORSSP m64
F3 0F 01 /5
CET_SS
16/32/64-bit
rsts instruction.
RSTS m80
0F 7D /0
Cyrix, AMD Geode GX/LX
16/32-bit
sahf instruction.
SAHF
9E
8086+
16/32/64-bit
sal instruction.
SAL r/m8, CL
D2 /6
8086+
16/32/64-bit
sal instruction.
SAL r/m16, CL
o16 D3 /6
8086+
16/32/64-bit
sal instruction.
SAL r/m32, CL
o32 D3 /6
386+
16/32/64-bit
sal instruction.
SAL r/m64, CL
o64 D3 /6
X64
64-bit
sal instruction.
SAL r/m64, CL
o64 D3 /6
X64
64-bit
SAL r/m32, CL
o32 D3 /6
386+
16/32/64-bit
SAL r/m16, CL
o16 D3 /6
8086+
16/32/64-bit
SAL r/m8, CL
D2 /6
8086+
16/32/64-bit
sal instruction.
SAL r/m8, 1
D0 /6
8086+
16/32/64-bit
SAL r/m8, imm8
C0 /6 ib
186+
16/32/64-bit
sal instruction.
SAL r/m16, 1
o16 D1 /6
8086+
16/32/64-bit
SAL r/m16, imm8
o16 C1 /6 ib
186+
16/32/64-bit
sal instruction.
SAL r/m32, 1
o32 D1 /6
386+
16/32/64-bit
SAL r/m32, imm8
o32 C1 /6 ib
386+
16/32/64-bit
sal instruction.
SAL r/m64, 1
o64 D1 /6
X64
64-bit
SAL r/m64, imm8
o64 C1 /6 ib
X64
64-bit
sal instruction.
SAL r/m64, 1
o64 D1 /6
X64
64-bit
SAL r/m64, imm8
o64 C1 /6 ib
X64
64-bit
SAL r/m32, 1
o32 D1 /6
386+
16/32/64-bit
SAL r/m32, imm8
o32 C1 /6 ib
386+
16/32/64-bit
SAL r/m16, 1
o16 D1 /6
8086+
16/32/64-bit
SAL r/m16, imm8
o16 C1 /6 ib
186+
16/32/64-bit
SAL r/m8, 1
D0 /6
8086+
16/32/64-bit
SAL r/m8, imm8
C0 /6 ib
186+
16/32/64-bit
sal instruction.
SAL r/m8, 1
D0 /6
8086+
16/32/64-bit
SAL r/m8, imm8
C0 /6 ib
186+
16/32/64-bit
sal instruction.
SAL r/m16, 1
o16 D1 /6
8086+
16/32/64-bit
SAL r/m16, imm8
o16 C1 /6 ib
186+
16/32/64-bit
sal instruction.
SAL r/m32, 1
o32 D1 /6
386+
16/32/64-bit
SAL r/m32, imm8
o32 C1 /6 ib
386+
16/32/64-bit
sal instruction.
SAL r/m64, 1
o64 D1 /6
X64
64-bit
SAL r/m64, imm8
o64 C1 /6 ib
X64
64-bit
sal instruction.
SAL r/m64, 1
o64 D1 /6
X64
64-bit
SAL r/m64, imm8
o64 C1 /6 ib
X64
64-bit
SAL r/m32, 1
o32 D1 /6
386+
16/32/64-bit
SAL r/m32, imm8
o32 C1 /6 ib
386+
16/32/64-bit
SAL r/m16, 1
o16 D1 /6
8086+
16/32/64-bit
SAL r/m16, imm8
o16 C1 /6 ib
186+
16/32/64-bit
SAL r/m8, 1
D0 /6
8086+
16/32/64-bit
SAL r/m8, imm8
C0 /6 ib
186+
16/32/64-bit
salc instruction.
SALC
D6
8086+
16/32-bit
sar instruction.
SAR r/m8, CL
D2 /7
8086+
16/32/64-bit
sar instruction.
SAR r/m16, CL
o16 D3 /7
8086+
16/32/64-bit
sar instruction.
SAR r/m32, CL
o32 D3 /7
386+
16/32/64-bit
sar instruction.
SAR r/m64, CL
o64 D3 /7
X64
64-bit
sar instruction.
SAR r/m64, CL
o64 D3 /7
X64
64-bit
SAR r/m32, CL
o32 D3 /7
386+
16/32/64-bit
SAR r/m16, CL
o16 D3 /7
8086+
16/32/64-bit
SAR r/m8, CL
D2 /7
8086+
16/32/64-bit
sar instruction.
SAR r/m8, 1
D0 /7
8086+
16/32/64-bit
SAR r/m8, imm8
C0 /7 ib
186+
16/32/64-bit
sar instruction.
SAR r/m16, 1
o16 D1 /7
8086+
16/32/64-bit
SAR r/m16, imm8
o16 C1 /7 ib
186+
16/32/64-bit
sar instruction.
SAR r/m32, 1
o32 D1 /7
386+
16/32/64-bit
SAR r/m32, imm8
o32 C1 /7 ib
386+
16/32/64-bit
sar instruction.
SAR r/m64, 1
o64 D1 /7
X64
64-bit
SAR r/m64, imm8
o64 C1 /7 ib
X64
64-bit
sar instruction.
SAR r/m64, 1
o64 D1 /7
X64
64-bit
SAR r/m64, imm8
o64 C1 /7 ib
X64
64-bit
SAR r/m32, 1
o32 D1 /7
386+
16/32/64-bit
SAR r/m32, imm8
o32 C1 /7 ib
386+
16/32/64-bit
SAR r/m16, 1
o16 D1 /7
8086+
16/32/64-bit
SAR r/m16, imm8
o16 C1 /7 ib
186+
16/32/64-bit
SAR r/m8, 1
D0 /7
8086+
16/32/64-bit
SAR r/m8, imm8
C0 /7 ib
186+
16/32/64-bit
sar instruction.
SAR r/m8, 1
D0 /7
8086+
16/32/64-bit
SAR r/m8, imm8
C0 /7 ib
186+
16/32/64-bit
sar instruction.
SAR r/m16, 1
o16 D1 /7
8086+
16/32/64-bit
SAR r/m16, imm8
o16 C1 /7 ib
186+
16/32/64-bit
sar instruction.
SAR r/m32, 1
o32 D1 /7
386+
16/32/64-bit
SAR r/m32, imm8
o32 C1 /7 ib
386+
16/32/64-bit
sar instruction.
SAR r/m64, 1
o64 D1 /7
X64
64-bit
SAR r/m64, imm8
o64 C1 /7 ib
X64
64-bit
sar instruction.
SAR r/m64, 1
o64 D1 /7
X64
64-bit
SAR r/m64, imm8
o64 C1 /7 ib
X64
64-bit
SAR r/m32, 1
o32 D1 /7
386+
16/32/64-bit
SAR r/m32, imm8
o32 C1 /7 ib
386+
16/32/64-bit
SAR r/m16, 1
o16 D1 /7
8086+
16/32/64-bit
SAR r/m16, imm8
o16 C1 /7 ib
186+
16/32/64-bit
SAR r/m8, 1
D0 /7
8086+
16/32/64-bit
SAR r/m8, imm8
C0 /7 ib
186+
16/32/64-bit
sarx instruction.
SARX r32a, r/m32, r32b
VEX.LZ.F3.0F38.W0 F7 /r
BMI2
16/32/64-bit
sarx instruction.
SARX r32a, r/m32, r32b
VEX.LZ.F3.0F38.W0 F7 /r
BMI2
16/32/64-bit
sarx instruction.
SARX r64a, r/m64, r64b
VEX.LZ.F3.0F38.W1 F7 /r
BMI2
64-bit
sarx instruction.
SARX r64a, r/m64, r64b
VEX.LZ.F3.0F38.W1 F7 /r
BMI2
64-bit
saveprevssp instruction.
SAVEPREVSSP
F3 0F 01 EA
CET_SS
16/32/64-bit
sbb instruction.
SBB r/m8, r8
18 /r
8086+
16/32/64-bit
sbb instruction.
SBB r/m8, r8
18 /r
8086+
16/32/64-bit
sbb instruction.
SBB r/m16, r16
o16 19 /r
8086+
16/32/64-bit
sbb instruction.
SBB r/m16, r16
o16 19 /r
8086+
16/32/64-bit
sbb instruction.
SBB r/m32, r32
o32 19 /r
386+
16/32/64-bit
sbb instruction.
SBB r/m32, r32
o32 19 /r
386+
16/32/64-bit
sbb instruction.
SBB r/m64, r64
o64 19 /r
X64
64-bit
sbb instruction.
SBB r/m64, r64
o64 19 /r
X64
64-bit
sbb instruction.
SBB r8, r/m8
1A /r
8086+
16/32/64-bit
sbb instruction.
SBB r16, r/m16
o16 1B /r
8086+
16/32/64-bit
sbb instruction.
SBB r32, r/m32
o32 1B /r
386+
16/32/64-bit
sbb instruction.
SBB r64, r/m64
o64 1B /r
X64
64-bit
sbb instruction.
SBB AL, imm8
1C ib
8086+
16/32/64-bit
SBB r/m8, imm8
80 /3 ib
8086+
16/32/64-bit
sbb instruction.
SBB AX, imm16
o16 1D iw
8086+
16/32/64-bit
SBB r/m16, imm16
o16 81 /3 iw
8086+
16/32/64-bit
SBB r/m16, imm8
o16 83 /3 ib
8086+
16/32/64-bit
sbb instruction.
SBB EAX, imm32
o32 1D id
386+
16/32/64-bit
SBB r/m32, imm32
o32 81 /3 id
386+
16/32/64-bit
SBB r/m32, imm8
o32 83 /3 ib
386+
16/32/64-bit
sbb instruction.
SBB RAX, imm32
o64 1D id
X64
64-bit
SBB r/m64, imm32
o64 81 /3 id
X64
64-bit
SBB r/m64, imm8
o64 83 /3 ib
X64
64-bit
sbb instruction.
SBB r/m64, imm32
o64 81 /3 id
X64
64-bit
SBB r/m64, imm8
o64 83 /3 ib
X64
64-bit
SBB r/m32, imm32
o32 81 /3 id
386+
16/32/64-bit
SBB r/m32, imm8
o32 83 /3 ib
386+
16/32/64-bit
SBB r/m16, imm16
o16 81 /3 iw
8086+
16/32/64-bit
SBB r/m16, imm8
o16 83 /3 ib
8086+
16/32/64-bit
SBB r/m8, imm8
80 /3 ib
8086+
16/32/64-bit
sbb instruction.
SBB AL, imm8
1C ib
8086+
16/32/64-bit
SBB r/m8, imm8
80 /3 ib
8086+
16/32/64-bit
sbb instruction.
SBB AX, imm16
o16 1D iw
8086+
16/32/64-bit
SBB r/m16, imm16
o16 81 /3 iw
8086+
16/32/64-bit
SBB r/m16, imm8
o16 83 /3 ib
8086+
16/32/64-bit
sbb instruction.
SBB EAX, imm32
o32 1D id
386+
16/32/64-bit
SBB r/m32, imm32
o32 81 /3 id
386+
16/32/64-bit
SBB r/m32, imm8
o32 83 /3 ib
386+
16/32/64-bit
sbb instruction.
SBB r/m32, imm32
o32 81 /3 id
386+
16/32/64-bit
SBB r/m32, imm8
o32 83 /3 ib
386+
16/32/64-bit
SBB r/m16, imm16
o16 81 /3 iw
8086+
16/32/64-bit
SBB r/m16, imm8
o16 83 /3 ib
8086+
16/32/64-bit
SBB r/m8, imm8
80 /3 ib
8086+
16/32/64-bit
scasb instruction.
SCASB
AE
8086+
16/32/64-bit
scasd instruction.
SCASD
o32 AF
386+
16/32/64-bit
scasq instruction.
SCASQ
o64 AF
X64
64-bit
scasw instruction.
SCASW
o16 AF
8086+
16/32/64-bit
seamcall instruction.
SEAMCALL
66 0F 01 CF
TDX
64-bit
seamops instruction.
SEAMOPS
66 0F 01 CE
TDX
64-bit
seamret instruction.
SEAMRET
66 0F 01 CD
TDX
64-bit
senduipi instruction.
SENDUIPI r64
F3 0F C7 /6
UINTR
64-bit
serialize instruction.
SERIALIZE
NP 0F 01 E8
SERIALIZE
16/32/64-bit
seta instruction.
SETA r/m8
0F 97 /r
386+
16/32/64-bit
seta instruction.
SETA r/m8
0F 97 /r
386+
16/32/64-bit
setae instruction.
SETAE r/m8
0F 93 /r
386+
16/32/64-bit
setae instruction.
SETAE r/m8
0F 93 /r
386+
16/32/64-bit
setb instruction.
SETB r/m8
0F 92 /r
386+
16/32/64-bit
setb instruction.
SETB r/m8
0F 92 /r
386+
16/32/64-bit
setbe instruction.
SETBE r/m8
0F 96 /r
386+
16/32/64-bit
setbe instruction.
SETBE r/m8
0F 96 /r
386+
16/32/64-bit
setc instruction.
SETB r/m8
0F 92 /r
386+
16/32/64-bit
setc instruction.
SETB r/m8
0F 92 /r
386+
16/32/64-bit
sete instruction.
SETE r/m8
0F 94 /r
386+
16/32/64-bit
sete instruction.
SETE r/m8
0F 94 /r
386+
16/32/64-bit
setg instruction.
SETG r/m8
0F 9F /r
386+
16/32/64-bit
setg instruction.
SETG r/m8
0F 9F /r
386+
16/32/64-bit
setge instruction.
SETGE r/m8
0F 9D /r
386+
16/32/64-bit
setge instruction.
SETGE r/m8
0F 9D /r
386+
16/32/64-bit
setl instruction.
SETL r/m8
0F 9C /r
386+
16/32/64-bit
setl instruction.
SETL r/m8
0F 9C /r
386+
16/32/64-bit
setle instruction.
SETLE r/m8
0F 9E /r
386+
16/32/64-bit
setle instruction.
SETLE r/m8
0F 9E /r
386+
16/32/64-bit
setna instruction.
SETBE r/m8
0F 96 /r
386+
16/32/64-bit
setna instruction.
SETBE r/m8
0F 96 /r
386+
16/32/64-bit
setnae instruction.
SETB r/m8
0F 92 /r
386+
16/32/64-bit
setnae instruction.
SETB r/m8
0F 92 /r
386+
16/32/64-bit
setnb instruction.
SETAE r/m8
0F 93 /r
386+
16/32/64-bit
setnb instruction.
SETAE r/m8
0F 93 /r
386+
16/32/64-bit
setnbe instruction.
SETA r/m8
0F 97 /r
386+
16/32/64-bit
setnbe instruction.
SETA r/m8
0F 97 /r
386+
16/32/64-bit
setnc instruction.
SETAE r/m8
0F 93 /r
386+
16/32/64-bit
setnc instruction.
SETAE r/m8
0F 93 /r
386+
16/32/64-bit
setne instruction.
SETNE r/m8
0F 95 /r
386+
16/32/64-bit
setne instruction.
SETNE r/m8
0F 95 /r
386+
16/32/64-bit
setng instruction.
SETLE r/m8
0F 9E /r
386+
16/32/64-bit
setng instruction.
SETLE r/m8
0F 9E /r
386+
16/32/64-bit
setnge instruction.
SETL r/m8
0F 9C /r
386+
16/32/64-bit
setnge instruction.
SETL r/m8
0F 9C /r
386+
16/32/64-bit
setnl instruction.
SETGE r/m8
0F 9D /r
386+
16/32/64-bit
setnl instruction.
SETGE r/m8
0F 9D /r
386+
16/32/64-bit
setnle instruction.
SETG r/m8
0F 9F /r
386+
16/32/64-bit
setnle instruction.
SETG r/m8
0F 9F /r
386+
16/32/64-bit
setno instruction.
SETNO r/m8
0F 91 /r
386+
16/32/64-bit
setno instruction.
SETNO r/m8
0F 91 /r
386+
16/32/64-bit
setnp instruction.
SETNP r/m8
0F 9B /r
386+
16/32/64-bit
setnp instruction.
SETNP r/m8
0F 9B /r
386+
16/32/64-bit
setns instruction.
SETNS r/m8
0F 99 /r
386+
16/32/64-bit
setns instruction.
SETNS r/m8
0F 99 /r
386+
16/32/64-bit
setnz instruction.
SETNE r/m8
0F 95 /r
386+
16/32/64-bit
setnz instruction.
SETNE r/m8
0F 95 /r
386+
16/32/64-bit
seto instruction.
SETO r/m8
0F 90 /r
386+
16/32/64-bit
seto instruction.
SETO r/m8
0F 90 /r
386+
16/32/64-bit
setp instruction.
SETP r/m8
0F 9A /r
386+
16/32/64-bit
setp instruction.
SETP r/m8
0F 9A /r
386+
16/32/64-bit
setpe instruction.
SETP r/m8
0F 9A /r
386+
16/32/64-bit
setpe instruction.
SETP r/m8
0F 9A /r
386+
16/32/64-bit
setpo instruction.
SETNP r/m8
0F 9B /r
386+
16/32/64-bit
setpo instruction.
SETNP r/m8
0F 9B /r
386+
16/32/64-bit
sets instruction.
SETS r/m8
0F 98 /r
386+
16/32/64-bit
sets instruction.
SETS r/m8
0F 98 /r
386+
16/32/64-bit
setssbsy instruction.
SETSSBSY
F3 0F 01 E8
CET_SS
16/32/64-bit
setz instruction.
SETE r/m8
0F 94 /r
386+
16/32/64-bit
setz instruction.
SETE r/m8
0F 94 /r
386+
16/32/64-bit
sfence instruction.
SFENCE
NP 0F AE F8
SSE
16/32/64-bit
sgdt instruction.
SGDT m
0F 01 /0
X64
64-bit
SGDT m
o32 0F 01 /0
386+
16/32-bit
SGDT m
o16 0F 01 /0
286+
16/32-bit
sha1msg1 instruction.
SHA1MSG1 xmm1, xmm2/m128
NP 0F 38 C9 /r
SHA
16/32/64-bit
sha1msg1 instruction.
SHA1MSG1 xmm1, xmm2/m128
NP 0F 38 C9 /r
SHA
16/32/64-bit
sha1msg2 instruction.
SHA1MSG2 xmm1, xmm2/m128
NP 0F 38 CA /r
SHA
16/32/64-bit
sha1msg2 instruction.
SHA1MSG2 xmm1, xmm2/m128
NP 0F 38 CA /r
SHA
16/32/64-bit
sha1nexte instruction.
SHA1NEXTE xmm1, xmm2/m128
NP 0F 38 C8 /r
SHA
16/32/64-bit
sha1nexte instruction.
SHA1NEXTE xmm1, xmm2/m128
NP 0F 38 C8 /r
SHA
16/32/64-bit
sha1rnds4 instruction.
SHA1RNDS4 xmm1, xmm2/m128, imm8
NP 0F 3A CC /r ib
SHA
16/32/64-bit
sha1rnds4 instruction.
SHA1RNDS4 xmm1, xmm2/m128, imm8
NP 0F 3A CC /r ib
SHA
16/32/64-bit
sha1rnds4 instruction.
SHA1RNDS4 xmm1, xmm2/m128, imm8
NP 0F 3A CC /r ib
SHA
16/32/64-bit
sha1rnds4 instruction.
SHA1RNDS4 xmm1, xmm2/m128, imm8
NP 0F 3A CC /r ib
SHA
16/32/64-bit
sha256msg1 instruction.
SHA256MSG1 xmm1, xmm2/m128
NP 0F 38 CC /r
SHA
16/32/64-bit
sha256msg1 instruction.
SHA256MSG1 xmm1, xmm2/m128
NP 0F 38 CC /r
SHA
16/32/64-bit
sha256msg2 instruction.
SHA256MSG2 xmm1, xmm2/m128
NP 0F 38 CD /r
SHA
16/32/64-bit
sha256msg2 instruction.
SHA256MSG2 xmm1, xmm2/m128
NP 0F 38 CD /r
SHA
16/32/64-bit
sha256rnds2 instruction.
SHA256RNDS2 xmm1, xmm2/m128, <XMM0>
NP 0F 38 CB /r
SHA
16/32/64-bit
sha256rnds2 instruction.
SHA256RNDS2 xmm1, xmm2/m128, <XMM0>
NP 0F 38 CB /r
SHA
16/32/64-bit
shl instruction.
SHL r/m8, CL
D2 /4
8086+
16/32/64-bit
shl instruction.
SHL r/m16, CL
o16 D3 /4
8086+
16/32/64-bit
shl instruction.
SHL r/m32, CL
o32 D3 /4
386+
16/32/64-bit
shl instruction.
SHL r/m64, CL
o64 D3 /4
X64
64-bit
shl instruction.
SHL r/m64, CL
o64 D3 /4
X64
64-bit
SHL r/m32, CL
o32 D3 /4
386+
16/32/64-bit
SHL r/m16, CL
o16 D3 /4
8086+
16/32/64-bit
SHL r/m8, CL
D2 /4
8086+
16/32/64-bit
shl instruction.
SHL r/m8, 1
D0 /4
8086+
16/32/64-bit
SHL r/m8, imm8
C0 /4 ib
186+
16/32/64-bit
shl instruction.
SHL r/m16, 1
o16 D1 /4
8086+
16/32/64-bit
SHL r/m16, imm8
o16 C1 /4 ib
186+
16/32/64-bit
shl instruction.
SHL r/m32, 1
o32 D1 /4
386+
16/32/64-bit
SHL r/m32, imm8
o32 C1 /4 ib
386+
16/32/64-bit
shl instruction.
SHL r/m64, 1
o64 D1 /4
X64
64-bit
SHL r/m64, imm8
o64 C1 /4 ib
X64
64-bit
shl instruction.
SHL r/m64, 1
o64 D1 /4
X64
64-bit
SHL r/m64, imm8
o64 C1 /4 ib
X64
64-bit
SHL r/m32, 1
o32 D1 /4
386+
16/32/64-bit
SHL r/m32, imm8
o32 C1 /4 ib
386+
16/32/64-bit
SHL r/m16, 1
o16 D1 /4
8086+
16/32/64-bit
SHL r/m16, imm8
o16 C1 /4 ib
186+
16/32/64-bit
SHL r/m8, 1
D0 /4
8086+
16/32/64-bit
SHL r/m8, imm8
C0 /4 ib
186+
16/32/64-bit
shl instruction.
SHL r/m8, 1
D0 /4
8086+
16/32/64-bit
SHL r/m8, imm8
C0 /4 ib
186+
16/32/64-bit
shl instruction.
SHL r/m16, 1
o16 D1 /4
8086+
16/32/64-bit
SHL r/m16, imm8
o16 C1 /4 ib
186+
16/32/64-bit
shl instruction.
SHL r/m32, 1
o32 D1 /4
386+
16/32/64-bit
SHL r/m32, imm8
o32 C1 /4 ib
386+
16/32/64-bit
shl instruction.
SHL r/m64, 1
o64 D1 /4
X64
64-bit
SHL r/m64, imm8
o64 C1 /4 ib
X64
64-bit
shl instruction.
SHL r/m64, 1
o64 D1 /4
X64
64-bit
SHL r/m64, imm8
o64 C1 /4 ib
X64
64-bit
SHL r/m32, 1
o32 D1 /4
386+
16/32/64-bit
SHL r/m32, imm8
o32 C1 /4 ib
386+
16/32/64-bit
SHL r/m16, 1
o16 D1 /4
8086+
16/32/64-bit
SHL r/m16, imm8
o16 C1 /4 ib
186+
16/32/64-bit
SHL r/m8, 1
D0 /4
8086+
16/32/64-bit
SHL r/m8, imm8
C0 /4 ib
186+
16/32/64-bit
shld instruction.
SHLD r/m16, r16, CL
o16 0F A5 /r
386+
16/32/64-bit
shld instruction.
SHLD r/m16, r16, CL
o16 0F A5 /r
386+
16/32/64-bit
shld instruction.
SHLD r/m32, r32, CL
o32 0F A5 /r
386+
16/32/64-bit
shld instruction.
SHLD r/m32, r32, CL
o32 0F A5 /r
386+
16/32/64-bit
shld instruction.
SHLD r/m64, r64, CL
o64 0F A5 /r
X64
64-bit
shld instruction.
SHLD r/m64, r64, CL
o64 0F A5 /r
X64
64-bit
shld instruction.
SHLD r/m16, r16, imm8
o16 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m16, r16, imm8
o16 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m32, r32, imm8
o32 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m32, r32, imm8
o32 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m64, r64, imm8
o64 0F A4 /r ib
X64
64-bit
shld instruction.
SHLD r/m64, r64, imm8
o64 0F A4 /r ib
X64
64-bit
shld instruction.
SHLD r/m16, r16, imm8
o16 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m16, r16, imm8
o16 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m32, r32, imm8
o32 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m32, r32, imm8
o32 0F A4 /r ib
386+
16/32/64-bit
shld instruction.
SHLD r/m64, r64, imm8
o64 0F A4 /r ib
X64
64-bit
shld instruction.
SHLD r/m64, r64, imm8
o64 0F A4 /r ib
X64
64-bit
shlx instruction.
SHLX r32a, r/m32, r32b
VEX.LZ.66.0F38.W0 F7 /r
BMI2
16/32/64-bit
shlx instruction.
SHLX r32a, r/m32, r32b
VEX.LZ.66.0F38.W0 F7 /r
BMI2
16/32/64-bit
shlx instruction.
SHLX r64a, r/m64, r64b
VEX.LZ.66.0F38.W1 F7 /r
BMI2
64-bit
shlx instruction.
SHLX r64a, r/m64, r64b
VEX.LZ.66.0F38.W1 F7 /r
BMI2
64-bit
shr instruction.
SHR r/m8, CL
D2 /5
8086+
16/32/64-bit
shr instruction.
SHR r/m16, CL
o16 D3 /5
8086+
16/32/64-bit
shr instruction.
SHR r/m32, CL
o32 D3 /5
386+
16/32/64-bit
shr instruction.
SHR r/m64, CL
o64 D3 /5
X64
64-bit
shr instruction.
SHR r/m64, CL
o64 D3 /5
X64
64-bit
SHR r/m32, CL
o32 D3 /5
386+
16/32/64-bit
SHR r/m16, CL
o16 D3 /5
8086+
16/32/64-bit
SHR r/m8, CL
D2 /5
8086+
16/32/64-bit
shr instruction.
SHR r/m8, 1
D0 /5
8086+
16/32/64-bit
SHR r/m8, imm8
C0 /5 ib
186+
16/32/64-bit
shr instruction.
SHR r/m16, 1
o16 D1 /5
8086+
16/32/64-bit
SHR r/m16, imm8
o16 C1 /5 ib
186+
16/32/64-bit
shr instruction.
SHR r/m32, 1
o32 D1 /5
386+
16/32/64-bit
SHR r/m32, imm8
o32 C1 /5 ib
386+
16/32/64-bit
shr instruction.
SHR r/m64, 1
o64 D1 /5
X64
64-bit
SHR r/m64, imm8
o64 C1 /5 ib
X64
64-bit
shr instruction.
SHR r/m64, 1
o64 D1 /5
X64
64-bit
SHR r/m64, imm8
o64 C1 /5 ib
X64
64-bit
SHR r/m32, 1
o32 D1 /5
386+
16/32/64-bit
SHR r/m32, imm8
o32 C1 /5 ib
386+
16/32/64-bit
SHR r/m16, 1
o16 D1 /5
8086+
16/32/64-bit
SHR r/m16, imm8
o16 C1 /5 ib
186+
16/32/64-bit
SHR r/m8, 1
D0 /5
8086+
16/32/64-bit
SHR r/m8, imm8
C0 /5 ib
186+
16/32/64-bit
shr instruction.
SHR r/m8, 1
D0 /5
8086+
16/32/64-bit
SHR r/m8, imm8
C0 /5 ib
186+
16/32/64-bit
shr instruction.
SHR r/m16, 1
o16 D1 /5
8086+
16/32/64-bit
SHR r/m16, imm8
o16 C1 /5 ib
186+
16/32/64-bit
shr instruction.
SHR r/m32, 1
o32 D1 /5
386+
16/32/64-bit
SHR r/m32, imm8
o32 C1 /5 ib
386+
16/32/64-bit
shr instruction.
SHR r/m64, 1
o64 D1 /5
X64
64-bit
SHR r/m64, imm8
o64 C1 /5 ib
X64
64-bit
shr instruction.
SHR r/m64, 1
o64 D1 /5
X64
64-bit
SHR r/m64, imm8
o64 C1 /5 ib
X64
64-bit
SHR r/m32, 1
o32 D1 /5
386+
16/32/64-bit
SHR r/m32, imm8
o32 C1 /5 ib
386+
16/32/64-bit
SHR r/m16, 1
o16 D1 /5
8086+
16/32/64-bit
SHR r/m16, imm8
o16 C1 /5 ib
186+
16/32/64-bit
SHR r/m8, 1
D0 /5
8086+
16/32/64-bit
SHR r/m8, imm8
C0 /5 ib
186+
16/32/64-bit
shrd instruction.
SHRD r/m16, r16, CL
o16 0F AD /r
386+
16/32/64-bit
shrd instruction.
SHRD r/m16, r16, CL
o16 0F AD /r
386+
16/32/64-bit
shrd instruction.
SHRD r/m32, r32, CL
o32 0F AD /r
386+
16/32/64-bit
shrd instruction.
SHRD r/m32, r32, CL
o32 0F AD /r
386+
16/32/64-bit
shrd instruction.
SHRD r/m64, r64, CL
o64 0F AD /r
X64
64-bit
shrd instruction.
SHRD r/m64, r64, CL
o64 0F AD /r
X64
64-bit
shrd instruction.
SHRD r/m16, r16, imm8
o16 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m16, r16, imm8
o16 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m32, r32, imm8
o32 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m32, r32, imm8
o32 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m64, r64, imm8
o64 0F AC /r ib
X64
64-bit
shrd instruction.
SHRD r/m64, r64, imm8
o64 0F AC /r ib
X64
64-bit
shrd instruction.
SHRD r/m16, r16, imm8
o16 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m16, r16, imm8
o16 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m32, r32, imm8
o32 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m32, r32, imm8
o32 0F AC /r ib
386+
16/32/64-bit
shrd instruction.
SHRD r/m64, r64, imm8
o64 0F AC /r ib
X64
64-bit
shrd instruction.
SHRD r/m64, r64, imm8
o64 0F AC /r ib
X64
64-bit
shrx instruction.
SHRX r32a, r/m32, r32b
VEX.LZ.F2.0F38.W0 F7 /r
BMI2
16/32/64-bit
shrx instruction.
SHRX r32a, r/m32, r32b
VEX.LZ.F2.0F38.W0 F7 /r
BMI2
16/32/64-bit
shrx instruction.
SHRX r64a, r/m64, r64b
VEX.LZ.F2.0F38.W1 F7 /r
BMI2
64-bit
shrx instruction.
SHRX r64a, r/m64, r64b
VEX.LZ.F2.0F38.W1 F7 /r
BMI2
64-bit
shufpd instruction.
SHUFPD xmm1, xmm2/m128, imm8
66 0F C6 /r ib
SSE2
16/32/64-bit
shufpd instruction.
SHUFPD xmm1, xmm2/m128, imm8
66 0F C6 /r ib
SSE2
16/32/64-bit
shufpd instruction.
SHUFPD xmm1, xmm2/m128, imm8
66 0F C6 /r ib
SSE2
16/32/64-bit
shufpd instruction.
SHUFPD xmm1, xmm2/m128, imm8
66 0F C6 /r ib
SSE2
16/32/64-bit
shufps instruction.
SHUFPS xmm1, xmm2/m128, imm8
NP 0F C6 /r ib
SSE
16/32/64-bit
shufps instruction.
SHUFPS xmm1, xmm2/m128, imm8
NP 0F C6 /r ib
SSE
16/32/64-bit
shufps instruction.
SHUFPS xmm1, xmm2/m128, imm8
NP 0F C6 /r ib
SSE
16/32/64-bit
shufps instruction.
SHUFPS xmm1, xmm2/m128, imm8
NP 0F C6 /r ib
SSE
16/32/64-bit
sidt instruction.
SIDT m
0F 01 /1
X64
64-bit
SIDT m
o32 0F 01 /1
386+
16/32-bit
SIDT m
o16 0F 01 /1
286+
16/32-bit
skinit instruction.
SKINIT
0F 01 DE
SKINIT or SVM
16/32/64-bit
sldt instruction.
SLDT r/m16
o16 0F 00 /0
286+
16/32/64-bit
sldt instruction.
SLDT r32/m16
o32 0F 00 /0
386+
16/32/64-bit
sldt instruction.
SLDT r64/m16
o64 0F 00 /0
X64
64-bit
sldt instruction.
SLDT r32/m16
o32 0F 00 /0
386+
16/32/64-bit
SLDT r/m16
o16 0F 00 /0
286+
16/32/64-bit
slwpcb instruction.
SLWPCB r32
XOP.L0.X9.W0 12 /1
LWP
16/32/64-bit
slwpcb instruction.
SLWPCB r64
XOP.L0.X9.W1 12 /1
LWP
64-bit
smint instruction.
SMINT
0F 38
Cyrix 6x86MX+, AMD Geode GX/LX
16/32-bit
smint_0f7e instruction.
SMINT
0F 7E
Cyrix 6x86 or earlier
16/32-bit
smsw instruction.
SMSW r/m16
o16 0F 01 /4
286+
16/32/64-bit
smsw instruction.
SMSW r32/m16
o32 0F 01 /4
386+
16/32/64-bit
smsw instruction.
SMSW r64/m16
o64 0F 01 /4
X64
64-bit
smsw instruction.
SMSW r32/m16
o32 0F 01 /4
386+
16/32/64-bit
SMSW r/m16
o16 0F 01 /4
286+
16/32/64-bit
sqrtpd instruction.
SQRTPD xmm1, xmm2/m128
66 0F 51 /r
SSE2
16/32/64-bit
sqrtpd instruction.
SQRTPD xmm1, xmm2/m128
66 0F 51 /r
SSE2
16/32/64-bit
sqrtps instruction.
SQRTPS xmm1, xmm2/m128
NP 0F 51 /r
SSE
16/32/64-bit
sqrtps instruction.
SQRTPS xmm1, xmm2/m128
NP 0F 51 /r
SSE
16/32/64-bit
sqrtsd instruction.
SQRTSD xmm1, xmm2/m64
F2 0F 51 /r
SSE2
16/32/64-bit
sqrtsd instruction.
SQRTSD xmm1, xmm2/m64
F2 0F 51 /r
SSE2
16/32/64-bit
sqrtss instruction.
SQRTSS xmm1, xmm2/m32
F3 0F 51 /r
SSE
16/32/64-bit
sqrtss instruction.
SQRTSS xmm1, xmm2/m32
F3 0F 51 /r
SSE
16/32/64-bit
stac instruction.
STAC
NP 0F 01 CB
SMAP
16/32/64-bit
stc instruction.
STC
F9
8086+
16/32/64-bit
std instruction.
STD
FD
8086+
16/32/64-bit
stgi instruction.
STGI
0F 01 DC
SKINIT or SVM
16/32/64-bit
sti instruction.
STI
FB
8086+
16/32/64-bit
stmxcsr instruction.
STMXCSR m32
NP 0F AE /3
SSE
16/32/64-bit
stosb instruction.
STOSB
AA
8086+
16/32/64-bit
stosd instruction.
STOSD
o32 AB
386+
16/32/64-bit
stosq instruction.
STOSQ
o64 AB
X64
64-bit
stosw instruction.
STOSW
o16 AB
8086+
16/32/64-bit
str instruction.
STR r/m16
o16 0F 00 /1
286+
16/32/64-bit
str instruction.
STR r32/m16
o32 0F 00 /1
386+
16/32/64-bit
str instruction.
STR r64/m16
o64 0F 00 /1
X64
64-bit
str instruction.
STR r32/m16
o32 0F 00 /1
386+
16/32/64-bit
STR r/m16
o16 0F 00 /1
286+
16/32/64-bit
sttilecfg instruction.
STTILECFG m512
VEX.128.66.0F38.W0 49 !(11):000:bbb
AMX-TILE
64-bit
stui instruction.
STUI
F3 0F 01 EF
UINTR
64-bit
sub instruction.
SUB r/m8, r8
28 /r
8086+
16/32/64-bit
sub instruction.
SUB r/m8, r8
28 /r
8086+
16/32/64-bit
sub instruction.
SUB r/m16, r16
o16 29 /r
8086+
16/32/64-bit
sub instruction.
SUB r/m16, r16
o16 29 /r
8086+
16/32/64-bit
sub instruction.
SUB r/m32, r32
o32 29 /r
386+
16/32/64-bit
sub instruction.
SUB r/m32, r32
o32 29 /r
386+
16/32/64-bit
sub instruction.
SUB r/m64, r64
o64 29 /r
X64
64-bit
sub instruction.
SUB r/m64, r64
o64 29 /r
X64
64-bit
sub instruction.
SUB r8, r/m8
2A /r
8086+
16/32/64-bit
sub instruction.
SUB r16, r/m16
o16 2B /r
8086+
16/32/64-bit
sub instruction.
SUB r32, r/m32
o32 2B /r
386+
16/32/64-bit
sub instruction.
SUB r64, r/m64
o64 2B /r
X64
64-bit
sub instruction.
SUB AL, imm8
2C ib
8086+
16/32/64-bit
SUB r/m8, imm8
80 /5 ib
8086+
16/32/64-bit
sub instruction.
SUB AX, imm16
o16 2D iw
8086+
16/32/64-bit
SUB r/m16, imm16
o16 81 /5 iw
8086+
16/32/64-bit
SUB r/m16, imm8
o16 83 /5 ib
8086+
16/32/64-bit
sub instruction.
SUB EAX, imm32
o32 2D id
386+
16/32/64-bit
SUB r/m32, imm32
o32 81 /5 id
386+
16/32/64-bit
SUB r/m32, imm8
o32 83 /5 ib
386+
16/32/64-bit
sub instruction.
SUB RAX, imm32
o64 2D id
X64
64-bit
SUB r/m64, imm32
o64 81 /5 id
X64
64-bit
SUB r/m64, imm8
o64 83 /5 ib
X64
64-bit
sub instruction.
SUB r/m64, imm32
o64 81 /5 id
X64
64-bit
SUB r/m64, imm8
o64 83 /5 ib
X64
64-bit
SUB r/m32, imm32
o32 81 /5 id
386+
16/32/64-bit
SUB r/m32, imm8
o32 83 /5 ib
386+
16/32/64-bit
SUB r/m16, imm16
o16 81 /5 iw
8086+
16/32/64-bit
SUB r/m16, imm8
o16 83 /5 ib
8086+
16/32/64-bit
SUB r/m8, imm8
80 /5 ib
8086+
16/32/64-bit
sub instruction.
SUB AL, imm8
2C ib
8086+
16/32/64-bit
SUB r/m8, imm8
80 /5 ib
8086+
16/32/64-bit
sub instruction.
SUB AX, imm16
o16 2D iw
8086+
16/32/64-bit
SUB r/m16, imm16
o16 81 /5 iw
8086+
16/32/64-bit
SUB r/m16, imm8
o16 83 /5 ib
8086+
16/32/64-bit
sub instruction.
SUB EAX, imm32
o32 2D id
386+
16/32/64-bit
SUB r/m32, imm32
o32 81 /5 id
386+
16/32/64-bit
SUB r/m32, imm8
o32 83 /5 ib
386+
16/32/64-bit
sub instruction.
SUB r/m32, imm32
o32 81 /5 id
386+
16/32/64-bit
SUB r/m32, imm8
o32 83 /5 ib
386+
16/32/64-bit
SUB r/m16, imm16
o16 81 /5 iw
8086+
16/32/64-bit
SUB r/m16, imm8
o16 83 /5 ib
8086+
16/32/64-bit
SUB r/m8, imm8
80 /5 ib
8086+
16/32/64-bit
subpd instruction.
SUBPD xmm1, xmm2/m128
66 0F 5C /r
SSE2
16/32/64-bit
subpd instruction.
SUBPD xmm1, xmm2/m128
66 0F 5C /r
SSE2
16/32/64-bit
subps instruction.
SUBPS xmm1, xmm2/m128
NP 0F 5C /r
SSE
16/32/64-bit
subps instruction.
SUBPS xmm1, xmm2/m128
NP 0F 5C /r
SSE
16/32/64-bit
subsd instruction.
SUBSD xmm1, xmm2/m64
F2 0F 5C /r
SSE2
16/32/64-bit
subsd instruction.
SUBSD xmm1, xmm2/m64
F2 0F 5C /r
SSE2
16/32/64-bit
subss instruction.
SUBSS xmm1, xmm2/m32
F3 0F 5C /r
SSE
16/32/64-bit
subss instruction.
SUBSS xmm1, xmm2/m32
F3 0F 5C /r
SSE
16/32/64-bit
svdc instruction.
SVDC m80, Sreg
0F 78 /r
Cyrix, AMD Geode GX/LX
16/32-bit
svldt instruction.
SVLDT m80
0F 7A /0
Cyrix, AMD Geode GX/LX
16/32-bit
svts instruction.
SVTS m80
0F 7C /0
Cyrix, AMD Geode GX/LX
16/32-bit
swapgs instruction.
SWAPGS
0F 01 F8
X64
64-bit
syscall instruction.
SYSCALL
0F 05
SYSCALL
16/32/64-bit
sysenter instruction.
SYSENTER
0F 34
SEP
16/32/64-bit
sysexit instruction.
SYSEXIT
0F 35
SEP
16/32/64-bit
sysexitq instruction.
SYSEXITQ
o64 0F 35
SEP
64-bit
sysret instruction.
SYSRET
0F 07
SYSCALL
16/32/64-bit
sysretq instruction.
SYSRETQ
o64 0F 07
SYSCALL
64-bit
t1mskc instruction.
T1MSKC r32, r/m32
XOP.L0.X9.W0 01 /7
TBM
16/32/64-bit
t1mskc instruction.
T1MSKC r64, r/m64
XOP.L0.X9.W1 01 /7
TBM
64-bit
t1mskc instruction.
T1MSKC r32, r/m32
XOP.L0.X9.W0 01 /7
TBM
16/32/64-bit
t1mskc instruction.
T1MSKC r64, r/m64
XOP.L0.X9.W1 01 /7
TBM
64-bit
tcmmimfp16ps instruction.
TCMMIMFP16PS tmm1, tmm2, tmm3
VEX.128.66.0F38.W0 6C 11:rrr:bbb
AMX-COMPLEX
64-bit
tcmmrlfp16ps instruction.
TCMMRLFP16PS tmm1, tmm2, tmm3
VEX.128.0F38.W0 6C 11:rrr:bbb
AMX-COMPLEX
64-bit
tdcall instruction.
TDCALL
66 0F 01 CC
TDX
16/32/64-bit
tdpbf16ps instruction.
TDPBF16PS tmm1, tmm2, tmm3
VEX.128.F3.0F38.W0 5C 11:rrr:bbb
AMX-BF16
64-bit
tdpbssd instruction.
TDPBSSD tmm1, tmm2, tmm3
VEX.128.F2.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
tdpbsud instruction.
TDPBSUD tmm1, tmm2, tmm3
VEX.128.F3.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
tdpbusd instruction.
TDPBUSD tmm1, tmm2, tmm3
VEX.128.66.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
tdpbuud instruction.
TDPBUUD tmm1, tmm2, tmm3
VEX.128.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
tdpfp16ps instruction.
TDPFP16PS tmm1, tmm2, tmm3
VEX.128.F2.0F38.W0 5C 11:rrr:bbb
AMX-FP16
64-bit
test instruction.
TEST r/m8, r8
84 /r
8086+
16/32/64-bit
test instruction.
TEST r/m8, r8
84 /r
8086+
16/32/64-bit
test instruction.
TEST r/m16, r16
o16 85 /r
8086+
16/32/64-bit
test instruction.
TEST r/m16, r16
o16 85 /r
8086+
16/32/64-bit
test instruction.
TEST r/m32, r32
o32 85 /r
386+
16/32/64-bit
test instruction.
TEST r/m32, r32
o32 85 /r
386+
16/32/64-bit
test instruction.
TEST r/m64, r64
o64 85 /r
X64
64-bit
test instruction.
TEST r/m64, r64
o64 85 /r
X64
64-bit
test instruction.
TEST AL, imm8
A8 ib
8086+
16/32/64-bit
TEST r/m8, imm8
F6 /0 ib
8086+
16/32/64-bit
test instruction.
TEST AX, imm16
o16 A9 iw
8086+
16/32/64-bit
TEST r/m16, imm16
o16 F7 /0 iw
8086+
16/32/64-bit
test instruction.
TEST EAX, imm32
o32 A9 id
386+
16/32/64-bit
TEST r/m32, imm32
o32 F7 /0 id
386+
16/32/64-bit
test instruction.
TEST RAX, imm32
o64 A9 id
X64
64-bit
TEST r/m64, imm32
o64 F7 /0 id
X64
64-bit
test instruction.
TEST r/m64, imm32
o64 F7 /0 id
X64
64-bit
TEST r/m32, imm32
o32 F7 /0 id
386+
16/32/64-bit
TEST r/m16, imm16
o16 F7 /0 iw
8086+
16/32/64-bit
TEST r/m8, imm8
F6 /0 ib
8086+
16/32/64-bit
test instruction.
TEST AL, imm8
A8 ib
8086+
16/32/64-bit
TEST r/m8, imm8
F6 /0 ib
8086+
16/32/64-bit
test instruction.
TEST AX, imm16
o16 A9 iw
8086+
16/32/64-bit
TEST r/m16, imm16
o16 F7 /0 iw
8086+
16/32/64-bit
test instruction.
TEST EAX, imm32
o32 A9 id
386+
16/32/64-bit
TEST r/m32, imm32
o32 F7 /0 id
386+
16/32/64-bit
test instruction.
TEST r/m32, imm32
o32 F7 /0 id
386+
16/32/64-bit
TEST r/m16, imm16
o16 F7 /0 iw
8086+
16/32/64-bit
TEST r/m8, imm8
F6 /0 ib
8086+
16/32/64-bit
testui instruction.
TESTUI
F3 0F 01 ED
UINTR
64-bit
tileloadd instruction.
TILELOADD tmm1, sibmem
VEX.128.F2.0F38.W0 4B !(11):rrr:100
AMX-TILE
64-bit
tileloaddt1 instruction.
TILELOADDT1 tmm1, sibmem
VEX.128.66.0F38.W0 4B !(11):rrr:100
AMX-TILE
64-bit
tilerelease instruction.
TILERELEASE
VEX.128.0F38.W0 49 C0
AMX-TILE
64-bit
tilestored instruction.
TILESTORED sibmem, tmm1
VEX.128.F3.0F38.W0 4B !(11):rrr:100
AMX-TILE
64-bit
tilezero instruction.
TILEZERO tmm1
VEX.128.F2.0F38.W0 49 11:rrr:000
AMX-TILE
64-bit
tlbsync instruction.
TLBSYNC
NP 0F 01 FF
INVLPGB
16/32/64-bit
tpause instruction.
TPAUSE r32, <edx>, <eax>
66 0F AE /6
WAITPKG
16/32/64-bit
tpause instruction.
TPAUSE r64, <edx>, <eax>
66 o64 0F AE /6
WAITPKG
64-bit
tzcnt instruction.
TZCNT r16, r/m16
o16 F3 0F BC /r
BMI1
16/32/64-bit
tzcnt instruction.
TZCNT r32, r/m32
o32 F3 0F BC /r
BMI1
16/32/64-bit
tzcnt instruction.
TZCNT r64, r/m64
F3 o64 0F BC /r
BMI1
64-bit
tzcnt instruction.
TZCNT r16, r/m16
o16 F3 0F BC /r
BMI1
16/32/64-bit
tzcnt instruction.
TZCNT r32, r/m32
o32 F3 0F BC /r
BMI1
16/32/64-bit
tzcnt instruction.
TZCNT r64, r/m64
F3 o64 0F BC /r
BMI1
64-bit
tzmsk instruction.
TZMSK r32, r/m32
XOP.L0.X9.W0 01 /4
TBM
16/32/64-bit
tzmsk instruction.
TZMSK r64, r/m64
XOP.L0.X9.W1 01 /4
TBM
64-bit
tzmsk instruction.
TZMSK r32, r/m32
XOP.L0.X9.W0 01 /4
TBM
16/32/64-bit
tzmsk instruction.
TZMSK r64, r/m64
XOP.L0.X9.W1 01 /4
TBM
64-bit
ucomisd instruction.
UCOMISD xmm1, xmm2/m64
66 0F 2E /r
SSE2
16/32/64-bit
ucomisd instruction.
UCOMISD xmm1, xmm2/m64
66 0F 2E /r
SSE2
16/32/64-bit
ucomiss instruction.
UCOMISS xmm1, xmm2/m32
NP 0F 2E /r
SSE
16/32/64-bit
ucomiss instruction.
UCOMISS xmm1, xmm2/m32
NP 0F 2E /r
SSE
16/32/64-bit
ud0 instruction.
UD0
0F FF
286+
16/32/64-bit
ud0 instruction.
UD0 r16, r/m16
o16 0F FF /r
286+
16/32/64-bit
ud0 instruction.
UD0 r32, r/m32
o32 0F FF /r
386+
16/32/64-bit
ud0 instruction.
UD0 r64, r/m64
o64 0F FF /r
X64
64-bit
ud0 instruction.
UD0 r16, r/m16
o16 0F FF /r
286+
16/32/64-bit
ud0 instruction.
UD0 r32, r/m32
o32 0F FF /r
386+
16/32/64-bit
ud0 instruction.
UD0 r64, r/m64
o64 0F FF /r
X64
64-bit
ud1 instruction.
UD1 r16, r/m16
o16 0F B9 /r
286+
16/32/64-bit
ud1 instruction.
UD1 r32, r/m32
o32 0F B9 /r
386+
16/32/64-bit
ud1 instruction.
UD1 r64, r/m64
o64 0F B9 /r
X64
64-bit
ud1 instruction.
UD1 r16, r/m16
o16 0F B9 /r
286+
16/32/64-bit
ud1 instruction.
UD1 r32, r/m32
o32 0F B9 /r
386+
16/32/64-bit
ud1 instruction.
UD1 r64, r/m64
o64 0F B9 /r
X64
64-bit
ud2 instruction.
UD2
0F 0B
286+
16/32/64-bit
uiret instruction.
UIRET
F3 0F 01 EC
UINTR
64-bit
umonitor instruction.
UMONITOR r16
a16 F3 0F AE /6
WAITPKG
16/32-bit
umonitor instruction.
UMONITOR r32
a32 F3 0F AE /6
WAITPKG
16/32/64-bit
umonitor instruction.
UMONITOR r64
a64 F3 0F AE /6
WAITPKG
64-bit
umov instruction.
UMOV r/m8, r8
0F 10 /r
386/486
16/32-bit
umov instruction.
UMOV r/m8, r8
0F 10 /r
386/486
16/32-bit
umov instruction.
UMOV r/m16, r16
o16 0F 11 /r
386/486
16/32-bit
umov instruction.
UMOV r/m16, r16
o16 0F 11 /r
386/486
16/32-bit
umov instruction.
UMOV r/m32, r32
o32 0F 11 /r
386/486
16/32-bit
umov instruction.
UMOV r/m32, r32
o32 0F 11 /r
386/486
16/32-bit
umov instruction.
UMOV r8, r/m8
0F 12 /r
386/486
16/32-bit
umov instruction.
UMOV r16, r/m16
o16 0F 13 /r
386/486
16/32-bit
umov instruction.
UMOV r32, r/m32
o32 0F 13 /r
386/486
16/32-bit
umwait instruction.
UMWAIT r32, <edx>, <eax>
F2 0F AE /6
WAITPKG
16/32/64-bit
umwait instruction.
UMWAIT r64, <edx>, <eax>
F2 o64 0F AE /6
WAITPKG
64-bit
unpckhpd instruction.
UNPCKHPD xmm1, xmm2/m128
66 0F 15 /r
SSE2
16/32/64-bit
unpckhpd instruction.
UNPCKHPD xmm1, xmm2/m128
66 0F 15 /r
SSE2
16/32/64-bit
unpckhps instruction.
UNPCKHPS xmm1, xmm2/m128
NP 0F 15 /r
SSE
16/32/64-bit
unpckhps instruction.
UNPCKHPS xmm1, xmm2/m128
NP 0F 15 /r
SSE
16/32/64-bit
unpcklpd instruction.
UNPCKLPD xmm1, xmm2/m128
66 0F 14 /r
SSE2
16/32/64-bit
unpcklpd instruction.
UNPCKLPD xmm1, xmm2/m128
66 0F 14 /r
SSE2
16/32/64-bit
unpcklps instruction.
UNPCKLPS xmm1, xmm2/m128
NP 0F 14 /r
SSE
16/32/64-bit
unpcklps instruction.
UNPCKLPS xmm1, xmm2/m128
NP 0F 14 /r
SSE
16/32/64-bit
v4fmaddps instruction.
V4FMADDPS zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 9A /r
AVX512_4FMAPS
16/32/64-bit
v4fmaddss instruction.
V4FMADDSS xmm1 {k1}{z}, xmm2+3, m128
EVEX.LIG.F2.0F38.W0 9B /r
AVX512_4FMAPS
16/32/64-bit
v4fnmaddps instruction.
V4FNMADDPS zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 AA /r
AVX512_4FMAPS
16/32/64-bit
v4fnmaddss instruction.
V4FNMADDSS xmm1 {k1}{z}, xmm2+3, m128
EVEX.LIG.F2.0F38.W0 AB /r
AVX512_4FMAPS
16/32/64-bit
vaddpd instruction.
VADDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddpd instruction.
VADDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddpd instruction.
VADDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 58 /r
AVX512F
16/32/64-bit
vaddpd instruction.
VADDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddpd instruction.
VADDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddpd instruction.
VADDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 58 /r
AVX512F
16/32/64-bit
vaddph instruction.
VADDPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 58 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vaddph instruction.
VADDPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 58 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vaddph instruction.
VADDPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 58 /r
AVX512-FP16
16/32/64-bit
vaddph instruction.
VADDPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 58 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vaddph instruction.
VADDPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 58 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vaddph instruction.
VADDPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 58 /r
AVX512-FP16
16/32/64-bit
vaddps instruction.
VADDPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddps instruction.
VADDPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddps instruction.
VADDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 58 /r
AVX512F
16/32/64-bit
vaddps instruction.
VADDPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddps instruction.
VADDPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vaddps instruction.
VADDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 58 /r
AVX512F
16/32/64-bit
vaddsd instruction.
VADDSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 58 /r
AVX
16/32/64-bit
VADDSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 58 /r
AVX512F
16/32/64-bit
vaddsd instruction.
VADDSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 58 /r
AVX
16/32/64-bit
VADDSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 58 /r
AVX512F
16/32/64-bit
vaddsh instruction.
VADDSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 58 /r
AVX512-FP16
16/32/64-bit
vaddsh instruction.
VADDSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 58 /r
AVX512-FP16
16/32/64-bit
vaddss instruction.
VADDSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 58 /r
AVX
16/32/64-bit
VADDSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 58 /r
AVX512F
16/32/64-bit
vaddss instruction.
VADDSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 58 /r
AVX
16/32/64-bit
VADDSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 58 /r
AVX512F
16/32/64-bit
vaddsubpd instruction.
VADDSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D0 /r
AVX
16/32/64-bit
vaddsubpd instruction.
VADDSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D0 /r
AVX
16/32/64-bit
vaddsubpd instruction.
VADDSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D0 /r
AVX
16/32/64-bit
vaddsubpd instruction.
VADDSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D0 /r
AVX
16/32/64-bit
vaddsubps instruction.
VADDSUBPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG D0 /r
AVX
16/32/64-bit
vaddsubps instruction.
VADDSUBPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG D0 /r
AVX
16/32/64-bit
vaddsubps instruction.
VADDSUBPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG D0 /r
AVX
16/32/64-bit
vaddsubps instruction.
VADDSUBPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG D0 /r
AVX
16/32/64-bit
vaesdec instruction.
VAESDEC xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DE /r
AES and AVX
16/32/64-bit
VAESDEC xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DE /r
AVX512VL and VAES
16/32/64-bit
vaesdec instruction.
VAESDEC ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DE /r
VAES
16/32/64-bit
VAESDEC ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DE /r
AVX512VL and VAES
16/32/64-bit
vaesdec instruction.
VAESDEC zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DE /r
AVX512F and VAES
16/32/64-bit
vaesdec instruction.
VAESDEC xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DE /r
AES and AVX
16/32/64-bit
VAESDEC xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DE /r
AVX512VL and VAES
16/32/64-bit
vaesdec instruction.
VAESDEC ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DE /r
VAES
16/32/64-bit
VAESDEC ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DE /r
AVX512VL and VAES
16/32/64-bit
vaesdec instruction.
VAESDEC zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DE /r
AVX512F and VAES
16/32/64-bit
vaesdeclast instruction.
VAESDECLAST xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DF /r
AES and AVX
16/32/64-bit
VAESDECLAST xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DF /r
AVX512VL and VAES
16/32/64-bit
vaesdeclast instruction.
VAESDECLAST ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DF /r
VAES
16/32/64-bit
VAESDECLAST ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DF /r
AVX512VL and VAES
16/32/64-bit
vaesdeclast instruction.
VAESDECLAST zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DF /r
AVX512F and VAES
16/32/64-bit
vaesdeclast instruction.
VAESDECLAST xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DF /r
AES and AVX
16/32/64-bit
VAESDECLAST xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DF /r
AVX512VL and VAES
16/32/64-bit
vaesdeclast instruction.
VAESDECLAST ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DF /r
VAES
16/32/64-bit
VAESDECLAST ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DF /r
AVX512VL and VAES
16/32/64-bit
vaesdeclast instruction.
VAESDECLAST zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DF /r
AVX512F and VAES
16/32/64-bit
vaesenc instruction.
VAESENC xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DC /r
AES and AVX
16/32/64-bit
VAESENC xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DC /r
AVX512VL and VAES
16/32/64-bit
vaesenc instruction.
VAESENC ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DC /r
VAES
16/32/64-bit
VAESENC ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DC /r
AVX512VL and VAES
16/32/64-bit
vaesenc instruction.
VAESENC zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DC /r
AVX512F and VAES
16/32/64-bit
vaesenc instruction.
VAESENC xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DC /r
AES and AVX
16/32/64-bit
VAESENC xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DC /r
AVX512VL and VAES
16/32/64-bit
vaesenc instruction.
VAESENC ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DC /r
VAES
16/32/64-bit
VAESENC ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DC /r
AVX512VL and VAES
16/32/64-bit
vaesenc instruction.
VAESENC zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DC /r
AVX512F and VAES
16/32/64-bit
vaesenclast instruction.
VAESENCLAST xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DD /r
AES and AVX
16/32/64-bit
VAESENCLAST xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DD /r
AVX512VL and VAES
16/32/64-bit
vaesenclast instruction.
VAESENCLAST ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DD /r
VAES
16/32/64-bit
VAESENCLAST ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DD /r
AVX512VL and VAES
16/32/64-bit
vaesenclast instruction.
VAESENCLAST zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DD /r
AVX512F and VAES
16/32/64-bit
vaesenclast instruction.
VAESENCLAST xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DD /r
AES and AVX
16/32/64-bit
VAESENCLAST xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DD /r
AVX512VL and VAES
16/32/64-bit
vaesenclast instruction.
VAESENCLAST ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DD /r
VAES
16/32/64-bit
VAESENCLAST ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DD /r
AVX512VL and VAES
16/32/64-bit
vaesenclast instruction.
VAESENCLAST zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DD /r
AVX512F and VAES
16/32/64-bit
vaesimc instruction.
VAESIMC xmm1, xmm2/m128
VEX.128.66.0F38.WIG DB /r
AES and AVX
16/32/64-bit
vaesimc instruction.
VAESIMC xmm1, xmm2/m128
VEX.128.66.0F38.WIG DB /r
AES and AVX
16/32/64-bit
vaeskeygenassist instruction.
VAESKEYGENASSIST xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG DF /r ib
AES and AVX
16/32/64-bit
vaeskeygenassist instruction.
VAESKEYGENASSIST xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG DF /r ib
AES and AVX
16/32/64-bit
vaeskeygenassist instruction.
VAESKEYGENASSIST xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG DF /r ib
AES and AVX
16/32/64-bit
vaeskeygenassist instruction.
VAESKEYGENASSIST xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG DF /r ib
AES and AVX
16/32/64-bit
valignd instruction.
VALIGND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 03 /r ib
AVX512F
16/32/64-bit
valignd instruction.
VALIGND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 03 /r ib
AVX512F
16/32/64-bit
valignd instruction.
VALIGND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 03 /r ib
AVX512F
16/32/64-bit
valignd instruction.
VALIGND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignd instruction.
VALIGND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 03 /r ib
AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 03 /r ib
AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 03 /r ib
AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 03 /r ib
AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
valignq instruction.
VALIGNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 03 /r ib
AVX512F
16/32/64-bit
vandnpd instruction.
VANDNPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnpd instruction.
VANDNPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnpd instruction.
VANDNPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 55 /r
AVX512DQ
16/32/64-bit
vandnpd instruction.
VANDNPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnpd instruction.
VANDNPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnpd instruction.
VANDNPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 55 /r
AVX512DQ
16/32/64-bit
vandnps instruction.
VANDNPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnps instruction.
VANDNPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnps instruction.
VANDNPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 55 /r
AVX512DQ
16/32/64-bit
vandnps instruction.
VANDNPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnps instruction.
VANDNPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandnps instruction.
VANDNPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 55 /r
AVX512DQ
16/32/64-bit
vandpd instruction.
VANDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandpd instruction.
VANDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandpd instruction.
VANDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 54 /r
AVX512DQ
16/32/64-bit
vandpd instruction.
VANDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandpd instruction.
VANDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandpd instruction.
VANDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 54 /r
AVX512DQ
16/32/64-bit
vandps instruction.
VANDPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandps instruction.
VANDPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandps instruction.
VANDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 54 /r
AVX512DQ
16/32/64-bit
vandps instruction.
VANDPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandps instruction.
VANDPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
vandps instruction.
VANDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 54 /r
AVX512DQ
16/32/64-bit
vbcstnebf162ps instruction.
VBCSTNEBF162PS xmm1, m16
VEX.128.F3.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vbcstnebf162ps instruction.
VBCSTNEBF162PS ymm1, m16
VEX.256.F3.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vbcstnesh2ps instruction.
VBCSTNESH2PS xmm1, m16
VEX.128.66.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vbcstnesh2ps instruction.
VBCSTNESH2PS ymm1, m16
VEX.256.66.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vblendmpd instruction.
VBLENDMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmpd instruction.
VBLENDMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmpd instruction.
VBLENDMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 65 /r
AVX512F
16/32/64-bit
vblendmpd instruction.
VBLENDMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmpd instruction.
VBLENDMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmpd instruction.
VBLENDMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 65 /r
AVX512F
16/32/64-bit
vblendmps instruction.
VBLENDMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmps instruction.
VBLENDMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmps instruction.
VBLENDMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 65 /r
AVX512F
16/32/64-bit
vblendmps instruction.
VBLENDMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmps instruction.
VBLENDMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 65 /r
AVX512VL and AVX512F
16/32/64-bit
vblendmps instruction.
VBLENDMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 65 /r
AVX512F
16/32/64-bit
vblendpd instruction.
VBLENDPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendpd instruction.
VBLENDPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendpd instruction.
VBLENDPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendpd instruction.
VBLENDPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendpd instruction.
VBLENDPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendpd instruction.
VBLENDPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendpd instruction.
VBLENDPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendpd instruction.
VBLENDPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendps instruction.
VBLENDPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
vblendvpd instruction.
VBLENDVPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4B /r /is4
AVX
16/32/64-bit
vblendvpd instruction.
VBLENDVPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4B /r /is4
AVX
16/32/64-bit
vblendvpd instruction.
VBLENDVPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4B /r /is4
AVX
16/32/64-bit
vblendvpd instruction.
VBLENDVPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4B /r /is4
AVX
16/32/64-bit
vblendvps instruction.
VBLENDVPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4A /r /is4
AVX
16/32/64-bit
vblendvps instruction.
VBLENDVPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4A /r /is4
AVX
16/32/64-bit
vblendvps instruction.
VBLENDVPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4A /r /is4
AVX
16/32/64-bit
vblendvps instruction.
VBLENDVPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4A /r /is4
AVX
16/32/64-bit
vbroadcastf128 instruction.
VBROADCASTF128 ymm1, m128
VEX.256.66.0F38.W0 1A /r
AVX
16/32/64-bit
vbroadcastf32x2 instruction.
VBROADCASTF32X2 ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W0 19 /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcastf32x2 instruction.
VBROADCASTF32X2 zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W0 19 /r
AVX512DQ
16/32/64-bit
vbroadcastf32x2 instruction.
VBROADCASTF32X2 ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W0 19 /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcastf32x2 instruction.
VBROADCASTF32X2 zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W0 19 /r
AVX512DQ
16/32/64-bit
vbroadcastf32x4 instruction.
VBROADCASTF32X4 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W0 1A /r
AVX512VL and AVX512F
16/32/64-bit
vbroadcastf32x4 instruction.
VBROADCASTF32X4 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W0 1A /r
AVX512F
16/32/64-bit
vbroadcastf32x8 instruction.
VBROADCASTF32X8 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W0 1B /r
AVX512DQ
16/32/64-bit
vbroadcastf64x2 instruction.
VBROADCASTF64X2 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W1 1A /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcastf64x2 instruction.
VBROADCASTF64X2 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W1 1A /r
AVX512DQ
16/32/64-bit
vbroadcastf64x4 instruction.
VBROADCASTF64X4 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W1 1B /r
AVX512F
16/32/64-bit
vbroadcasti128 instruction.
VBROADCASTI128 ymm1, m128
VEX.256.66.0F38.W0 5A /r
AVX2
16/32/64-bit
vbroadcasti32x2 instruction.
VBROADCASTI32X2 xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 59 /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcasti32x2 instruction.
VBROADCASTI32X2 ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W0 59 /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcasti32x2 instruction.
VBROADCASTI32X2 zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W0 59 /r
AVX512DQ
16/32/64-bit
vbroadcasti32x2 instruction.
VBROADCASTI32X2 xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 59 /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcasti32x2 instruction.
VBROADCASTI32X2 ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W0 59 /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcasti32x2 instruction.
VBROADCASTI32X2 zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W0 59 /r
AVX512DQ
16/32/64-bit
vbroadcasti32x4 instruction.
VBROADCASTI32X4 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
vbroadcasti32x4 instruction.
VBROADCASTI32X4 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W0 5A /r
AVX512F
16/32/64-bit
vbroadcasti32x8 instruction.
VBROADCASTI32X8 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W0 5B /r
AVX512DQ
16/32/64-bit
vbroadcasti64x2 instruction.
VBROADCASTI64X2 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W1 5A /r
AVX512VL and AVX512DQ
16/32/64-bit
vbroadcasti64x2 instruction.
VBROADCASTI64X2 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W1 5A /r
AVX512DQ
16/32/64-bit
vbroadcasti64x4 instruction.
VBROADCASTI64X4 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W1 5B /r
AVX512F
16/32/64-bit
vbroadcastsd instruction.
VBROADCASTSD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W1 19 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSD ymm1, xmm2
VEX.256.66.0F38.W0 19 /r
AVX2
16/32/64-bit
vbroadcastsd instruction.
VBROADCASTSD zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W1 19 /r
AVX512F
16/32/64-bit
vbroadcastsd instruction.
VBROADCASTSD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W1 19 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSD ymm1, m64
VEX.256.66.0F38.W0 19 /r
AVX
16/32/64-bit
vbroadcastsd instruction.
VBROADCASTSD zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W1 19 /r
AVX512F
16/32/64-bit
vbroadcastss instruction.
VBROADCASTSS xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.W0 18 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSS xmm1, xmm2
VEX.128.66.0F38.W0 18 /r
AVX2
16/32/64-bit
vbroadcastss instruction.
VBROADCASTSS ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.W0 18 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSS ymm1, xmm2
VEX.256.66.0F38.W0 18 /r
AVX2
16/32/64-bit
vbroadcastss instruction.
VBROADCASTSS zmm1 {k1}{z}, xmm2/m32
EVEX.512.66.0F38.W0 18 /r
AVX512F
16/32/64-bit
vbroadcastss instruction.
VBROADCASTSS xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.W0 18 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSS xmm1, m32
VEX.128.66.0F38.W0 18 /r
AVX
16/32/64-bit
vbroadcastss instruction.
VBROADCASTSS ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.W0 18 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSS ymm1, m32
VEX.256.66.0F38.W0 18 /r
AVX
16/32/64-bit
vbroadcastss instruction.
VBROADCASTSS zmm1 {k1}{z}, xmm2/m32
EVEX.512.66.0F38.W0 18 /r
AVX512F
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ospd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_osph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_osph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_osph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_osph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_osph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_osph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_osps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_ossd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_ossd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ossd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_ossd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ossh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_ossh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_osss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_osss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_osss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_osss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_uspd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_usph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_usph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_usph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_usph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_usph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeq_usph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_usps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_ussd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_ussd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ussd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_ussd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_ussh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_ussh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeq_usss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_usss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeq_usss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeq_usss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpeqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpeqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpeqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpeqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpeqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_ospd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_osph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalse_osph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalse_osph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalse_osph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalse_osph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalse_osph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_osps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_ossd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_ossd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_ossd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_ossd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_ossh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalse_ossh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalse_osss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_osss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalse_osss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalse_osss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalseph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalseph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalseph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalseph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalseph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpfalseph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalseps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalseps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalseps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalseps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalseps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalseps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalseps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalseps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpfalseps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalseps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalsesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalsesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalsesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalsesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpfalsess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalsess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpfalsess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpfalsess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpge_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpge_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpge_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpge_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpge_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpge_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpge_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpge_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpge_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgeph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgeph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgeph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgeph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgeph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgeph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgeps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgeps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgeps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgeps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgeps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgeps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgeps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgeps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgeps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgeps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgt_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgt_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgt_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgt_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgt_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgt_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgt_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgt_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgt_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgtph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgtph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgtph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgtph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpgtph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgtps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpgtps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgtsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpgtss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpgtss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpgtss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmple_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmple_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmple_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmple_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmple_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmple_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmple_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmple_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmple_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmple_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmple_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmplepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpleph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpleph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpleph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpleph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpleph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpleph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpleps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpleps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpleps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpleps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpleps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpleps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpleps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpleps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpleps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpleps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmplesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmplesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmplesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmplesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpless instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpless instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpless instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpless instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmplt_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmplt_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmplt_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmplt_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmplt_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmplt_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmplt_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmplt_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmplt_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpltpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpltph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpltph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpltph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpltph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpltph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpltph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpltps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpltps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpltps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpltsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpltsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpltsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpltsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpltss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpltss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpltss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpltss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_oqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_oqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_oqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_oqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_oqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_oqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ospd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_osph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_osph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_osph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_osph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_osph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_osph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_osps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_ossd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_ossd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ossd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_ossd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ossh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_ossh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_osss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_osss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_osss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_osss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_uspd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_usph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_usph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_usph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_usph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_usph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneq_usph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_usps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_ussd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_ussd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ussd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_ussd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_ussh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_ussh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneq_usss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_usss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneq_usss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneq_usss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpneqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpneqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpneqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpneqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpneqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnge_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnge_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnge_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnge_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnge_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnge_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnge_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnge_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnge_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngeph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngeph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngeph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngeph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngeph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngeph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngeps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngeps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngeps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngeps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngeps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngeps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngeps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngeps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngeps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngeps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngt_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngt_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngt_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngt_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngt_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngt_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngt_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngt_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngt_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngtph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngtph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngtph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngtph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpngtph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngtps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpngtps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngtsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpngtss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpngtss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpngtss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnle_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnle_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnle_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnle_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnle_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnle_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnle_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnle_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnle_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnleph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnleph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnleph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnleph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnleph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnleph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnleps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnleps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnleps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnleps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnleps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnleps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnleps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnleps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnleps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnleps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnlesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnless instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnless instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnless instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnless instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnlt_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnlt_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnlt_uqph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnlt_uqph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnlt_uqph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnlt_uqsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnlt_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnlt_uqss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnlt_uqss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnltph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnltph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnltph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnltph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpnltph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnltps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpnltps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnltsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpnltss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpnltss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpnltss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_spd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_spd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_spd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_spd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_spd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_spd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_spd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_spd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_spd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_spd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_sph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpord_sph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpord_sph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpord_sph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpord_sph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpord_sph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpord_sps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_sps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_sps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_sps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_sps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_sps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_sps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_sps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpord_sps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_sps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_ssd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_ssd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_ssd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_ssd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_ssh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpord_ssh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpord_sss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_sss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpord_sss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpord_sss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpordpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpordph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpordph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpordph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpordph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpordph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpordph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpordps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpordps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpordps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpordsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpordsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpordsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpordsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpordss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpordss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpordss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpordss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmppd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmppd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_uspd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_usph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrue_usph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrue_usph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptrue_usph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrue_usph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrue_usph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_usps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_ussd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_ussd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_ussd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_ussd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_ussh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptrue_ussh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptrue_usss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_usss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrue_usss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptrue_usss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptruepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptruepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptruepd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptruepd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruepd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptruepd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruepd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptrueph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrueph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrueph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptrueph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrueph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmptrueph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptrueps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrueps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrueps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrueps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrueps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptrueps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrueps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrueps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmptrueps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptrueps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptruesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptruesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruesd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmptruesd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptruesh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmptruess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptruess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmptruess instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmptruess instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_spd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_sph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunord_sph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunord_sph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunord_sph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunord_sph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunord_sph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_sps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_ssd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_ssd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_ssd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_ssd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_ssh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunord_ssh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunord_sss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_sss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunord_sss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunord_sss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordpd instruction.
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordpd instruction.
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordpd instruction.
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordpd instruction.
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordpd instruction.
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunordph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunordph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunordph instruction.
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunordph instruction.
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vcmpunordph instruction.
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunordps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordps instruction.
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordps instruction.
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordps instruction.
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
vcmpunordps instruction.
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordps instruction.
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordsd instruction.
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordsd instruction.
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunordsh instruction.
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
vcmpunordss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcmpunordss instruction.
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
vcmpunordss instruction.
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
vcomisd instruction.
VCOMISD xmm1, xmm2/m64
VEX.LIG.66.0F.WIG 2F /r
AVX
16/32/64-bit
VCOMISD xmm1, xmm2/m64{sae}
EVEX.LIG.66.0F.W1 2F /r
AVX512F
16/32/64-bit
vcomisd instruction.
VCOMISD xmm1, xmm2/m64
VEX.LIG.66.0F.WIG 2F /r
AVX
16/32/64-bit
VCOMISD xmm1, xmm2/m64{sae}
EVEX.LIG.66.0F.W1 2F /r
AVX512F
16/32/64-bit
vcomish instruction.
VCOMISH xmm1, xmm2/m16{sae}
EVEX.LIG.MAP5.W0 2F /r
AVX512-FP16
16/32/64-bit
vcomish instruction.
VCOMISH xmm1, xmm2/m16{sae}
EVEX.LIG.MAP5.W0 2F /r
AVX512-FP16
16/32/64-bit
vcomiss instruction.
VCOMISS xmm1, xmm2/m32
VEX.LIG.0F.WIG 2F /r
AVX
16/32/64-bit
VCOMISS xmm1, xmm2/m32{sae}
EVEX.LIG.0F.W0 2F /r
AVX512F
16/32/64-bit
vcomiss instruction.
VCOMISS xmm1, xmm2/m32
VEX.LIG.0F.WIG 2F /r
AVX
16/32/64-bit
VCOMISS xmm1, xmm2/m32{sae}
EVEX.LIG.0F.W0 2F /r
AVX512F
16/32/64-bit
vcompresspd instruction.
VCOMPRESSPD xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompresspd instruction.
VCOMPRESSPD xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompresspd instruction.
VCOMPRESSPD ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompresspd instruction.
VCOMPRESSPD ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompresspd instruction.
VCOMPRESSPD zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 8A /r
AVX512F
16/32/64-bit
vcompresspd instruction.
VCOMPRESSPD zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 8A /r
AVX512F
16/32/64-bit
vcompressps instruction.
VCOMPRESSPS xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompressps instruction.
VCOMPRESSPS xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompressps instruction.
VCOMPRESSPS ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompressps instruction.
VCOMPRESSPS ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 8A /r
AVX512VL and AVX512F
16/32/64-bit
vcompressps instruction.
VCOMPRESSPS zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 8A /r
AVX512F
16/32/64-bit
vcompressps instruction.
VCOMPRESSPS zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 8A /r
AVX512F
16/32/64-bit
vcvtdq2pd instruction.
VCVTDQ2PD xmm1, xmm2/m64
VEX.128.F3.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.F3.0F.W0 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2pd instruction.
VCVTDQ2PD ymm1, xmm2/m128
VEX.256.F3.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.F3.0F.W0 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2pd instruction.
VCVTDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.F3.0F.W0 E6 /r
AVX512F
16/32/64-bit
vcvtdq2pd instruction.
VCVTDQ2PD xmm1, xmm2/m64
VEX.128.F3.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.F3.0F.W0 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2pd instruction.
VCVTDQ2PD ymm1, xmm2/m128
VEX.256.F3.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.F3.0F.W0 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2pd instruction.
VCVTDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.F3.0F.W0 E6 /r
AVX512F
16/32/64-bit
vcvtdq2ph instruction.
VCVTDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtdq2ph instruction.
VCVTDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtdq2ph instruction.
VCVTDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
vcvtdq2ph instruction.
VCVTDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtdq2ph instruction.
VCVTDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
vcvtdq2phx instruction.
VCVTDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtdq2phy instruction.
VCVTDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtdq2ps instruction.
VCVTDQ2PS xmm1, xmm2/m128
VEX.128.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2ps instruction.
VCVTDQ2PS ymm1, ymm2/m256
VEX.256.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2ps instruction.
VCVTDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 5B /r
AVX512F
16/32/64-bit
vcvtdq2ps instruction.
VCVTDQ2PS xmm1, xmm2/m128
VEX.128.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2ps instruction.
VCVTDQ2PS ymm1, ymm2/m256
VEX.256.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtdq2ps instruction.
VCVTDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 5B /r
AVX512F
16/32/64-bit
vcvtne2ps2bf16 instruction.
VCVTNE2PS2BF16 xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vcvtne2ps2bf16 instruction.
VCVTNE2PS2BF16 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vcvtne2ps2bf16 instruction.
VCVTNE2PS2BF16 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.F2.0F38.W0 72 /r
AVX512F and AVX512_BF16
16/32/64-bit
vcvtne2ps2bf16 instruction.
VCVTNE2PS2BF16 xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vcvtne2ps2bf16 instruction.
VCVTNE2PS2BF16 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vcvtne2ps2bf16 instruction.
VCVTNE2PS2BF16 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.F2.0F38.W0 72 /r
AVX512F and AVX512_BF16
16/32/64-bit
vcvtneebf162ps instruction.
VCVTNEEBF162PS xmm1, m128
VEX.128.F3.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneebf162ps instruction.
VCVTNEEBF162PS ymm1, m256
VEX.256.F3.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneeph2ps instruction.
VCVTNEEPH2PS xmm1, m128
VEX.128.66.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneeph2ps instruction.
VCVTNEEPH2PS ymm1, m256
VEX.256.66.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneobf162ps instruction.
VCVTNEOBF162PS xmm1, m128
VEX.128.F2.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneobf162ps instruction.
VCVTNEOBF162PS ymm1, m256
VEX.256.F2.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneoph2ps instruction.
VCVTNEOPH2PS xmm1, m128
VEX.128.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneoph2ps instruction.
VCVTNEOPH2PS ymm1, m256
VEX.256.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
vcvtneps2bf16 instruction.
VCVTNEPS2BF16 xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNEPS2BF16 xmm1, xmm2/m128
VEX.128.F3.0F38.W0 72 /r
AVX-NE-CONVERT
16/32/64-bit
vcvtneps2bf16 instruction.
VCVTNEPS2BF16 xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNEPS2BF16 xmm1, ymm2/m256
VEX.256.F3.0F38.W0 72 /r
AVX-NE-CONVERT
16/32/64-bit
vcvtneps2bf16 instruction.
VCVTNEPS2BF16 ymm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.F3.0F38.W0 72 /r
AVX512F and AVX512_BF16
16/32/64-bit
vcvtneps2bf16 instruction.
VCVTNEPS2BF16 xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNEPS2BF16 xmm1, ymm2/m256
VEX.256.F3.0F38.W0 72 /r
AVX-NE-CONVERT
16/32/64-bit
VCVTNEPS2BF16 xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNEPS2BF16 xmm1, xmm2/m128
VEX.128.F3.0F38.W0 72 /r
AVX-NE-CONVERT
16/32/64-bit
vcvtneps2bf16 instruction.
VCVTNEPS2BF16 ymm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.F3.0F38.W0 72 /r
AVX512F and AVX512_BF16
16/32/64-bit
vcvtneps2bf16x instruction.
VCVTNEPS2BF16 xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vcvtneps2bf16y instruction.
VCVTNEPS2BF16 xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vcvtpd2dq instruction.
VCVTPD2DQ xmm1, xmm2/m128
VEX.128.F2.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2dq instruction.
VCVTPD2DQ xmm1, ymm2/m256
VEX.256.F2.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2dq instruction.
VCVTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.0F.W1 E6 /r
AVX512F
16/32/64-bit
vcvtpd2dq instruction.
VCVTPD2DQ xmm1, ymm2/m256
VEX.256.F2.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2DQ xmm1, xmm2/m128
VEX.128.F2.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2dq instruction.
VCVTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.0F.W1 E6 /r
AVX512F
16/32/64-bit
vcvtpd2dqx instruction.
VCVTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2dqy instruction.
VCVTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2ph instruction.
VCVTPD2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtpd2ph instruction.
VCVTPD2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtpd2ph instruction.
VCVTPD2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.MAP5.W1 5A /r
AVX512-FP16
16/32/64-bit
vcvtpd2ph instruction.
VCVTPD2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.MAP5.W1 5A /r
AVX512-FP16
16/32/64-bit
VCVTPD2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPD2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtpd2phx instruction.
VCVTPD2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtpd2phy instruction.
VCVTPD2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtpd2phz instruction.
VCVTPD2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.MAP5.W1 5A /r
AVX512-FP16
16/32/64-bit
vcvtpd2ps instruction.
VCVTPD2PS xmm1, xmm2/m128
VEX.128.66.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPD2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2ps instruction.
VCVTPD2PS xmm1, ymm2/m256
VEX.256.66.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPD2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2ps instruction.
VCVTPD2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 5A /r
AVX512F
16/32/64-bit
vcvtpd2ps instruction.
VCVTPD2PS xmm1, ymm2/m256
VEX.256.66.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPD2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2PS xmm1, xmm2/m128
VEX.128.66.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPD2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2ps instruction.
VCVTPD2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 5A /r
AVX512F
16/32/64-bit
vcvtpd2psx instruction.
VCVTPD2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2psy instruction.
VCVTPD2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2qq instruction.
VCVTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2qq instruction.
VCVTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2qq instruction.
VCVTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 7B /r
AVX512DQ
16/32/64-bit
vcvtpd2qq instruction.
VCVTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2qq instruction.
VCVTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2qq instruction.
VCVTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 7B /r
AVX512DQ
16/32/64-bit
vcvtpd2udq instruction.
VCVTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2udq instruction.
VCVTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2udq instruction.
VCVTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.0F.W1 79 /r
AVX512F
16/32/64-bit
vcvtpd2udq instruction.
VCVTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2udq instruction.
VCVTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.0F.W1 79 /r
AVX512F
16/32/64-bit
vcvtpd2udqx instruction.
VCVTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2udqy instruction.
VCVTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtpd2uqq instruction.
VCVTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2uqq instruction.
VCVTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2uqq instruction.
VCVTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 79 /r
AVX512DQ
16/32/64-bit
vcvtpd2uqq instruction.
VCVTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2uqq instruction.
VCVTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtpd2uqq instruction.
VCVTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 79 /r
AVX512DQ
16/32/64-bit
vcvtph2dq instruction.
VCVTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.66.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2dq instruction.
VCVTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.66.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2dq instruction.
VCVTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}
EVEX.512.66.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
vcvtph2dq instruction.
VCVTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.66.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2dq instruction.
VCVTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.66.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2dq instruction.
VCVTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}
EVEX.512.66.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
vcvtph2pd instruction.
VCVTPH2PD xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.MAP5.W0 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2pd instruction.
VCVTPH2PD ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.MAP5.W0 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2pd instruction.
VCVTPH2PD zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.MAP5.W0 5A /r
AVX512-FP16
16/32/64-bit
vcvtph2pd instruction.
VCVTPH2PD xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.MAP5.W0 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2pd instruction.
VCVTPH2PD ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.MAP5.W0 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2pd instruction.
VCVTPH2PD zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.MAP5.W0 5A /r
AVX512-FP16
16/32/64-bit
vcvtph2ps instruction.
VCVTPH2PS xmm1, xmm2/m64
VEX.128.66.0F38.W0 13 /r
F16C
16/32/64-bit
VCVTPH2PS xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtph2ps instruction.
VCVTPH2PS ymm1, xmm2/m128
VEX.256.66.0F38.W0 13 /r
F16C
16/32/64-bit
VCVTPH2PS ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtph2ps instruction.
VCVTPH2PS zmm1 {k1}{z}, ymm2/m256{sae}
EVEX.512.66.0F38.W0 13 /r
AVX512F
16/32/64-bit
vcvtph2ps instruction.
VCVTPH2PS xmm1, xmm2/m64
VEX.128.66.0F38.W0 13 /r
F16C
16/32/64-bit
VCVTPH2PS xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtph2ps instruction.
VCVTPH2PS ymm1, xmm2/m128
VEX.256.66.0F38.W0 13 /r
F16C
16/32/64-bit
VCVTPH2PS ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtph2ps instruction.
VCVTPH2PS zmm1 {k1}{z}, ymm2/m256{sae}
EVEX.512.66.0F38.W0 13 /r
AVX512F
16/32/64-bit
vcvtph2psx instruction.
VCVTPH2PSX xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.66.MAP6.W0 13 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2psx instruction.
VCVTPH2PSX ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.66.MAP6.W0 13 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2psx instruction.
VCVTPH2PSX zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.66.MAP6.W0 13 /r
AVX512-FP16
16/32/64-bit
vcvtph2psx instruction.
VCVTPH2PSX xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.66.MAP6.W0 13 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2psx instruction.
VCVTPH2PSX ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.66.MAP6.W0 13 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2psx instruction.
VCVTPH2PSX zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.66.MAP6.W0 13 /r
AVX512-FP16
16/32/64-bit
vcvtph2qq instruction.
VCVTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 7B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2qq instruction.
VCVTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 7B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2qq instruction.
VCVTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}
EVEX.512.66.MAP5.W0 7B /r
AVX512-FP16
16/32/64-bit
vcvtph2qq instruction.
VCVTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 7B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2qq instruction.
VCVTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 7B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2qq instruction.
VCVTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}
EVEX.512.66.MAP5.W0 7B /r
AVX512-FP16
16/32/64-bit
vcvtph2udq instruction.
VCVTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2udq instruction.
VCVTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2udq instruction.
VCVTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}
EVEX.512.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
vcvtph2udq instruction.
VCVTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2udq instruction.
VCVTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2udq instruction.
VCVTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}
EVEX.512.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
vcvtph2uqq instruction.
VCVTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uqq instruction.
VCVTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uqq instruction.
VCVTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}
EVEX.512.66.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
vcvtph2uqq instruction.
VCVTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uqq instruction.
VCVTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uqq instruction.
VCVTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}
EVEX.512.66.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
vcvtph2uw instruction.
VCVTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uw instruction.
VCVTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uw instruction.
VCVTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vcvtph2uw instruction.
VCVTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uw instruction.
VCVTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2uw instruction.
VCVTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vcvtph2w instruction.
VCVTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2w instruction.
VCVTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2w instruction.
VCVTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.66.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vcvtph2w instruction.
VCVTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2w instruction.
VCVTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtph2w instruction.
VCVTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.66.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vcvtps2dq instruction.
VCVTPS2DQ xmm1, xmm2/m128
VEX.128.66.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2dq instruction.
VCVTPS2DQ ymm1, ymm2/m256
VEX.256.66.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2dq instruction.
VCVTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.66.0F.W0 5B /r
AVX512F
16/32/64-bit
vcvtps2dq instruction.
VCVTPS2DQ xmm1, xmm2/m128
VEX.128.66.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2dq instruction.
VCVTPS2DQ ymm1, ymm2/m256
VEX.256.66.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2dq instruction.
VCVTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.66.0F.W0 5B /r
AVX512F
16/32/64-bit
vcvtps2pd instruction.
VCVTPS2PD xmm1, xmm2/m64
VEX.128.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPS2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.0F.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2pd instruction.
VCVTPS2PD ymm1, xmm2/m128
VEX.256.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPS2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.0F.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2pd instruction.
VCVTPS2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.0F.W0 5A /r
AVX512F
16/32/64-bit
vcvtps2pd instruction.
VCVTPS2PD xmm1, xmm2/m64
VEX.128.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPS2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.0F.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2pd instruction.
VCVTPS2PD ymm1, xmm2/m128
VEX.256.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPS2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.0F.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2pd instruction.
VCVTPS2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.0F.W0 5A /r
AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m64, xmm2, imm8
VEX.128.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m64 {k1}{z}, xmm2, imm8
EVEX.128.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m64, xmm2, imm8
VEX.128.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m64 {k1}{z}, xmm2, imm8
EVEX.128.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH ymm1/m256 {k1}{z}, zmm2{sae}, imm8
EVEX.512.66.0F3A.W0 1D /r ib
AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH ymm1/m256 {k1}{z}, zmm2{sae}, imm8
EVEX.512.66.0F3A.W0 1D /r ib
AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m64, xmm2, imm8
VEX.128.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m64 {k1}{z}, xmm2, imm8
EVEX.128.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m64, xmm2, imm8
VEX.128.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m64 {k1}{z}, xmm2, imm8
EVEX.128.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH ymm1/m256 {k1}{z}, zmm2{sae}, imm8
EVEX.512.66.0F3A.W0 1D /r ib
AVX512F
16/32/64-bit
vcvtps2ph instruction.
VCVTPS2PH ymm1/m256 {k1}{z}, zmm2{sae}, imm8
EVEX.512.66.0F3A.W0 1D /r ib
AVX512F
16/32/64-bit
vcvtps2phx instruction.
VCVTPS2PHX xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtps2phx instruction.
VCVTPS2PHX xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtps2phx instruction.
VCVTPS2PHX ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.66.MAP5.W0 1D /r
AVX512-FP16
16/32/64-bit
vcvtps2phx instruction.
VCVTPS2PHX xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPS2PHX xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtps2phx instruction.
VCVTPS2PHX ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.66.MAP5.W0 1D /r
AVX512-FP16
16/32/64-bit
vcvtps2phxx instruction.
VCVTPS2PHX xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtps2phxy instruction.
VCVTPS2PHX xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtps2qq instruction.
VCVTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2qq instruction.
VCVTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2qq instruction.
VCVTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.66.0F.W0 7B /r
AVX512DQ
16/32/64-bit
vcvtps2qq instruction.
VCVTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2qq instruction.
VCVTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2qq instruction.
VCVTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.66.0F.W0 7B /r
AVX512DQ
16/32/64-bit
vcvtps2udq instruction.
VCVTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2udq instruction.
VCVTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2udq instruction.
VCVTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 79 /r
AVX512F
16/32/64-bit
vcvtps2udq instruction.
VCVTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2udq instruction.
VCVTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 79 /r
AVX512VL and AVX512F
16/32/64-bit
vcvtps2udq instruction.
VCVTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 79 /r
AVX512F
16/32/64-bit
vcvtps2uqq instruction.
VCVTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2uqq instruction.
VCVTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2uqq instruction.
VCVTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.66.0F.W0 79 /r
AVX512DQ
16/32/64-bit
vcvtps2uqq instruction.
VCVTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2uqq instruction.
VCVTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtps2uqq instruction.
VCVTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.66.0F.W0 79 /r
AVX512DQ
16/32/64-bit
vcvtqq2pd instruction.
VCVTQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F3.0F.W1 E6 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2pd instruction.
VCVTQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F3.0F.W1 E6 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2pd instruction.
VCVTQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F3.0F.W1 E6 /r
AVX512DQ
16/32/64-bit
vcvtqq2pd instruction.
VCVTQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F3.0F.W1 E6 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2pd instruction.
VCVTQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F3.0F.W1 E6 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2pd instruction.
VCVTQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F3.0F.W1 E6 /r
AVX512DQ
16/32/64-bit
vcvtqq2ph instruction.
VCVTQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtqq2ph instruction.
VCVTQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtqq2ph instruction.
VCVTQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.MAP5.W1 5B /r
AVX512-FP16
16/32/64-bit
vcvtqq2ph instruction.
VCVTQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.MAP5.W1 5B /r
AVX512-FP16
16/32/64-bit
VCVTQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtqq2phx instruction.
VCVTQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtqq2phy instruction.
VCVTQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtqq2phz instruction.
VCVTQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.MAP5.W1 5B /r
AVX512-FP16
16/32/64-bit
vcvtqq2ps instruction.
VCVTQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2ps instruction.
VCVTQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2ps instruction.
VCVTQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.0F.W1 5B /r
AVX512DQ
16/32/64-bit
vcvtqq2ps instruction.
VCVTQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2ps instruction.
VCVTQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.0F.W1 5B /r
AVX512DQ
16/32/64-bit
vcvtqq2psx instruction.
VCVTQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtqq2psy instruction.
VCVTQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtsd2sh instruction.
VCVTSD2SH xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.MAP5.W1 5A /r
AVX512-FP16
16/32/64-bit
vcvtsd2sh instruction.
VCVTSD2SH xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.MAP5.W1 5A /r
AVX512-FP16
16/32/64-bit
vcvtsd2si instruction.
VCVTSD2SI r32, xmm1/m64
VEX.LIG.F2.0F.W0 2D /r
AVX
16/32/64-bit
VCVTSD2SI r32, xmm1/m64{er}
EVEX.LIG.F2.0F.W0 2D /r
AVX512F
16/32/64-bit
vcvtsd2si instruction.
VCVTSD2SI r64, xmm1/m64
VEX.LIG.F2.0F.W1 2D /r
AVX
64-bit
VCVTSD2SI r64, xmm1/m64{er}
EVEX.LIG.F2.0F.W1 2D /r
AVX512F
64-bit
vcvtsd2si instruction.
VCVTSD2SI r32, xmm1/m64
VEX.LIG.F2.0F.W0 2D /r
AVX
16/32/64-bit
VCVTSD2SI r32, xmm1/m64{er}
EVEX.LIG.F2.0F.W0 2D /r
AVX512F
16/32/64-bit
vcvtsd2si instruction.
VCVTSD2SI r64, xmm1/m64
VEX.LIG.F2.0F.W1 2D /r
AVX
64-bit
VCVTSD2SI r64, xmm1/m64{er}
EVEX.LIG.F2.0F.W1 2D /r
AVX512F
64-bit
vcvtsd2ss instruction.
VCVTSD2SS xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTSD2SS xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5A /r
AVX512F
16/32/64-bit
vcvtsd2ss instruction.
VCVTSD2SS xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTSD2SS xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5A /r
AVX512F
16/32/64-bit
vcvtsd2usi instruction.
VCVTSD2USI r32, xmm1/m64{er}
EVEX.LIG.F2.0F.W0 79 /r
AVX512F
16/32/64-bit
vcvtsd2usi instruction.
VCVTSD2USI r64, xmm1/m64{er}
EVEX.LIG.F2.0F.W1 79 /r
AVX512F
64-bit
vcvtsd2usi instruction.
VCVTSD2USI r32, xmm1/m64{er}
EVEX.LIG.F2.0F.W0 79 /r
AVX512F
16/32/64-bit
vcvtsd2usi instruction.
VCVTSD2USI r64, xmm1/m64{er}
EVEX.LIG.F2.0F.W1 79 /r
AVX512F
64-bit
vcvtsh2sd instruction.
VCVTSH2SD xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5A /r
AVX512-FP16
16/32/64-bit
vcvtsh2sd instruction.
VCVTSH2SD xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5A /r
AVX512-FP16
16/32/64-bit
vcvtsh2si instruction.
VCVTSH2SI r32, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W0 2D /r
AVX512-FP16
16/32/64-bit
vcvtsh2si instruction.
VCVTSH2SI r64, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W1 2D /r
AVX512-FP16
64-bit
vcvtsh2si instruction.
VCVTSH2SI r32, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W0 2D /r
AVX512-FP16
16/32/64-bit
vcvtsh2si instruction.
VCVTSH2SI r64, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W1 2D /r
AVX512-FP16
64-bit
vcvtsh2ss instruction.
VCVTSH2SS xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.MAP6.W0 13 /r
AVX512-FP16
16/32/64-bit
vcvtsh2ss instruction.
VCVTSH2SS xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.MAP6.W0 13 /r
AVX512-FP16
16/32/64-bit
vcvtsh2usi instruction.
VCVTSH2USI r32, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
vcvtsh2usi instruction.
VCVTSH2USI r64, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W1 79 /r
AVX512-FP16
64-bit
vcvtsh2usi instruction.
VCVTSH2USI r32, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
vcvtsh2usi instruction.
VCVTSH2USI r64, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W1 79 /r
AVX512-FP16
64-bit
vcvtsi2sd instruction.
VCVTSI2SD xmm1, xmm2, r/m32
VEX.LIG.F2.0F.W0 2A /r
AVX
16/32/64-bit
VCVTSI2SD xmm1, xmm2, r/m32{er}
EVEX.LIG.F2.0F.W0 2A /r
AVX512F
16/32/64-bit
vcvtsi2sd instruction.
VCVTSI2SD xmm1, xmm2, r/m64
VEX.LIG.F2.0F.W1 2A /r
AVX
64-bit
VCVTSI2SD xmm1, xmm2, r/m64{er}
EVEX.LIG.F2.0F.W1 2A /r
AVX512F
64-bit
vcvtsi2sd instruction.
VCVTSI2SD xmm1, xmm2, r/m64
VEX.LIG.F2.0F.W1 2A /r
AVX
64-bit
VCVTSI2SD xmm1, xmm2, r/m64{er}
EVEX.LIG.F2.0F.W1 2A /r
AVX512F
64-bit
VCVTSI2SD xmm1, xmm2, r/m32
VEX.LIG.F2.0F.W0 2A /r
AVX
16/32/64-bit
VCVTSI2SD xmm1, xmm2, r/m32{er}
EVEX.LIG.F2.0F.W0 2A /r
AVX512F
16/32/64-bit
vcvtsi2sh instruction.
VCVTSI2SH xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.MAP5.W0 2A /r
AVX512-FP16
16/32/64-bit
vcvtsi2sh instruction.
VCVTSI2SH xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.MAP5.W1 2A /r
AVX512-FP16
64-bit
vcvtsi2sh instruction.
VCVTSI2SH xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.MAP5.W1 2A /r
AVX512-FP16
64-bit
VCVTSI2SH xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.MAP5.W0 2A /r
AVX512-FP16
16/32/64-bit
vcvtsi2ss instruction.
VCVTSI2SS xmm1, xmm2, r/m32
VEX.LIG.F3.0F.W0 2A /r
AVX
16/32/64-bit
VCVTSI2SS xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.0F.W0 2A /r
AVX512F
16/32/64-bit
vcvtsi2ss instruction.
VCVTSI2SS xmm1, xmm2, r/m64
VEX.LIG.F3.0F.W1 2A /r
AVX
64-bit
VCVTSI2SS xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.0F.W1 2A /r
AVX512F
64-bit
vcvtsi2ss instruction.
VCVTSI2SS xmm1, xmm2, r/m64
VEX.LIG.F3.0F.W1 2A /r
AVX
64-bit
VCVTSI2SS xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.0F.W1 2A /r
AVX512F
64-bit
VCVTSI2SS xmm1, xmm2, r/m32
VEX.LIG.F3.0F.W0 2A /r
AVX
16/32/64-bit
VCVTSI2SS xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.0F.W0 2A /r
AVX512F
16/32/64-bit
vcvtss2sd instruction.
VCVTSS2SD xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTSS2SD xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5A /r
AVX512F
16/32/64-bit
vcvtss2sd instruction.
VCVTSS2SD xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTSS2SD xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5A /r
AVX512F
16/32/64-bit
vcvtss2sh instruction.
VCVTSS2SH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.MAP5.W0 1D /r
AVX512-FP16
16/32/64-bit
vcvtss2sh instruction.
VCVTSS2SH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.MAP5.W0 1D /r
AVX512-FP16
16/32/64-bit
vcvtss2si instruction.
VCVTSS2SI r32, xmm1/m32
VEX.LIG.F3.0F.W0 2D /r
AVX
16/32/64-bit
VCVTSS2SI r32, xmm1/m32{er}
EVEX.LIG.F3.0F.W0 2D /r
AVX512F
16/32/64-bit
vcvtss2si instruction.
VCVTSS2SI r64, xmm1/m32
VEX.LIG.F3.0F.W1 2D /r
AVX
64-bit
VCVTSS2SI r64, xmm1/m32{er}
EVEX.LIG.F3.0F.W1 2D /r
AVX512F
64-bit
vcvtss2si instruction.
VCVTSS2SI r32, xmm1/m32
VEX.LIG.F3.0F.W0 2D /r
AVX
16/32/64-bit
VCVTSS2SI r32, xmm1/m32{er}
EVEX.LIG.F3.0F.W0 2D /r
AVX512F
16/32/64-bit
vcvtss2si instruction.
VCVTSS2SI r64, xmm1/m32
VEX.LIG.F3.0F.W1 2D /r
AVX
64-bit
VCVTSS2SI r64, xmm1/m32{er}
EVEX.LIG.F3.0F.W1 2D /r
AVX512F
64-bit
vcvtss2usi instruction.
VCVTSS2USI r32, xmm1/m32{er}
EVEX.LIG.F3.0F.W0 79 /r
AVX512F
16/32/64-bit
vcvtss2usi instruction.
VCVTSS2USI r64, xmm1/m32{er}
EVEX.LIG.F3.0F.W1 79 /r
AVX512F
64-bit
vcvtss2usi instruction.
VCVTSS2USI r32, xmm1/m32{er}
EVEX.LIG.F3.0F.W0 79 /r
AVX512F
16/32/64-bit
vcvtss2usi instruction.
VCVTSS2USI r64, xmm1/m32{er}
EVEX.LIG.F3.0F.W1 79 /r
AVX512F
64-bit
vcvttpd2dq instruction.
VCVTTPD2DQ xmm1, xmm2/m128
VEX.128.66.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2dq instruction.
VCVTTPD2DQ xmm1, ymm2/m256
VEX.256.66.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2dq instruction.
VCVTTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 E6 /r
AVX512F
16/32/64-bit
vcvttpd2dq instruction.
VCVTTPD2DQ xmm1, ymm2/m256
VEX.256.66.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPD2DQ xmm1, xmm2/m128
VEX.128.66.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2dq instruction.
VCVTTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 E6 /r
AVX512F
16/32/64-bit
vcvttpd2dqx instruction.
VCVTTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2dqy instruction.
VCVTTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2qq instruction.
VCVTTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2qq instruction.
VCVTTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2qq instruction.
VCVTTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 7A /r
AVX512DQ
16/32/64-bit
vcvttpd2qq instruction.
VCVTTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2qq instruction.
VCVTTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2qq instruction.
VCVTTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 7A /r
AVX512DQ
16/32/64-bit
vcvttpd2udq instruction.
VCVTTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2udq instruction.
VCVTTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2udq instruction.
VCVTTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.0F.W1 78 /r
AVX512F
16/32/64-bit
vcvttpd2udq instruction.
VCVTTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2udq instruction.
VCVTTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.0F.W1 78 /r
AVX512F
16/32/64-bit
vcvttpd2udqx instruction.
VCVTTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2udqy instruction.
VCVTTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttpd2uqq instruction.
VCVTTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2uqq instruction.
VCVTTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2uqq instruction.
VCVTTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 78 /r
AVX512DQ
16/32/64-bit
vcvttpd2uqq instruction.
VCVTTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2uqq instruction.
VCVTTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttpd2uqq instruction.
VCVTTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 78 /r
AVX512DQ
16/32/64-bit
vcvttph2dq instruction.
VCVTTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.F3.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2dq instruction.
VCVTTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.F3.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2dq instruction.
VCVTTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.F3.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
vcvttph2dq instruction.
VCVTTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.F3.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2dq instruction.
VCVTTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.F3.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2dq instruction.
VCVTTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.F3.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
vcvttph2qq instruction.
VCVTTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2qq instruction.
VCVTTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2qq instruction.
VCVTTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.66.MAP5.W0 7A /r
AVX512-FP16
16/32/64-bit
vcvttph2qq instruction.
VCVTTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2qq instruction.
VCVTTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2qq instruction.
VCVTTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.66.MAP5.W0 7A /r
AVX512-FP16
16/32/64-bit
vcvttph2udq instruction.
VCVTTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2udq instruction.
VCVTTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2udq instruction.
VCVTTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
vcvttph2udq instruction.
VCVTTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2udq instruction.
VCVTTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2udq instruction.
VCVTTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
vcvttph2uqq instruction.
VCVTTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uqq instruction.
VCVTTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uqq instruction.
VCVTTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.66.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
vcvttph2uqq instruction.
VCVTTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uqq instruction.
VCVTTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uqq instruction.
VCVTTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.66.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
vcvttph2uw instruction.
VCVTTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uw instruction.
VCVTTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uw instruction.
VCVTTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.MAP5.W0 7C /r
AVX512-FP16
16/32/64-bit
vcvttph2uw instruction.
VCVTTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uw instruction.
VCVTTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2uw instruction.
VCVTTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.MAP5.W0 7C /r
AVX512-FP16
16/32/64-bit
vcvttph2w instruction.
VCVTTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2w instruction.
VCVTTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2w instruction.
VCVTTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.66.MAP5.W0 7C /r
AVX512-FP16
16/32/64-bit
vcvttph2w instruction.
VCVTTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2w instruction.
VCVTTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvttph2w instruction.
VCVTTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.66.MAP5.W0 7C /r
AVX512-FP16
16/32/64-bit
vcvttps2dq instruction.
VCVTTPS2DQ xmm1, xmm2/m128
VEX.128.F3.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F3.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2dq instruction.
VCVTTPS2DQ ymm1, ymm2/m256
VEX.256.F3.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F3.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2dq instruction.
VCVTTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.F3.0F.W0 5B /r
AVX512F
16/32/64-bit
vcvttps2dq instruction.
VCVTTPS2DQ xmm1, xmm2/m128
VEX.128.F3.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F3.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2dq instruction.
VCVTTPS2DQ ymm1, ymm2/m256
VEX.256.F3.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F3.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2dq instruction.
VCVTTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.F3.0F.W0 5B /r
AVX512F
16/32/64-bit
vcvttps2qq instruction.
VCVTTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2qq instruction.
VCVTTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2qq instruction.
VCVTTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.66.0F.W0 7A /r
AVX512DQ
16/32/64-bit
vcvttps2qq instruction.
VCVTTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2qq instruction.
VCVTTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2qq instruction.
VCVTTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.66.0F.W0 7A /r
AVX512DQ
16/32/64-bit
vcvttps2udq instruction.
VCVTTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2udq instruction.
VCVTTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2udq instruction.
VCVTTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.0F.W0 78 /r
AVX512F
16/32/64-bit
vcvttps2udq instruction.
VCVTTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2udq instruction.
VCVTTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 78 /r
AVX512VL and AVX512F
16/32/64-bit
vcvttps2udq instruction.
VCVTTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.0F.W0 78 /r
AVX512F
16/32/64-bit
vcvttps2uqq instruction.
VCVTTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2uqq instruction.
VCVTTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2uqq instruction.
VCVTTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.66.0F.W0 78 /r
AVX512DQ
16/32/64-bit
vcvttps2uqq instruction.
VCVTTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2uqq instruction.
VCVTTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvttps2uqq instruction.
VCVTTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.66.0F.W0 78 /r
AVX512DQ
16/32/64-bit
vcvttsd2si instruction.
VCVTTSD2SI r32, xmm1/m64
VEX.LIG.F2.0F.W0 2C /r
AVX
16/32/64-bit
VCVTTSD2SI r32, xmm1/m64{sae}
EVEX.LIG.F2.0F.W0 2C /r
AVX512F
16/32/64-bit
vcvttsd2si instruction.
VCVTTSD2SI r64, xmm1/m64
VEX.LIG.F2.0F.W1 2C /r
AVX
64-bit
VCVTTSD2SI r64, xmm1/m64{sae}
EVEX.LIG.F2.0F.W1 2C /r
AVX512F
64-bit
vcvttsd2si instruction.
VCVTTSD2SI r32, xmm1/m64
VEX.LIG.F2.0F.W0 2C /r
AVX
16/32/64-bit
VCVTTSD2SI r32, xmm1/m64{sae}
EVEX.LIG.F2.0F.W0 2C /r
AVX512F
16/32/64-bit
vcvttsd2si instruction.
VCVTTSD2SI r64, xmm1/m64
VEX.LIG.F2.0F.W1 2C /r
AVX
64-bit
VCVTTSD2SI r64, xmm1/m64{sae}
EVEX.LIG.F2.0F.W1 2C /r
AVX512F
64-bit
vcvttsd2usi instruction.
VCVTTSD2USI r32, xmm1/m64{sae}
EVEX.LIG.F2.0F.W0 78 /r
AVX512F
16/32/64-bit
vcvttsd2usi instruction.
VCVTTSD2USI r64, xmm1/m64{sae}
EVEX.LIG.F2.0F.W1 78 /r
AVX512F
64-bit
vcvttsd2usi instruction.
VCVTTSD2USI r32, xmm1/m64{sae}
EVEX.LIG.F2.0F.W0 78 /r
AVX512F
16/32/64-bit
vcvttsd2usi instruction.
VCVTTSD2USI r64, xmm1/m64{sae}
EVEX.LIG.F2.0F.W1 78 /r
AVX512F
64-bit
vcvttsh2si instruction.
VCVTTSH2SI r32, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W0 2C /r
AVX512-FP16
16/32/64-bit
vcvttsh2si instruction.
VCVTTSH2SI r64, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W1 2C /r
AVX512-FP16
64-bit
vcvttsh2si instruction.
VCVTTSH2SI r32, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W0 2C /r
AVX512-FP16
16/32/64-bit
vcvttsh2si instruction.
VCVTTSH2SI r64, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W1 2C /r
AVX512-FP16
64-bit
vcvttsh2usi instruction.
VCVTTSH2USI r32, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
vcvttsh2usi instruction.
VCVTTSH2USI r64, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W1 78 /r
AVX512-FP16
64-bit
vcvttsh2usi instruction.
VCVTTSH2USI r32, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
vcvttsh2usi instruction.
VCVTTSH2USI r64, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W1 78 /r
AVX512-FP16
64-bit
vcvttss2si instruction.
VCVTTSS2SI r32, xmm1/m32
VEX.LIG.F3.0F.W0 2C /r
AVX
16/32/64-bit
VCVTTSS2SI r32, xmm1/m32{sae}
EVEX.LIG.F3.0F.W0 2C /r
AVX512F
16/32/64-bit
vcvttss2si instruction.
VCVTTSS2SI r64, xmm1/m32
VEX.LIG.F3.0F.W1 2C /r
AVX
64-bit
VCVTTSS2SI r64, xmm1/m32{sae}
EVEX.LIG.F3.0F.W1 2C /r
AVX512F
64-bit
vcvttss2si instruction.
VCVTTSS2SI r32, xmm1/m32
VEX.LIG.F3.0F.W0 2C /r
AVX
16/32/64-bit
VCVTTSS2SI r32, xmm1/m32{sae}
EVEX.LIG.F3.0F.W0 2C /r
AVX512F
16/32/64-bit
vcvttss2si instruction.
VCVTTSS2SI r64, xmm1/m32
VEX.LIG.F3.0F.W1 2C /r
AVX
64-bit
VCVTTSS2SI r64, xmm1/m32{sae}
EVEX.LIG.F3.0F.W1 2C /r
AVX512F
64-bit
vcvttss2usi instruction.
VCVTTSS2USI r32, xmm1/m32{sae}
EVEX.LIG.F3.0F.W0 78 /r
AVX512F
16/32/64-bit
vcvttss2usi instruction.
VCVTTSS2USI r64, xmm1/m32{sae}
EVEX.LIG.F3.0F.W1 78 /r
AVX512F
64-bit
vcvttss2usi instruction.
VCVTTSS2USI r32, xmm1/m32{sae}
EVEX.LIG.F3.0F.W0 78 /r
AVX512F
16/32/64-bit
vcvttss2usi instruction.
VCVTTSS2USI r64, xmm1/m32{sae}
EVEX.LIG.F3.0F.W1 78 /r
AVX512F
64-bit
vcvtudq2pd instruction.
VCVTUDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.F3.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2pd instruction.
VCVTUDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.F3.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2pd instruction.
VCVTUDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.F3.0F.W0 7A /r
AVX512F
16/32/64-bit
vcvtudq2pd instruction.
VCVTUDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.F3.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2pd instruction.
VCVTUDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.F3.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2pd instruction.
VCVTUDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.F3.0F.W0 7A /r
AVX512F
16/32/64-bit
vcvtudq2ph instruction.
VCVTUDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtudq2ph instruction.
VCVTUDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtudq2ph instruction.
VCVTUDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.F2.MAP5.W0 7A /r
AVX512-FP16
16/32/64-bit
vcvtudq2ph instruction.
VCVTUDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtudq2ph instruction.
VCVTUDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.F2.MAP5.W0 7A /r
AVX512-FP16
16/32/64-bit
vcvtudq2phx instruction.
VCVTUDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtudq2phy instruction.
VCVTUDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtudq2ps instruction.
VCVTUDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F2.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2ps instruction.
VCVTUDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F2.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2ps instruction.
VCVTUDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.F2.0F.W0 7A /r
AVX512F
16/32/64-bit
vcvtudq2ps instruction.
VCVTUDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F2.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2ps instruction.
VCVTUDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F2.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
vcvtudq2ps instruction.
VCVTUDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.F2.0F.W0 7A /r
AVX512F
16/32/64-bit
vcvtuqq2pd instruction.
VCVTUQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F3.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2pd instruction.
VCVTUQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F3.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2pd instruction.
VCVTUQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F3.0F.W1 7A /r
AVX512DQ
16/32/64-bit
vcvtuqq2pd instruction.
VCVTUQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F3.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2pd instruction.
VCVTUQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F3.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2pd instruction.
VCVTUQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F3.0F.W1 7A /r
AVX512DQ
16/32/64-bit
vcvtuqq2ph instruction.
VCVTUQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuqq2ph instruction.
VCVTUQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuqq2ph instruction.
VCVTUQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.MAP5.W1 7A /r
AVX512-FP16
16/32/64-bit
vcvtuqq2ph instruction.
VCVTUQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.MAP5.W1 7A /r
AVX512-FP16
16/32/64-bit
VCVTUQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuqq2phx instruction.
VCVTUQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuqq2phy instruction.
VCVTUQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuqq2phz instruction.
VCVTUQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.MAP5.W1 7A /r
AVX512-FP16
16/32/64-bit
vcvtuqq2ps instruction.
VCVTUQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2ps instruction.
VCVTUQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2ps instruction.
VCVTUQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.0F.W1 7A /r
AVX512DQ
16/32/64-bit
vcvtuqq2ps instruction.
VCVTUQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTUQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2ps instruction.
VCVTUQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.0F.W1 7A /r
AVX512DQ
16/32/64-bit
vcvtuqq2psx instruction.
VCVTUQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtuqq2psy instruction.
VCVTUQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
vcvtusi2sd instruction.
VCVTUSI2SD xmm1, xmm2, r/m32{er}
EVEX.LIG.F2.0F.W0 7B /r
AVX512F
16/32/64-bit
vcvtusi2sd instruction.
VCVTUSI2SD xmm1, xmm2, r/m64{er}
EVEX.LIG.F2.0F.W1 7B /r
AVX512F
64-bit
vcvtusi2sd instruction.
VCVTUSI2SD xmm1, xmm2, r/m64{er}
EVEX.LIG.F2.0F.W1 7B /r
AVX512F
64-bit
VCVTUSI2SD xmm1, xmm2, r/m32{er}
EVEX.LIG.F2.0F.W0 7B /r
AVX512F
16/32/64-bit
vcvtusi2sh instruction.
VCVTUSI2SH xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.MAP5.W0 7B /r
AVX512-FP16
16/32/64-bit
vcvtusi2sh instruction.
VCVTUSI2SH xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.MAP5.W1 7B /r
AVX512-FP16
64-bit
vcvtusi2sh instruction.
VCVTUSI2SH xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.MAP5.W1 7B /r
AVX512-FP16
64-bit
VCVTUSI2SH xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.MAP5.W0 7B /r
AVX512-FP16
16/32/64-bit
vcvtusi2ss instruction.
VCVTUSI2SS xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.0F.W0 7B /r
AVX512F
16/32/64-bit
vcvtusi2ss instruction.
VCVTUSI2SS xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.0F.W1 7B /r
AVX512F
64-bit
vcvtusi2ss instruction.
VCVTUSI2SS xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.0F.W1 7B /r
AVX512F
64-bit
VCVTUSI2SS xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.0F.W0 7B /r
AVX512F
16/32/64-bit
vcvtuw2ph instruction.
VCVTUW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.F2.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuw2ph instruction.
VCVTUW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.F2.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuw2ph instruction.
VCVTUW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.F2.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vcvtuw2ph instruction.
VCVTUW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.F2.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuw2ph instruction.
VCVTUW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.F2.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtuw2ph instruction.
VCVTUW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.F2.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vcvtw2ph instruction.
VCVTW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.F3.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtw2ph instruction.
VCVTW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.F3.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtw2ph instruction.
VCVTW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.F3.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vcvtw2ph instruction.
VCVTW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.F3.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtw2ph instruction.
VCVTW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.F3.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vcvtw2ph instruction.
VCVTW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.F3.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 42 /r ib
AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 42 /r ib
AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 42 /r ib
AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vdbpsadbw instruction.
VDBPSADBW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 42 /r ib
AVX512BW
16/32/64-bit
vdivpd instruction.
VDIVPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivpd instruction.
VDIVPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivpd instruction.
VDIVPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 5E /r
AVX512F
16/32/64-bit
vdivpd instruction.
VDIVPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivpd instruction.
VDIVPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivpd instruction.
VDIVPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 5E /r
AVX512F
16/32/64-bit
vdivph instruction.
VDIVPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vdivph instruction.
VDIVPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vdivph instruction.
VDIVPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 5E /r
AVX512-FP16
16/32/64-bit
vdivph instruction.
VDIVPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vdivph instruction.
VDIVPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vdivph instruction.
VDIVPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 5E /r
AVX512-FP16
16/32/64-bit
vdivps instruction.
VDIVPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivps instruction.
VDIVPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivps instruction.
VDIVPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 5E /r
AVX512F
16/32/64-bit
vdivps instruction.
VDIVPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivps instruction.
VDIVPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5E /r
AVX512VL and AVX512F
16/32/64-bit
vdivps instruction.
VDIVPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 5E /r
AVX512F
16/32/64-bit
vdivsd instruction.
VDIVSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5E /r
AVX512F
16/32/64-bit
vdivsd instruction.
VDIVSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5E /r
AVX512F
16/32/64-bit
vdivsh instruction.
VDIVSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 5E /r
AVX512-FP16
16/32/64-bit
vdivsh instruction.
VDIVSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 5E /r
AVX512-FP16
16/32/64-bit
vdivss instruction.
VDIVSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 5E /r
AVX512F
16/32/64-bit
vdivss instruction.
VDIVSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 5E /r
AVX512F
16/32/64-bit
vdpbf16ps instruction.
VDPBF16PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.0F38.W0 52 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vdpbf16ps instruction.
VDPBF16PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.0F38.W0 52 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vdpbf16ps instruction.
VDPBF16PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.F3.0F38.W0 52 /r
AVX512F and AVX512_BF16
16/32/64-bit
vdpbf16ps instruction.
VDPBF16PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.0F38.W0 52 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vdpbf16ps instruction.
VDPBF16PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.0F38.W0 52 /r
AVX512VL and AVX512_BF16
16/32/64-bit
vdpbf16ps instruction.
VDPBF16PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.F3.0F38.W0 52 /r
AVX512F and AVX512_BF16
16/32/64-bit
vdppd instruction.
VDPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 41 /r ib
AVX
16/32/64-bit
vdppd instruction.
VDPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 41 /r ib
AVX
16/32/64-bit
vdppd instruction.
VDPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 41 /r ib
AVX
16/32/64-bit
vdppd instruction.
VDPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 41 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
vdpps instruction.
VDPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
verr instruction.
VERR r/m16
o16 0F 00 /4
286+
16/32/64-bit
verr instruction.
VERR r32/m16
o32 0F 00 /4
386+
16/32/64-bit
verr instruction.
VERR r64/m16
o64 0F 00 /4
X64
64-bit
verr instruction.
VERR r32/m16
o32 0F 00 /4
386+
16/32/64-bit
VERR r/m16
o16 0F 00 /4
286+
16/32/64-bit
verw instruction.
VERW r/m16
o16 0F 00 /5
286+
16/32/64-bit
verw instruction.
VERW r32/m16
o32 0F 00 /5
386+
16/32/64-bit
verw instruction.
VERW r64/m16
o64 0F 00 /5
X64
64-bit
verw instruction.
VERW r32/m16
o32 0F 00 /5
386+
16/32/64-bit
VERW r/m16
o16 0F 00 /5
286+
16/32/64-bit
vexp2pd instruction.
VEXP2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 C8 /r
AVX512ER
16/32/64-bit
vexp2pd instruction.
VEXP2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 C8 /r
AVX512ER
16/32/64-bit
vexp2ps instruction.
VEXP2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 C8 /r
AVX512ER
16/32/64-bit
vexp2ps instruction.
VEXP2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 C8 /r
AVX512ER
16/32/64-bit
vexpandpd instruction.
VEXPANDPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandpd instruction.
VEXPANDPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandpd instruction.
VEXPANDPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 88 /r
AVX512F
16/32/64-bit
vexpandpd instruction.
VEXPANDPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandpd instruction.
VEXPANDPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandpd instruction.
VEXPANDPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 88 /r
AVX512F
16/32/64-bit
vexpandps instruction.
VEXPANDPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandps instruction.
VEXPANDPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandps instruction.
VEXPANDPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 88 /r
AVX512F
16/32/64-bit
vexpandps instruction.
VEXPANDPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandps instruction.
VEXPANDPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 88 /r
AVX512VL and AVX512F
16/32/64-bit
vexpandps instruction.
VEXPANDPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 88 /r
AVX512F
16/32/64-bit
vextractf128 instruction.
VEXTRACTF128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 19 /r ib
AVX
16/32/64-bit
vextractf128 instruction.
VEXTRACTF128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 19 /r ib
AVX
16/32/64-bit
vextractf128 instruction.
VEXTRACTF128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 19 /r ib
AVX
16/32/64-bit
vextractf128 instruction.
VEXTRACTF128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 19 /r ib
AVX
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 19 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 19 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 19 /r ib
AVX512F
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 19 /r ib
AVX512F
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 19 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 19 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 19 /r ib
AVX512F
16/32/64-bit
vextractf32x4 instruction.
VEXTRACTF32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 19 /r ib
AVX512F
16/32/64-bit
vextractf32x8 instruction.
VEXTRACTF32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 1B /r ib
AVX512DQ
16/32/64-bit
vextractf32x8 instruction.
VEXTRACTF32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 1B /r ib
AVX512DQ
16/32/64-bit
vextractf32x8 instruction.
VEXTRACTF32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 1B /r ib
AVX512DQ
16/32/64-bit
vextractf32x8 instruction.
VEXTRACTF32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 1B /r ib
AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 19 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 19 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 19 /r ib
AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 19 /r ib
AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 19 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 19 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 19 /r ib
AVX512DQ
16/32/64-bit
vextractf64x2 instruction.
VEXTRACTF64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 19 /r ib
AVX512DQ
16/32/64-bit
vextractf64x4 instruction.
VEXTRACTF64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 1B /r ib
AVX512F
16/32/64-bit
vextractf64x4 instruction.
VEXTRACTF64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 1B /r ib
AVX512F
16/32/64-bit
vextractf64x4 instruction.
VEXTRACTF64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 1B /r ib
AVX512F
16/32/64-bit
vextractf64x4 instruction.
VEXTRACTF64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 1B /r ib
AVX512F
16/32/64-bit
vextracti128 instruction.
VEXTRACTI128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 39 /r ib
AVX2
16/32/64-bit
vextracti128 instruction.
VEXTRACTI128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 39 /r ib
AVX2
16/32/64-bit
vextracti128 instruction.
VEXTRACTI128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 39 /r ib
AVX2
16/32/64-bit
vextracti128 instruction.
VEXTRACTI128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 39 /r ib
AVX2
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 39 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 39 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 39 /r ib
AVX512F
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 39 /r ib
AVX512F
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 39 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 39 /r ib
AVX512VL and AVX512F
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 39 /r ib
AVX512F
16/32/64-bit
vextracti32x4 instruction.
VEXTRACTI32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 39 /r ib
AVX512F
16/32/64-bit
vextracti32x8 instruction.
VEXTRACTI32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 3B /r ib
AVX512DQ
16/32/64-bit
vextracti32x8 instruction.
VEXTRACTI32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 3B /r ib
AVX512DQ
16/32/64-bit
vextracti32x8 instruction.
VEXTRACTI32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 3B /r ib
AVX512DQ
16/32/64-bit
vextracti32x8 instruction.
VEXTRACTI32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 3B /r ib
AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 39 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 39 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 39 /r ib
AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 39 /r ib
AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 39 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 39 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 39 /r ib
AVX512DQ
16/32/64-bit
vextracti64x2 instruction.
VEXTRACTI64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 39 /r ib
AVX512DQ
16/32/64-bit
vextracti64x4 instruction.
VEXTRACTI64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 3B /r ib
AVX512F
16/32/64-bit
vextracti64x4 instruction.
VEXTRACTI64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 3B /r ib
AVX512F
16/32/64-bit
vextracti64x4 instruction.
VEXTRACTI64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 3B /r ib
AVX512F
16/32/64-bit
vextracti64x4 instruction.
VEXTRACTI64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 3B /r ib
AVX512F
16/32/64-bit
vextractps instruction.
VEXTRACTPS r/m32, xmm1, imm8
VEX.128.66.0F3A.W0 17 /r ib
AVX
16/32/64-bit
VEXTRACTPS r/m32, xmm1, imm8
EVEX.128.66.0F3A.W0 17 /r ib
AVX512F
16/32/64-bit
vextractps instruction.
VEXTRACTPS r64/m32, xmm1, imm8
VEX.128.66.0F3A.W1 17 /r ib
AVX
64-bit
VEXTRACTPS r64/m32, xmm1, imm8
EVEX.128.66.0F3A.W1 17 /r ib
AVX512F
64-bit
vextractps instruction.
VEXTRACTPS r/m32, xmm1, imm8
VEX.128.66.0F3A.W0 17 /r ib
AVX
16/32/64-bit
VEXTRACTPS r/m32, xmm1, imm8
EVEX.128.66.0F3A.W0 17 /r ib
AVX512F
16/32/64-bit
vextractps instruction.
VEXTRACTPS r/m32, xmm1, imm8
VEX.128.66.0F3A.W0 17 /r ib
AVX
16/32/64-bit
VEXTRACTPS r/m32, xmm1, imm8
EVEX.128.66.0F3A.W0 17 /r ib
AVX512F
16/32/64-bit
vextractps instruction.
VEXTRACTPS r64/m32, xmm1, imm8
VEX.128.66.0F3A.W1 17 /r ib
AVX
64-bit
VEXTRACTPS r64/m32, xmm1, imm8
EVEX.128.66.0F3A.W1 17 /r ib
AVX512F
64-bit
vextractps instruction.
VEXTRACTPS r/m32, xmm1, imm8
VEX.128.66.0F3A.W0 17 /r ib
AVX
16/32/64-bit
VEXTRACTPS r/m32, xmm1, imm8
EVEX.128.66.0F3A.W0 17 /r ib
AVX512F
16/32/64-bit
vfcmaddcph instruction.
VFCMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmaddcph instruction.
VFCMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmaddcph instruction.
VFCMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F2.MAP6.W0 56 /r
AVX512-FP16
16/32/64-bit
vfcmaddcph instruction.
VFCMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmaddcph instruction.
VFCMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmaddcph instruction.
VFCMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F2.MAP6.W0 56 /r
AVX512-FP16
16/32/64-bit
vfcmaddcsh instruction.
VFCMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F2.MAP6.W0 57 /r
AVX512-FP16
16/32/64-bit
vfcmaddcsh instruction.
VFCMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F2.MAP6.W0 57 /r
AVX512-FP16
16/32/64-bit
vfcmulcph instruction.
VFCMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmulcph instruction.
VFCMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmulcph instruction.
VFCMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F2.MAP6.W0 D6 /r
AVX512-FP16
16/32/64-bit
vfcmulcph instruction.
VFCMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmulcph instruction.
VFCMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfcmulcph instruction.
VFCMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F2.MAP6.W0 D6 /r
AVX512-FP16
16/32/64-bit
vfcmulcsh instruction.
VFCMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F2.MAP6.W0 D7 /r
AVX512-FP16
16/32/64-bit
vfcmulcsh instruction.
VFCMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F2.MAP6.W0 D7 /r
AVX512-FP16
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 54 /r ib
AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 54 /r ib
AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 54 /r ib
AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmpd instruction.
VFIXUPIMMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 54 /r ib
AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 54 /r ib
AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 54 /r ib
AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 54 /r ib
AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
vfixupimmps instruction.
VFIXUPIMMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 54 /r ib
AVX512F
16/32/64-bit
vfixupimmsd instruction.
VFIXUPIMMSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 55 /r ib
AVX512F
16/32/64-bit
vfixupimmsd instruction.
VFIXUPIMMSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 55 /r ib
AVX512F
16/32/64-bit
vfixupimmsd instruction.
VFIXUPIMMSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 55 /r ib
AVX512F
16/32/64-bit
vfixupimmsd instruction.
VFIXUPIMMSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 55 /r ib
AVX512F
16/32/64-bit
vfixupimmss instruction.
VFIXUPIMMSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 55 /r ib
AVX512F
16/32/64-bit
vfixupimmss instruction.
VFIXUPIMMSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 55 /r ib
AVX512F
16/32/64-bit
vfixupimmss instruction.
VFIXUPIMMSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 55 /r ib
AVX512F
16/32/64-bit
vfixupimmss instruction.
VFIXUPIMMSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 55 /r ib
AVX512F
16/32/64-bit
vfmadd132pd instruction.
VFMADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 98 /r
FMA
16/32/64-bit
VFMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132pd instruction.
VFMADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 98 /r
FMA
16/32/64-bit
VFMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132pd instruction.
VFMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 98 /r
AVX512F
16/32/64-bit
vfmadd132pd instruction.
VFMADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 98 /r
FMA
16/32/64-bit
VFMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132pd instruction.
VFMADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 98 /r
FMA
16/32/64-bit
VFMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132pd instruction.
VFMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 98 /r
AVX512F
16/32/64-bit
vfmadd132ph instruction.
VFMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 98 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd132ph instruction.
VFMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 98 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd132ph instruction.
VFMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 98 /r
AVX512-FP16
16/32/64-bit
vfmadd132ph instruction.
VFMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 98 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd132ph instruction.
VFMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 98 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd132ph instruction.
VFMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 98 /r
AVX512-FP16
16/32/64-bit
vfmadd132ps instruction.
VFMADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 98 /r
FMA
16/32/64-bit
VFMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132ps instruction.
VFMADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 98 /r
FMA
16/32/64-bit
VFMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132ps instruction.
VFMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 98 /r
AVX512F
16/32/64-bit
vfmadd132ps instruction.
VFMADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 98 /r
FMA
16/32/64-bit
VFMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132ps instruction.
VFMADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 98 /r
FMA
16/32/64-bit
VFMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 98 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd132ps instruction.
VFMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 98 /r
AVX512F
16/32/64-bit
vfmadd132sd instruction.
VFMADD132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 99 /r
FMA
16/32/64-bit
VFMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 99 /r
AVX512F
16/32/64-bit
vfmadd132sd instruction.
VFMADD132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 99 /r
FMA
16/32/64-bit
VFMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 99 /r
AVX512F
16/32/64-bit
vfmadd132sh instruction.
VFMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 99 /r
AVX512-FP16
16/32/64-bit
vfmadd132sh instruction.
VFMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 99 /r
AVX512-FP16
16/32/64-bit
vfmadd132ss instruction.
VFMADD132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 99 /r
FMA
16/32/64-bit
VFMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 99 /r
AVX512F
16/32/64-bit
vfmadd132ss instruction.
VFMADD132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 99 /r
FMA
16/32/64-bit
VFMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 99 /r
AVX512F
16/32/64-bit
vfmadd213pd instruction.
VFMADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A8 /r
FMA
16/32/64-bit
VFMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213pd instruction.
VFMADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A8 /r
FMA
16/32/64-bit
VFMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213pd instruction.
VFMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A8 /r
AVX512F
16/32/64-bit
vfmadd213pd instruction.
VFMADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A8 /r
FMA
16/32/64-bit
VFMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213pd instruction.
VFMADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A8 /r
FMA
16/32/64-bit
VFMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213pd instruction.
VFMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A8 /r
AVX512F
16/32/64-bit
vfmadd213ph instruction.
VFMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd213ph instruction.
VFMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd213ph instruction.
VFMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A8 /r
AVX512-FP16
16/32/64-bit
vfmadd213ph instruction.
VFMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd213ph instruction.
VFMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd213ph instruction.
VFMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A8 /r
AVX512-FP16
16/32/64-bit
vfmadd213ps instruction.
VFMADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A8 /r
FMA
16/32/64-bit
VFMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213ps instruction.
VFMADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A8 /r
FMA
16/32/64-bit
VFMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213ps instruction.
VFMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A8 /r
AVX512F
16/32/64-bit
vfmadd213ps instruction.
VFMADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A8 /r
FMA
16/32/64-bit
VFMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213ps instruction.
VFMADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A8 /r
FMA
16/32/64-bit
VFMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd213ps instruction.
VFMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A8 /r
AVX512F
16/32/64-bit
vfmadd213sd instruction.
VFMADD213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 A9 /r
FMA
16/32/64-bit
VFMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 A9 /r
AVX512F
16/32/64-bit
vfmadd213sd instruction.
VFMADD213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 A9 /r
FMA
16/32/64-bit
VFMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 A9 /r
AVX512F
16/32/64-bit
vfmadd213sh instruction.
VFMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 A9 /r
AVX512-FP16
16/32/64-bit
vfmadd213sh instruction.
VFMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 A9 /r
AVX512-FP16
16/32/64-bit
vfmadd213ss instruction.
VFMADD213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 A9 /r
FMA
16/32/64-bit
VFMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 A9 /r
AVX512F
16/32/64-bit
vfmadd213ss instruction.
VFMADD213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 A9 /r
FMA
16/32/64-bit
VFMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 A9 /r
AVX512F
16/32/64-bit
vfmadd231pd instruction.
VFMADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B8 /r
FMA
16/32/64-bit
VFMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231pd instruction.
VFMADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B8 /r
FMA
16/32/64-bit
VFMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231pd instruction.
VFMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B8 /r
AVX512F
16/32/64-bit
vfmadd231pd instruction.
VFMADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B8 /r
FMA
16/32/64-bit
VFMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231pd instruction.
VFMADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B8 /r
FMA
16/32/64-bit
VFMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231pd instruction.
VFMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B8 /r
AVX512F
16/32/64-bit
vfmadd231ph instruction.
VFMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd231ph instruction.
VFMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd231ph instruction.
VFMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B8 /r
AVX512-FP16
16/32/64-bit
vfmadd231ph instruction.
VFMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd231ph instruction.
VFMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmadd231ph instruction.
VFMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B8 /r
AVX512-FP16
16/32/64-bit
vfmadd231ps instruction.
VFMADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B8 /r
FMA
16/32/64-bit
VFMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231ps instruction.
VFMADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B8 /r
FMA
16/32/64-bit
VFMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231ps instruction.
VFMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B8 /r
AVX512F
16/32/64-bit
vfmadd231ps instruction.
VFMADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B8 /r
FMA
16/32/64-bit
VFMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231ps instruction.
VFMADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B8 /r
FMA
16/32/64-bit
VFMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B8 /r
AVX512VL and AVX512F
16/32/64-bit
vfmadd231ps instruction.
VFMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B8 /r
AVX512F
16/32/64-bit
vfmadd231sd instruction.
VFMADD231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 B9 /r
FMA
16/32/64-bit
VFMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 B9 /r
AVX512F
16/32/64-bit
vfmadd231sd instruction.
VFMADD231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 B9 /r
FMA
16/32/64-bit
VFMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 B9 /r
AVX512F
16/32/64-bit
vfmadd231sh instruction.
VFMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 B9 /r
AVX512-FP16
16/32/64-bit
vfmadd231sh instruction.
VFMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 B9 /r
AVX512-FP16
16/32/64-bit
vfmadd231ss instruction.
VFMADD231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 B9 /r
FMA
16/32/64-bit
VFMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 B9 /r
AVX512F
16/32/64-bit
vfmadd231ss instruction.
VFMADD231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 B9 /r
FMA
16/32/64-bit
VFMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 B9 /r
AVX512F
16/32/64-bit
vfmaddcph instruction.
VFMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddcph instruction.
VFMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddcph instruction.
VFMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F3.MAP6.W0 56 /r
AVX512-FP16
16/32/64-bit
vfmaddcph instruction.
VFMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddcph instruction.
VFMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddcph instruction.
VFMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F3.MAP6.W0 56 /r
AVX512-FP16
16/32/64-bit
vfmaddcsh instruction.
VFMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.MAP6.W0 57 /r
AVX512-FP16
16/32/64-bit
vfmaddcsh instruction.
VFMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.MAP6.W0 57 /r
AVX512-FP16
16/32/64-bit
vfmaddpd instruction.
VFMADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 69 /r /is4
FMA4
16/32/64-bit
vfmaddpd instruction.
VFMADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 69 /r /is4
FMA4
16/32/64-bit
vfmaddpd instruction.
VFMADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 69 /r /is4
FMA4
16/32/64-bit
vfmaddpd instruction.
VFMADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 69 /r /is4
FMA4
16/32/64-bit
vfmaddpd instruction.
VFMADDPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 69 /r /is4
FMA4
16/32/64-bit
vfmaddpd instruction.
VFMADDPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 69 /r /is4
FMA4
16/32/64-bit
vfmaddps instruction.
VFMADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 68 /r /is4
FMA4
16/32/64-bit
vfmaddps instruction.
VFMADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 68 /r /is4
FMA4
16/32/64-bit
vfmaddps instruction.
VFMADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 68 /r /is4
FMA4
16/32/64-bit
vfmaddps instruction.
VFMADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 68 /r /is4
FMA4
16/32/64-bit
vfmaddps instruction.
VFMADDPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 68 /r /is4
FMA4
16/32/64-bit
vfmaddps instruction.
VFMADDPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 68 /r /is4
FMA4
16/32/64-bit
vfmaddsd instruction.
VFMADDSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 6B /r /is4
FMA4
16/32/64-bit
vfmaddsd instruction.
VFMADDSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 6B /r /is4
FMA4
16/32/64-bit
vfmaddsd instruction.
VFMADDSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 6B /r /is4
FMA4
16/32/64-bit
vfmaddss instruction.
VFMADDSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 6A /r /is4
FMA4
16/32/64-bit
vfmaddss instruction.
VFMADDSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 6A /r /is4
FMA4
16/32/64-bit
vfmaddss instruction.
VFMADDSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 6A /r /is4
FMA4
16/32/64-bit
vfmaddsub132pd instruction.
VFMADDSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 96 /r
FMA
16/32/64-bit
VFMADDSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132pd instruction.
VFMADDSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 96 /r
FMA
16/32/64-bit
VFMADDSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132pd instruction.
VFMADDSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 96 /r
AVX512F
16/32/64-bit
vfmaddsub132pd instruction.
VFMADDSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 96 /r
FMA
16/32/64-bit
VFMADDSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132pd instruction.
VFMADDSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 96 /r
FMA
16/32/64-bit
VFMADDSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132pd instruction.
VFMADDSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 96 /r
AVX512F
16/32/64-bit
vfmaddsub132ph instruction.
VFMADDSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 96 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub132ph instruction.
VFMADDSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 96 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub132ph instruction.
VFMADDSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 96 /r
AVX512-FP16
16/32/64-bit
vfmaddsub132ph instruction.
VFMADDSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 96 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub132ph instruction.
VFMADDSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 96 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub132ph instruction.
VFMADDSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 96 /r
AVX512-FP16
16/32/64-bit
vfmaddsub132ps instruction.
VFMADDSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 96 /r
FMA
16/32/64-bit
VFMADDSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132ps instruction.
VFMADDSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 96 /r
FMA
16/32/64-bit
VFMADDSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132ps instruction.
VFMADDSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 96 /r
AVX512F
16/32/64-bit
vfmaddsub132ps instruction.
VFMADDSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 96 /r
FMA
16/32/64-bit
VFMADDSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132ps instruction.
VFMADDSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 96 /r
FMA
16/32/64-bit
VFMADDSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 96 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub132ps instruction.
VFMADDSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 96 /r
AVX512F
16/32/64-bit
vfmaddsub213pd instruction.
VFMADDSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213pd instruction.
VFMADDSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213pd instruction.
VFMADDSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A6 /r
AVX512F
16/32/64-bit
vfmaddsub213pd instruction.
VFMADDSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213pd instruction.
VFMADDSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213pd instruction.
VFMADDSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A6 /r
AVX512F
16/32/64-bit
vfmaddsub213ph instruction.
VFMADDSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub213ph instruction.
VFMADDSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub213ph instruction.
VFMADDSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A6 /r
AVX512-FP16
16/32/64-bit
vfmaddsub213ph instruction.
VFMADDSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub213ph instruction.
VFMADDSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub213ph instruction.
VFMADDSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A6 /r
AVX512-FP16
16/32/64-bit
vfmaddsub213ps instruction.
VFMADDSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213ps instruction.
VFMADDSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213ps instruction.
VFMADDSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A6 /r
AVX512F
16/32/64-bit
vfmaddsub213ps instruction.
VFMADDSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213ps instruction.
VFMADDSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub213ps instruction.
VFMADDSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A6 /r
AVX512F
16/32/64-bit
vfmaddsub231pd instruction.
VFMADDSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231pd instruction.
VFMADDSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231pd instruction.
VFMADDSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B6 /r
AVX512F
16/32/64-bit
vfmaddsub231pd instruction.
VFMADDSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231pd instruction.
VFMADDSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231pd instruction.
VFMADDSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B6 /r
AVX512F
16/32/64-bit
vfmaddsub231ph instruction.
VFMADDSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub231ph instruction.
VFMADDSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub231ph instruction.
VFMADDSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B6 /r
AVX512-FP16
16/32/64-bit
vfmaddsub231ph instruction.
VFMADDSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub231ph instruction.
VFMADDSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmaddsub231ph instruction.
VFMADDSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B6 /r
AVX512-FP16
16/32/64-bit
vfmaddsub231ps instruction.
VFMADDSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231ps instruction.
VFMADDSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231ps instruction.
VFMADDSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B6 /r
AVX512F
16/32/64-bit
vfmaddsub231ps instruction.
VFMADDSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231ps instruction.
VFMADDSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B6 /r
AVX512VL and AVX512F
16/32/64-bit
vfmaddsub231ps instruction.
VFMADDSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B6 /r
AVX512F
16/32/64-bit
vfmaddsubpd instruction.
VFMADDSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5D /r /is4
FMA4
16/32/64-bit
vfmaddsubpd instruction.
VFMADDSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5D /r /is4
FMA4
16/32/64-bit
vfmaddsubpd instruction.
VFMADDSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5D /r /is4
FMA4
16/32/64-bit
vfmaddsubpd instruction.
VFMADDSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5D /r /is4
FMA4
16/32/64-bit
vfmaddsubpd instruction.
VFMADDSUBPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5D /r /is4
FMA4
16/32/64-bit
vfmaddsubpd instruction.
VFMADDSUBPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5D /r /is4
FMA4
16/32/64-bit
vfmaddsubps instruction.
VFMADDSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5C /r /is4
FMA4
16/32/64-bit
vfmaddsubps instruction.
VFMADDSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5C /r /is4
FMA4
16/32/64-bit
vfmaddsubps instruction.
VFMADDSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5C /r /is4
FMA4
16/32/64-bit
vfmaddsubps instruction.
VFMADDSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5C /r /is4
FMA4
16/32/64-bit
vfmaddsubps instruction.
VFMADDSUBPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5C /r /is4
FMA4
16/32/64-bit
vfmaddsubps instruction.
VFMADDSUBPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5C /r /is4
FMA4
16/32/64-bit
vfmsub132pd instruction.
VFMSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9A /r
FMA
16/32/64-bit
VFMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132pd instruction.
VFMSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9A /r
FMA
16/32/64-bit
VFMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132pd instruction.
VFMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9A /r
AVX512F
16/32/64-bit
vfmsub132pd instruction.
VFMSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9A /r
FMA
16/32/64-bit
VFMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132pd instruction.
VFMSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9A /r
FMA
16/32/64-bit
VFMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132pd instruction.
VFMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9A /r
AVX512F
16/32/64-bit
vfmsub132ph instruction.
VFMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub132ph instruction.
VFMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub132ph instruction.
VFMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9A /r
AVX512-FP16
16/32/64-bit
vfmsub132ph instruction.
VFMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub132ph instruction.
VFMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9A /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub132ph instruction.
VFMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9A /r
AVX512-FP16
16/32/64-bit
vfmsub132ps instruction.
VFMSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9A /r
FMA
16/32/64-bit
VFMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132ps instruction.
VFMSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9A /r
FMA
16/32/64-bit
VFMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132ps instruction.
VFMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9A /r
AVX512F
16/32/64-bit
vfmsub132ps instruction.
VFMSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9A /r
FMA
16/32/64-bit
VFMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132ps instruction.
VFMSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9A /r
FMA
16/32/64-bit
VFMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9A /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub132ps instruction.
VFMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9A /r
AVX512F
16/32/64-bit
vfmsub132sd instruction.
VFMSUB132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9B /r
FMA
16/32/64-bit
VFMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9B /r
AVX512F
16/32/64-bit
vfmsub132sd instruction.
VFMSUB132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9B /r
FMA
16/32/64-bit
VFMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9B /r
AVX512F
16/32/64-bit
vfmsub132sh instruction.
VFMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9B /r
AVX512-FP16
16/32/64-bit
vfmsub132sh instruction.
VFMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9B /r
AVX512-FP16
16/32/64-bit
vfmsub132ss instruction.
VFMSUB132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9B /r
FMA
16/32/64-bit
VFMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9B /r
AVX512F
16/32/64-bit
vfmsub132ss instruction.
VFMSUB132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9B /r
FMA
16/32/64-bit
VFMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9B /r
AVX512F
16/32/64-bit
vfmsub213pd instruction.
VFMSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AA /r
FMA
16/32/64-bit
VFMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213pd instruction.
VFMSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AA /r
FMA
16/32/64-bit
VFMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213pd instruction.
VFMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AA /r
AVX512F
16/32/64-bit
vfmsub213pd instruction.
VFMSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AA /r
FMA
16/32/64-bit
VFMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213pd instruction.
VFMSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AA /r
FMA
16/32/64-bit
VFMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213pd instruction.
VFMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AA /r
AVX512F
16/32/64-bit
vfmsub213ph instruction.
VFMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub213ph instruction.
VFMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub213ph instruction.
VFMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AA /r
AVX512-FP16
16/32/64-bit
vfmsub213ph instruction.
VFMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub213ph instruction.
VFMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub213ph instruction.
VFMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AA /r
AVX512-FP16
16/32/64-bit
vfmsub213ps instruction.
VFMSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AA /r
FMA
16/32/64-bit
VFMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213ps instruction.
VFMSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AA /r
FMA
16/32/64-bit
VFMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213ps instruction.
VFMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AA /r
AVX512F
16/32/64-bit
vfmsub213ps instruction.
VFMSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AA /r
FMA
16/32/64-bit
VFMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213ps instruction.
VFMSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AA /r
FMA
16/32/64-bit
VFMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub213ps instruction.
VFMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AA /r
AVX512F
16/32/64-bit
vfmsub213sd instruction.
VFMSUB213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AB /r
FMA
16/32/64-bit
VFMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AB /r
AVX512F
16/32/64-bit
vfmsub213sd instruction.
VFMSUB213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AB /r
FMA
16/32/64-bit
VFMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AB /r
AVX512F
16/32/64-bit
vfmsub213sh instruction.
VFMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AB /r
AVX512-FP16
16/32/64-bit
vfmsub213sh instruction.
VFMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AB /r
AVX512-FP16
16/32/64-bit
vfmsub213ss instruction.
VFMSUB213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AB /r
FMA
16/32/64-bit
VFMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AB /r
AVX512F
16/32/64-bit
vfmsub213ss instruction.
VFMSUB213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AB /r
FMA
16/32/64-bit
VFMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AB /r
AVX512F
16/32/64-bit
vfmsub231pd instruction.
VFMSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BA /r
FMA
16/32/64-bit
VFMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231pd instruction.
VFMSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BA /r
FMA
16/32/64-bit
VFMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231pd instruction.
VFMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BA /r
AVX512F
16/32/64-bit
vfmsub231pd instruction.
VFMSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BA /r
FMA
16/32/64-bit
VFMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231pd instruction.
VFMSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BA /r
FMA
16/32/64-bit
VFMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231pd instruction.
VFMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BA /r
AVX512F
16/32/64-bit
vfmsub231ph instruction.
VFMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub231ph instruction.
VFMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub231ph instruction.
VFMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BA /r
AVX512-FP16
16/32/64-bit
vfmsub231ph instruction.
VFMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub231ph instruction.
VFMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BA /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsub231ph instruction.
VFMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BA /r
AVX512-FP16
16/32/64-bit
vfmsub231ps instruction.
VFMSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BA /r
FMA
16/32/64-bit
VFMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231ps instruction.
VFMSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BA /r
FMA
16/32/64-bit
VFMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231ps instruction.
VFMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BA /r
AVX512F
16/32/64-bit
vfmsub231ps instruction.
VFMSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BA /r
FMA
16/32/64-bit
VFMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231ps instruction.
VFMSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BA /r
FMA
16/32/64-bit
VFMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BA /r
AVX512VL and AVX512F
16/32/64-bit
vfmsub231ps instruction.
VFMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BA /r
AVX512F
16/32/64-bit
vfmsub231sd instruction.
VFMSUB231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BB /r
FMA
16/32/64-bit
VFMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BB /r
AVX512F
16/32/64-bit
vfmsub231sd instruction.
VFMSUB231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BB /r
FMA
16/32/64-bit
VFMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BB /r
AVX512F
16/32/64-bit
vfmsub231sh instruction.
VFMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BB /r
AVX512-FP16
16/32/64-bit
vfmsub231sh instruction.
VFMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BB /r
AVX512-FP16
16/32/64-bit
vfmsub231ss instruction.
VFMSUB231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BB /r
FMA
16/32/64-bit
VFMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BB /r
AVX512F
16/32/64-bit
vfmsub231ss instruction.
VFMSUB231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BB /r
FMA
16/32/64-bit
VFMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BB /r
AVX512F
16/32/64-bit
vfmsubadd132pd instruction.
VFMSUBADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 97 /r
FMA
16/32/64-bit
VFMSUBADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132pd instruction.
VFMSUBADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 97 /r
FMA
16/32/64-bit
VFMSUBADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132pd instruction.
VFMSUBADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 97 /r
AVX512F
16/32/64-bit
vfmsubadd132pd instruction.
VFMSUBADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 97 /r
FMA
16/32/64-bit
VFMSUBADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132pd instruction.
VFMSUBADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 97 /r
FMA
16/32/64-bit
VFMSUBADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132pd instruction.
VFMSUBADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 97 /r
AVX512F
16/32/64-bit
vfmsubadd132ph instruction.
VFMSUBADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 97 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd132ph instruction.
VFMSUBADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 97 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd132ph instruction.
VFMSUBADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 97 /r
AVX512-FP16
16/32/64-bit
vfmsubadd132ph instruction.
VFMSUBADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 97 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd132ph instruction.
VFMSUBADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 97 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd132ph instruction.
VFMSUBADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 97 /r
AVX512-FP16
16/32/64-bit
vfmsubadd132ps instruction.
VFMSUBADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 97 /r
FMA
16/32/64-bit
VFMSUBADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132ps instruction.
VFMSUBADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 97 /r
FMA
16/32/64-bit
VFMSUBADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132ps instruction.
VFMSUBADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 97 /r
AVX512F
16/32/64-bit
vfmsubadd132ps instruction.
VFMSUBADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 97 /r
FMA
16/32/64-bit
VFMSUBADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132ps instruction.
VFMSUBADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 97 /r
FMA
16/32/64-bit
VFMSUBADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 97 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd132ps instruction.
VFMSUBADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 97 /r
AVX512F
16/32/64-bit
vfmsubadd213pd instruction.
VFMSUBADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213pd instruction.
VFMSUBADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213pd instruction.
VFMSUBADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A7 /r
AVX512F
16/32/64-bit
vfmsubadd213pd instruction.
VFMSUBADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213pd instruction.
VFMSUBADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213pd instruction.
VFMSUBADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A7 /r
AVX512F
16/32/64-bit
vfmsubadd213ph instruction.
VFMSUBADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd213ph instruction.
VFMSUBADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd213ph instruction.
VFMSUBADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A7 /r
AVX512-FP16
16/32/64-bit
vfmsubadd213ph instruction.
VFMSUBADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd213ph instruction.
VFMSUBADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd213ph instruction.
VFMSUBADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A7 /r
AVX512-FP16
16/32/64-bit
vfmsubadd213ps instruction.
VFMSUBADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213ps instruction.
VFMSUBADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213ps instruction.
VFMSUBADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A7 /r
AVX512F
16/32/64-bit
vfmsubadd213ps instruction.
VFMSUBADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213ps instruction.
VFMSUBADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd213ps instruction.
VFMSUBADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A7 /r
AVX512F
16/32/64-bit
vfmsubadd231pd instruction.
VFMSUBADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231pd instruction.
VFMSUBADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231pd instruction.
VFMSUBADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B7 /r
AVX512F
16/32/64-bit
vfmsubadd231pd instruction.
VFMSUBADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231pd instruction.
VFMSUBADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231pd instruction.
VFMSUBADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B7 /r
AVX512F
16/32/64-bit
vfmsubadd231ph instruction.
VFMSUBADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd231ph instruction.
VFMSUBADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd231ph instruction.
VFMSUBADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B7 /r
AVX512-FP16
16/32/64-bit
vfmsubadd231ph instruction.
VFMSUBADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd231ph instruction.
VFMSUBADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmsubadd231ph instruction.
VFMSUBADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B7 /r
AVX512-FP16
16/32/64-bit
vfmsubadd231ps instruction.
VFMSUBADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231ps instruction.
VFMSUBADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231ps instruction.
VFMSUBADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B7 /r
AVX512F
16/32/64-bit
vfmsubadd231ps instruction.
VFMSUBADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231ps instruction.
VFMSUBADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B7 /r
AVX512VL and AVX512F
16/32/64-bit
vfmsubadd231ps instruction.
VFMSUBADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B7 /r
AVX512F
16/32/64-bit
vfmsubaddpd instruction.
VFMSUBADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5F /r /is4
FMA4
16/32/64-bit
vfmsubaddpd instruction.
VFMSUBADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5F /r /is4
FMA4
16/32/64-bit
vfmsubaddpd instruction.
VFMSUBADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5F /r /is4
FMA4
16/32/64-bit
vfmsubaddpd instruction.
VFMSUBADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5F /r /is4
FMA4
16/32/64-bit
vfmsubaddpd instruction.
VFMSUBADDPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5F /r /is4
FMA4
16/32/64-bit
vfmsubaddpd instruction.
VFMSUBADDPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5F /r /is4
FMA4
16/32/64-bit
vfmsubaddps instruction.
VFMSUBADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5E /r /is4
FMA4
16/32/64-bit
vfmsubaddps instruction.
VFMSUBADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5E /r /is4
FMA4
16/32/64-bit
vfmsubaddps instruction.
VFMSUBADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5E /r /is4
FMA4
16/32/64-bit
vfmsubaddps instruction.
VFMSUBADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5E /r /is4
FMA4
16/32/64-bit
vfmsubaddps instruction.
VFMSUBADDPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5E /r /is4
FMA4
16/32/64-bit
vfmsubaddps instruction.
VFMSUBADDPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5E /r /is4
FMA4
16/32/64-bit
vfmsubpd instruction.
VFMSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 6D /r /is4
FMA4
16/32/64-bit
vfmsubpd instruction.
VFMSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 6D /r /is4
FMA4
16/32/64-bit
vfmsubpd instruction.
VFMSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 6D /r /is4
FMA4
16/32/64-bit
vfmsubpd instruction.
VFMSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 6D /r /is4
FMA4
16/32/64-bit
vfmsubpd instruction.
VFMSUBPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 6D /r /is4
FMA4
16/32/64-bit
vfmsubpd instruction.
VFMSUBPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 6D /r /is4
FMA4
16/32/64-bit
vfmsubps instruction.
VFMSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 6C /r /is4
FMA4
16/32/64-bit
vfmsubps instruction.
VFMSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 6C /r /is4
FMA4
16/32/64-bit
vfmsubps instruction.
VFMSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 6C /r /is4
FMA4
16/32/64-bit
vfmsubps instruction.
VFMSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 6C /r /is4
FMA4
16/32/64-bit
vfmsubps instruction.
VFMSUBPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 6C /r /is4
FMA4
16/32/64-bit
vfmsubps instruction.
VFMSUBPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 6C /r /is4
FMA4
16/32/64-bit
vfmsubsd instruction.
VFMSUBSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 6F /r /is4
FMA4
16/32/64-bit
vfmsubsd instruction.
VFMSUBSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 6F /r /is4
FMA4
16/32/64-bit
vfmsubsd instruction.
VFMSUBSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 6F /r /is4
FMA4
16/32/64-bit
vfmsubss instruction.
VFMSUBSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 6E /r /is4
FMA4
16/32/64-bit
vfmsubss instruction.
VFMSUBSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 6E /r /is4
FMA4
16/32/64-bit
vfmsubss instruction.
VFMSUBSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 6E /r /is4
FMA4
16/32/64-bit
vfmulcph instruction.
VFMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmulcph instruction.
VFMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmulcph instruction.
VFMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F3.MAP6.W0 D6 /r
AVX512-FP16
16/32/64-bit
vfmulcph instruction.
VFMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmulcph instruction.
VFMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfmulcph instruction.
VFMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F3.MAP6.W0 D6 /r
AVX512-FP16
16/32/64-bit
vfmulcsh instruction.
VFMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.MAP6.W0 D7 /r
AVX512-FP16
16/32/64-bit
vfmulcsh instruction.
VFMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.MAP6.W0 D7 /r
AVX512-FP16
16/32/64-bit
vfnmadd132pd instruction.
VFNMADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9C /r
FMA
16/32/64-bit
VFNMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132pd instruction.
VFNMADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9C /r
FMA
16/32/64-bit
VFNMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132pd instruction.
VFNMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9C /r
AVX512F
16/32/64-bit
vfnmadd132pd instruction.
VFNMADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9C /r
FMA
16/32/64-bit
VFNMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132pd instruction.
VFNMADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9C /r
FMA
16/32/64-bit
VFNMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132pd instruction.
VFNMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9C /r
AVX512F
16/32/64-bit
vfnmadd132ph instruction.
VFNMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd132ph instruction.
VFNMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd132ph instruction.
VFNMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9C /r
AVX512-FP16
16/32/64-bit
vfnmadd132ph instruction.
VFNMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd132ph instruction.
VFNMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd132ph instruction.
VFNMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9C /r
AVX512-FP16
16/32/64-bit
vfnmadd132ps instruction.
VFNMADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9C /r
FMA
16/32/64-bit
VFNMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132ps instruction.
VFNMADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9C /r
FMA
16/32/64-bit
VFNMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132ps instruction.
VFNMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9C /r
AVX512F
16/32/64-bit
vfnmadd132ps instruction.
VFNMADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9C /r
FMA
16/32/64-bit
VFNMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132ps instruction.
VFNMADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9C /r
FMA
16/32/64-bit
VFNMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9C /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd132ps instruction.
VFNMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9C /r
AVX512F
16/32/64-bit
vfnmadd132sd instruction.
VFNMADD132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9D /r
FMA
16/32/64-bit
VFNMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9D /r
AVX512F
16/32/64-bit
vfnmadd132sd instruction.
VFNMADD132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9D /r
FMA
16/32/64-bit
VFNMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9D /r
AVX512F
16/32/64-bit
vfnmadd132sh instruction.
VFNMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9D /r
AVX512-FP16
16/32/64-bit
vfnmadd132sh instruction.
VFNMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9D /r
AVX512-FP16
16/32/64-bit
vfnmadd132ss instruction.
VFNMADD132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9D /r
FMA
16/32/64-bit
VFNMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9D /r
AVX512F
16/32/64-bit
vfnmadd132ss instruction.
VFNMADD132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9D /r
FMA
16/32/64-bit
VFNMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9D /r
AVX512F
16/32/64-bit
vfnmadd213pd instruction.
VFNMADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AC /r
FMA
16/32/64-bit
VFNMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213pd instruction.
VFNMADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AC /r
FMA
16/32/64-bit
VFNMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213pd instruction.
VFNMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AC /r
AVX512F
16/32/64-bit
vfnmadd213pd instruction.
VFNMADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AC /r
FMA
16/32/64-bit
VFNMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213pd instruction.
VFNMADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AC /r
FMA
16/32/64-bit
VFNMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213pd instruction.
VFNMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AC /r
AVX512F
16/32/64-bit
vfnmadd213ph instruction.
VFNMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd213ph instruction.
VFNMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd213ph instruction.
VFNMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AC /r
AVX512-FP16
16/32/64-bit
vfnmadd213ph instruction.
VFNMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd213ph instruction.
VFNMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd213ph instruction.
VFNMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AC /r
AVX512-FP16
16/32/64-bit
vfnmadd213ps instruction.
VFNMADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AC /r
FMA
16/32/64-bit
VFNMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213ps instruction.
VFNMADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AC /r
FMA
16/32/64-bit
VFNMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213ps instruction.
VFNMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AC /r
AVX512F
16/32/64-bit
vfnmadd213ps instruction.
VFNMADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AC /r
FMA
16/32/64-bit
VFNMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213ps instruction.
VFNMADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AC /r
FMA
16/32/64-bit
VFNMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd213ps instruction.
VFNMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AC /r
AVX512F
16/32/64-bit
vfnmadd213sd instruction.
VFNMADD213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AD /r
FMA
16/32/64-bit
VFNMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AD /r
AVX512F
16/32/64-bit
vfnmadd213sd instruction.
VFNMADD213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AD /r
FMA
16/32/64-bit
VFNMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AD /r
AVX512F
16/32/64-bit
vfnmadd213sh instruction.
VFNMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AD /r
AVX512-FP16
16/32/64-bit
vfnmadd213sh instruction.
VFNMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AD /r
AVX512-FP16
16/32/64-bit
vfnmadd213ss instruction.
VFNMADD213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AD /r
FMA
16/32/64-bit
VFNMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AD /r
AVX512F
16/32/64-bit
vfnmadd213ss instruction.
VFNMADD213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AD /r
FMA
16/32/64-bit
VFNMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AD /r
AVX512F
16/32/64-bit
vfnmadd231pd instruction.
VFNMADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BC /r
FMA
16/32/64-bit
VFNMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231pd instruction.
VFNMADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BC /r
FMA
16/32/64-bit
VFNMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231pd instruction.
VFNMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BC /r
AVX512F
16/32/64-bit
vfnmadd231pd instruction.
VFNMADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BC /r
FMA
16/32/64-bit
VFNMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231pd instruction.
VFNMADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BC /r
FMA
16/32/64-bit
VFNMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231pd instruction.
VFNMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BC /r
AVX512F
16/32/64-bit
vfnmadd231ph instruction.
VFNMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd231ph instruction.
VFNMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd231ph instruction.
VFNMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BC /r
AVX512-FP16
16/32/64-bit
vfnmadd231ph instruction.
VFNMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd231ph instruction.
VFNMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BC /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmadd231ph instruction.
VFNMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BC /r
AVX512-FP16
16/32/64-bit
vfnmadd231ps instruction.
VFNMADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BC /r
FMA
16/32/64-bit
VFNMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231ps instruction.
VFNMADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BC /r
FMA
16/32/64-bit
VFNMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231ps instruction.
VFNMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BC /r
AVX512F
16/32/64-bit
vfnmadd231ps instruction.
VFNMADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BC /r
FMA
16/32/64-bit
VFNMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231ps instruction.
VFNMADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BC /r
FMA
16/32/64-bit
VFNMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BC /r
AVX512VL and AVX512F
16/32/64-bit
vfnmadd231ps instruction.
VFNMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BC /r
AVX512F
16/32/64-bit
vfnmadd231sd instruction.
VFNMADD231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BD /r
FMA
16/32/64-bit
VFNMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BD /r
AVX512F
16/32/64-bit
vfnmadd231sd instruction.
VFNMADD231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BD /r
FMA
16/32/64-bit
VFNMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BD /r
AVX512F
16/32/64-bit
vfnmadd231sh instruction.
VFNMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BD /r
AVX512-FP16
16/32/64-bit
vfnmadd231sh instruction.
VFNMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BD /r
AVX512-FP16
16/32/64-bit
vfnmadd231ss instruction.
VFNMADD231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BD /r
FMA
16/32/64-bit
VFNMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BD /r
AVX512F
16/32/64-bit
vfnmadd231ss instruction.
VFNMADD231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BD /r
FMA
16/32/64-bit
VFNMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BD /r
AVX512F
16/32/64-bit
vfnmaddpd instruction.
VFNMADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 79 /r /is4
FMA4
16/32/64-bit
vfnmaddpd instruction.
VFNMADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 79 /r /is4
FMA4
16/32/64-bit
vfnmaddpd instruction.
VFNMADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 79 /r /is4
FMA4
16/32/64-bit
vfnmaddpd instruction.
VFNMADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 79 /r /is4
FMA4
16/32/64-bit
vfnmaddpd instruction.
VFNMADDPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 79 /r /is4
FMA4
16/32/64-bit
vfnmaddpd instruction.
VFNMADDPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 79 /r /is4
FMA4
16/32/64-bit
vfnmaddps instruction.
VFNMADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 78 /r /is4
FMA4
16/32/64-bit
vfnmaddps instruction.
VFNMADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 78 /r /is4
FMA4
16/32/64-bit
vfnmaddps instruction.
VFNMADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 78 /r /is4
FMA4
16/32/64-bit
vfnmaddps instruction.
VFNMADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 78 /r /is4
FMA4
16/32/64-bit
vfnmaddps instruction.
VFNMADDPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 78 /r /is4
FMA4
16/32/64-bit
vfnmaddps instruction.
VFNMADDPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 78 /r /is4
FMA4
16/32/64-bit
vfnmaddsd instruction.
VFNMADDSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 7B /r /is4
FMA4
16/32/64-bit
vfnmaddsd instruction.
VFNMADDSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 7B /r /is4
FMA4
16/32/64-bit
vfnmaddsd instruction.
VFNMADDSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 7B /r /is4
FMA4
16/32/64-bit
vfnmaddss instruction.
VFNMADDSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 7A /r /is4
FMA4
16/32/64-bit
vfnmaddss instruction.
VFNMADDSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 7A /r /is4
FMA4
16/32/64-bit
vfnmaddss instruction.
VFNMADDSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 7A /r /is4
FMA4
16/32/64-bit
vfnmsub132pd instruction.
VFNMSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9E /r
FMA
16/32/64-bit
VFNMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132pd instruction.
VFNMSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9E /r
FMA
16/32/64-bit
VFNMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132pd instruction.
VFNMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9E /r
AVX512F
16/32/64-bit
vfnmsub132pd instruction.
VFNMSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9E /r
FMA
16/32/64-bit
VFNMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132pd instruction.
VFNMSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9E /r
FMA
16/32/64-bit
VFNMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132pd instruction.
VFNMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9E /r
AVX512F
16/32/64-bit
vfnmsub132ph instruction.
VFNMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub132ph instruction.
VFNMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub132ph instruction.
VFNMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9E /r
AVX512-FP16
16/32/64-bit
vfnmsub132ph instruction.
VFNMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub132ph instruction.
VFNMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub132ph instruction.
VFNMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9E /r
AVX512-FP16
16/32/64-bit
vfnmsub132ps instruction.
VFNMSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9E /r
FMA
16/32/64-bit
VFNMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132ps instruction.
VFNMSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9E /r
FMA
16/32/64-bit
VFNMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132ps instruction.
VFNMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9E /r
AVX512F
16/32/64-bit
vfnmsub132ps instruction.
VFNMSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9E /r
FMA
16/32/64-bit
VFNMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132ps instruction.
VFNMSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9E /r
FMA
16/32/64-bit
VFNMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9E /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub132ps instruction.
VFNMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9E /r
AVX512F
16/32/64-bit
vfnmsub132sd instruction.
VFNMSUB132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9F /r
FMA
16/32/64-bit
VFNMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9F /r
AVX512F
16/32/64-bit
vfnmsub132sd instruction.
VFNMSUB132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9F /r
FMA
16/32/64-bit
VFNMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9F /r
AVX512F
16/32/64-bit
vfnmsub132sh instruction.
VFNMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9F /r
AVX512-FP16
16/32/64-bit
vfnmsub132sh instruction.
VFNMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9F /r
AVX512-FP16
16/32/64-bit
vfnmsub132ss instruction.
VFNMSUB132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9F /r
FMA
16/32/64-bit
VFNMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9F /r
AVX512F
16/32/64-bit
vfnmsub132ss instruction.
VFNMSUB132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9F /r
FMA
16/32/64-bit
VFNMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9F /r
AVX512F
16/32/64-bit
vfnmsub213pd instruction.
VFNMSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AE /r
FMA
16/32/64-bit
VFNMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213pd instruction.
VFNMSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AE /r
FMA
16/32/64-bit
VFNMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213pd instruction.
VFNMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AE /r
AVX512F
16/32/64-bit
vfnmsub213pd instruction.
VFNMSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AE /r
FMA
16/32/64-bit
VFNMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213pd instruction.
VFNMSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AE /r
FMA
16/32/64-bit
VFNMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213pd instruction.
VFNMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AE /r
AVX512F
16/32/64-bit
vfnmsub213ph instruction.
VFNMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub213ph instruction.
VFNMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub213ph instruction.
VFNMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AE /r
AVX512-FP16
16/32/64-bit
vfnmsub213ph instruction.
VFNMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub213ph instruction.
VFNMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub213ph instruction.
VFNMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AE /r
AVX512-FP16
16/32/64-bit
vfnmsub213ps instruction.
VFNMSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AE /r
FMA
16/32/64-bit
VFNMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213ps instruction.
VFNMSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AE /r
FMA
16/32/64-bit
VFNMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213ps instruction.
VFNMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AE /r
AVX512F
16/32/64-bit
vfnmsub213ps instruction.
VFNMSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AE /r
FMA
16/32/64-bit
VFNMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213ps instruction.
VFNMSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AE /r
FMA
16/32/64-bit
VFNMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub213ps instruction.
VFNMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AE /r
AVX512F
16/32/64-bit
vfnmsub213sd instruction.
VFNMSUB213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AF /r
FMA
16/32/64-bit
VFNMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AF /r
AVX512F
16/32/64-bit
vfnmsub213sd instruction.
VFNMSUB213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AF /r
FMA
16/32/64-bit
VFNMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AF /r
AVX512F
16/32/64-bit
vfnmsub213sh instruction.
VFNMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AF /r
AVX512-FP16
16/32/64-bit
vfnmsub213sh instruction.
VFNMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AF /r
AVX512-FP16
16/32/64-bit
vfnmsub213ss instruction.
VFNMSUB213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AF /r
FMA
16/32/64-bit
VFNMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AF /r
AVX512F
16/32/64-bit
vfnmsub213ss instruction.
VFNMSUB213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AF /r
FMA
16/32/64-bit
VFNMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AF /r
AVX512F
16/32/64-bit
vfnmsub231pd instruction.
VFNMSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BE /r
FMA
16/32/64-bit
VFNMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231pd instruction.
VFNMSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BE /r
FMA
16/32/64-bit
VFNMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231pd instruction.
VFNMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BE /r
AVX512F
16/32/64-bit
vfnmsub231pd instruction.
VFNMSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BE /r
FMA
16/32/64-bit
VFNMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231pd instruction.
VFNMSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BE /r
FMA
16/32/64-bit
VFNMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231pd instruction.
VFNMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BE /r
AVX512F
16/32/64-bit
vfnmsub231ph instruction.
VFNMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub231ph instruction.
VFNMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub231ph instruction.
VFNMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BE /r
AVX512-FP16
16/32/64-bit
vfnmsub231ph instruction.
VFNMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub231ph instruction.
VFNMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BE /r
AVX512VL and AVX512-FP16
16/32/64-bit
vfnmsub231ph instruction.
VFNMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BE /r
AVX512-FP16
16/32/64-bit
vfnmsub231ps instruction.
VFNMSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BE /r
FMA
16/32/64-bit
VFNMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231ps instruction.
VFNMSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BE /r
FMA
16/32/64-bit
VFNMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231ps instruction.
VFNMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BE /r
AVX512F
16/32/64-bit
vfnmsub231ps instruction.
VFNMSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BE /r
FMA
16/32/64-bit
VFNMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231ps instruction.
VFNMSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BE /r
FMA
16/32/64-bit
VFNMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BE /r
AVX512VL and AVX512F
16/32/64-bit
vfnmsub231ps instruction.
VFNMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BE /r
AVX512F
16/32/64-bit
vfnmsub231sd instruction.
VFNMSUB231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BF /r
FMA
16/32/64-bit
VFNMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BF /r
AVX512F
16/32/64-bit
vfnmsub231sd instruction.
VFNMSUB231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BF /r
FMA
16/32/64-bit
VFNMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BF /r
AVX512F
16/32/64-bit
vfnmsub231sh instruction.
VFNMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BF /r
AVX512-FP16
16/32/64-bit
vfnmsub231sh instruction.
VFNMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BF /r
AVX512-FP16
16/32/64-bit
vfnmsub231ss instruction.
VFNMSUB231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BF /r
FMA
16/32/64-bit
VFNMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BF /r
AVX512F
16/32/64-bit
vfnmsub231ss instruction.
VFNMSUB231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BF /r
FMA
16/32/64-bit
VFNMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BF /r
AVX512F
16/32/64-bit
vfnmsubpd instruction.
VFNMSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 7D /r /is4
FMA4
16/32/64-bit
vfnmsubpd instruction.
VFNMSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 7D /r /is4
FMA4
16/32/64-bit
vfnmsubpd instruction.
VFNMSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 7D /r /is4
FMA4
16/32/64-bit
vfnmsubpd instruction.
VFNMSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 7D /r /is4
FMA4
16/32/64-bit
vfnmsubpd instruction.
VFNMSUBPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 7D /r /is4
FMA4
16/32/64-bit
vfnmsubpd instruction.
VFNMSUBPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 7D /r /is4
FMA4
16/32/64-bit
vfnmsubps instruction.
VFNMSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 7C /r /is4
FMA4
16/32/64-bit
vfnmsubps instruction.
VFNMSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 7C /r /is4
FMA4
16/32/64-bit
vfnmsubps instruction.
VFNMSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 7C /r /is4
FMA4
16/32/64-bit
vfnmsubps instruction.
VFNMSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 7C /r /is4
FMA4
16/32/64-bit
vfnmsubps instruction.
VFNMSUBPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 7C /r /is4
FMA4
16/32/64-bit
vfnmsubps instruction.
VFNMSUBPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 7C /r /is4
FMA4
16/32/64-bit
vfnmsubsd instruction.
VFNMSUBSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 7F /r /is4
FMA4
16/32/64-bit
vfnmsubsd instruction.
VFNMSUBSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 7F /r /is4
FMA4
16/32/64-bit
vfnmsubsd instruction.
VFNMSUBSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 7F /r /is4
FMA4
16/32/64-bit
vfnmsubss instruction.
VFNMSUBSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 7E /r /is4
FMA4
16/32/64-bit
vfnmsubss instruction.
VFNMSUBSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 7E /r /is4
FMA4
16/32/64-bit
vfnmsubss instruction.
VFNMSUBSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 7E /r /is4
FMA4
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 66 /r ib
AVX512DQ
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 66 /r ib
AVX512DQ
16/32/64-bit
VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 66 /r ib
AVX512DQ
16/32/64-bit
vfpclasspd instruction.
VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 66 /r ib
AVX512DQ
16/32/64-bit
VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspdx instruction.
VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspdx instruction.
VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspdy instruction.
VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspdy instruction.
VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspdz instruction.
VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 66 /r ib
AVX512DQ
16/32/64-bit
vfpclasspdz instruction.
VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 66 /r ib
AVX512DQ
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8
EVEX.512.0F3A.W0 66 /r ib
AVX512-FP16
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8
EVEX.512.0F3A.W0 66 /r ib
AVX512-FP16
16/32/64-bit
VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8
EVEX.512.0F3A.W0 66 /r ib
AVX512-FP16
16/32/64-bit
vfpclassph instruction.
VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8
EVEX.512.0F3A.W0 66 /r ib
AVX512-FP16
16/32/64-bit
VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassphx instruction.
VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassphx instruction.
VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassphy instruction.
VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassphy instruction.
VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vfpclassphz instruction.
VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8
EVEX.512.0F3A.W0 66 /r ib
AVX512-FP16
16/32/64-bit
vfpclassphz instruction.
VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8
EVEX.512.0F3A.W0 66 /r ib
AVX512-FP16
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 66 /r ib
AVX512DQ
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 66 /r ib
AVX512DQ
16/32/64-bit
VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 66 /r ib
AVX512DQ
16/32/64-bit
vfpclassps instruction.
VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 66 /r ib
AVX512DQ
16/32/64-bit
VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspsx instruction.
VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspsx instruction.
VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspsy instruction.
VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspsy instruction.
VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vfpclasspsz instruction.
VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 66 /r ib
AVX512DQ
16/32/64-bit
vfpclasspsz instruction.
VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 66 /r ib
AVX512DQ
16/32/64-bit
vfpclasssd instruction.
VFPCLASSSD k2 {k1}, xmm2/m64, imm8
EVEX.LIG.66.0F3A.W1 67 /r ib
AVX512DQ
16/32/64-bit
vfpclasssd instruction.
VFPCLASSSD k2 {k1}, xmm2/m64, imm8
EVEX.LIG.66.0F3A.W1 67 /r ib
AVX512DQ
16/32/64-bit
vfpclasssd instruction.
VFPCLASSSD k2 {k1}, xmm2/m64, imm8
EVEX.LIG.66.0F3A.W1 67 /r ib
AVX512DQ
16/32/64-bit
vfpclasssd instruction.
VFPCLASSSD k2 {k1}, xmm2/m64, imm8
EVEX.LIG.66.0F3A.W1 67 /r ib
AVX512DQ
16/32/64-bit
vfpclasssh instruction.
VFPCLASSSH k1 {k2}, xmm2/m16, imm8
EVEX.LIG.0F3A.W0 67 /r ib
AVX512-FP16
16/32/64-bit
vfpclasssh instruction.
VFPCLASSSH k1 {k2}, xmm2/m16, imm8
EVEX.LIG.0F3A.W0 67 /r ib
AVX512-FP16
16/32/64-bit
vfpclasssh instruction.
VFPCLASSSH k1 {k2}, xmm2/m16, imm8
EVEX.LIG.0F3A.W0 67 /r ib
AVX512-FP16
16/32/64-bit
vfpclasssh instruction.
VFPCLASSSH k1 {k2}, xmm2/m16, imm8
EVEX.LIG.0F3A.W0 67 /r ib
AVX512-FP16
16/32/64-bit
vfpclassss instruction.
VFPCLASSSS k2 {k1}, xmm2/m32, imm8
EVEX.LIG.66.0F3A.W0 67 /r ib
AVX512DQ
16/32/64-bit
vfpclassss instruction.
VFPCLASSSS k2 {k1}, xmm2/m32, imm8
EVEX.LIG.66.0F3A.W0 67 /r ib
AVX512DQ
16/32/64-bit
vfpclassss instruction.
VFPCLASSSS k2 {k1}, xmm2/m32, imm8
EVEX.LIG.66.0F3A.W0 67 /r ib
AVX512DQ
16/32/64-bit
vfpclassss instruction.
VFPCLASSSS k2 {k1}, xmm2/m32, imm8
EVEX.LIG.66.0F3A.W0 67 /r ib
AVX512DQ
16/32/64-bit
vfrczpd instruction.
VFRCZPD xmm1, xmm2/m128
XOP.128.X9.W0 81 /r
XOP
16/32/64-bit
vfrczpd instruction.
VFRCZPD ymm1, ymm2/m256
XOP.256.X9.W0 81 /r
XOP
16/32/64-bit
vfrczpd instruction.
VFRCZPD xmm1, xmm2/m128
XOP.128.X9.W0 81 /r
XOP
16/32/64-bit
vfrczpd instruction.
VFRCZPD ymm1, ymm2/m256
XOP.256.X9.W0 81 /r
XOP
16/32/64-bit
vfrczps instruction.
VFRCZPS xmm1, xmm2/m128
XOP.128.X9.W0 80 /r
XOP
16/32/64-bit
vfrczps instruction.
VFRCZPS ymm1, ymm2/m256
XOP.256.X9.W0 80 /r
XOP
16/32/64-bit
vfrczps instruction.
VFRCZPS xmm1, xmm2/m128
XOP.128.X9.W0 80 /r
XOP
16/32/64-bit
vfrczps instruction.
VFRCZPS ymm1, ymm2/m256
XOP.256.X9.W0 80 /r
XOP
16/32/64-bit
vfrczsd instruction.
VFRCZSD xmm1, xmm2/m64
XOP.128.X9.W0 83 /r
XOP
16/32/64-bit
vfrczsd instruction.
VFRCZSD xmm1, xmm2/m64
XOP.128.X9.W0 83 /r
XOP
16/32/64-bit
vfrczss instruction.
VFRCZSS xmm1, xmm2/m32
XOP.128.X9.W0 82 /r
XOP
16/32/64-bit
vfrczss instruction.
VFRCZSS xmm1, xmm2/m32
XOP.128.X9.W0 82 /r
XOP
16/32/64-bit
vgatherdpd instruction.
VGATHERDPD xmm1 {k1}, vm32x
EVEX.128.66.0F38.W1 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
vgatherdpd instruction.
VGATHERDPD ymm1 {k1}, vm32x
EVEX.256.66.0F38.W1 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
vgatherdpd instruction.
VGATHERDPD zmm1 {k1}, vm32y
EVEX.512.66.0F38.W1 92 /vsib
AVX512F
16/32/64-bit
vgatherdpd instruction.
VGATHERDPD xmm1, vm32x, xmm2
VEX.128.66.0F38.W1 92 /r
AVX2
16/32/64-bit
vgatherdpd instruction.
VGATHERDPD ymm1, vm32x, ymm2
VEX.256.66.0F38.W1 92 /r
AVX2
16/32/64-bit
vgatherdps instruction.
VGATHERDPS xmm1 {k1}, vm32x
EVEX.128.66.0F38.W0 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
vgatherdps instruction.
VGATHERDPS ymm1 {k1}, vm32y
EVEX.256.66.0F38.W0 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
vgatherdps instruction.
VGATHERDPS zmm1 {k1}, vm32z
EVEX.512.66.0F38.W0 92 /vsib
AVX512F
16/32/64-bit
vgatherdps instruction.
VGATHERDPS xmm1, vm32x, xmm2
VEX.128.66.0F38.W0 92 /r
AVX2
16/32/64-bit
vgatherdps instruction.
VGATHERDPS ymm1, vm32y, ymm2
VEX.256.66.0F38.W0 92 /r
AVX2
16/32/64-bit
vgatherpf0dpd instruction.
VGATHERPF0DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /1 /vsib
AVX512PF
16/32/64-bit
vgatherpf0dps instruction.
VGATHERPF0DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /1 /vsib
AVX512PF
16/32/64-bit
vgatherpf0qpd instruction.
VGATHERPF0QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /1 /vsib
AVX512PF
16/32/64-bit
vgatherpf0qps instruction.
VGATHERPF0QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /1 /vsib
AVX512PF
16/32/64-bit
vgatherpf1dpd instruction.
VGATHERPF1DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /2 /vsib
AVX512PF
16/32/64-bit
vgatherpf1dps instruction.
VGATHERPF1DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /2 /vsib
AVX512PF
16/32/64-bit
vgatherpf1qpd instruction.
VGATHERPF1QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /2 /vsib
AVX512PF
16/32/64-bit
vgatherpf1qps instruction.
VGATHERPF1QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /2 /vsib
AVX512PF
16/32/64-bit
vgatherqpd instruction.
VGATHERQPD xmm1 {k1}, vm64x
EVEX.128.66.0F38.W1 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
vgatherqpd instruction.
VGATHERQPD ymm1 {k1}, vm64y
EVEX.256.66.0F38.W1 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
vgatherqpd instruction.
VGATHERQPD zmm1 {k1}, vm64z
EVEX.512.66.0F38.W1 93 /vsib
AVX512F
16/32/64-bit
vgatherqpd instruction.
VGATHERQPD xmm1, vm64x, xmm2
VEX.128.66.0F38.W1 93 /r
AVX2
16/32/64-bit
vgatherqpd instruction.
VGATHERQPD ymm1, vm64y, ymm2
VEX.256.66.0F38.W1 93 /r
AVX2
16/32/64-bit
vgatherqps instruction.
VGATHERQPS xmm1 {k1}, vm64x
EVEX.128.66.0F38.W0 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERQPS xmm1 {k1}, vm64y
EVEX.256.66.0F38.W0 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
vgatherqps instruction.
VGATHERQPS ymm1 {k1}, vm64z
EVEX.512.66.0F38.W0 93 /vsib
AVX512F
16/32/64-bit
vgatherqps instruction.
VGATHERQPS xmm1, vm64x, xmm2
VEX.128.66.0F38.W0 93 /r
AVX2
16/32/64-bit
VGATHERQPS xmm1, vm64y, xmm2
VEX.256.66.0F38.W0 93 /r
AVX2
16/32/64-bit
vgetexppd instruction.
VGETEXPPD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexppd instruction.
VGETEXPPD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexppd instruction.
VGETEXPPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 42 /r
AVX512F
16/32/64-bit
vgetexppd instruction.
VGETEXPPD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexppd instruction.
VGETEXPPD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexppd instruction.
VGETEXPPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 42 /r
AVX512F
16/32/64-bit
vgetexpph instruction.
VGETEXPPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 42 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vgetexpph instruction.
VGETEXPPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 42 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vgetexpph instruction.
VGETEXPPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.66.MAP6.W0 42 /r
AVX512-FP16
16/32/64-bit
vgetexpph instruction.
VGETEXPPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 42 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vgetexpph instruction.
VGETEXPPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 42 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vgetexpph instruction.
VGETEXPPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.66.MAP6.W0 42 /r
AVX512-FP16
16/32/64-bit
vgetexpps instruction.
VGETEXPPS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexpps instruction.
VGETEXPPS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexpps instruction.
VGETEXPPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 42 /r
AVX512F
16/32/64-bit
vgetexpps instruction.
VGETEXPPS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexpps instruction.
VGETEXPPS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 42 /r
AVX512VL and AVX512F
16/32/64-bit
vgetexpps instruction.
VGETEXPPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 42 /r
AVX512F
16/32/64-bit
vgetexpsd instruction.
VGETEXPSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 43 /r
AVX512F
16/32/64-bit
vgetexpsd instruction.
VGETEXPSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 43 /r
AVX512F
16/32/64-bit
vgetexpsh instruction.
VGETEXPSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.66.MAP6.W0 43 /r
AVX512-FP16
16/32/64-bit
vgetexpsh instruction.
VGETEXPSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.66.MAP6.W0 43 /r
AVX512-FP16
16/32/64-bit
vgetexpss instruction.
VGETEXPSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 43 /r
AVX512F
16/32/64-bit
vgetexpss instruction.
VGETEXPSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 43 /r
AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 26 /r ib
AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 26 /r ib
AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 26 /r ib
AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantpd instruction.
VGETMANTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 26 /r ib
AVX512F
16/32/64-bit
vgetmantph instruction.
VGETMANTPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 26 /r ib
AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 26 /r ib
AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 26 /r ib
AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vgetmantph instruction.
VGETMANTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 26 /r ib
AVX512-FP16
16/32/64-bit
vgetmantps instruction.
VGETMANTPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 26 /r ib
AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 26 /r ib
AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 26 /r ib
AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
vgetmantps instruction.
VGETMANTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 26 /r ib
AVX512F
16/32/64-bit
vgetmantsd instruction.
VGETMANTSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 27 /r ib
AVX512F
16/32/64-bit
vgetmantsd instruction.
VGETMANTSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 27 /r ib
AVX512F
16/32/64-bit
vgetmantsd instruction.
VGETMANTSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 27 /r ib
AVX512F
16/32/64-bit
vgetmantsd instruction.
VGETMANTSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 27 /r ib
AVX512F
16/32/64-bit
vgetmantsh instruction.
VGETMANTSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 27 /r ib
AVX512-FP16
16/32/64-bit
vgetmantsh instruction.
VGETMANTSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 27 /r ib
AVX512-FP16
16/32/64-bit
vgetmantsh instruction.
VGETMANTSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 27 /r ib
AVX512-FP16
16/32/64-bit
vgetmantsh instruction.
VGETMANTSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 27 /r ib
AVX512-FP16
16/32/64-bit
vgetmantss instruction.
VGETMANTSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 27 /r ib
AVX512F
16/32/64-bit
vgetmantss instruction.
VGETMANTSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 27 /r ib
AVX512F
16/32/64-bit
vgetmantss instruction.
VGETMANTSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 27 /r ib
AVX512F
16/32/64-bit
vgetmantss instruction.
VGETMANTSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 27 /r ib
AVX512F
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CF /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CF /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CF /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineinvqb instruction.
VGF2P8AFFINEINVQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CF /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CE /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CE /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CE /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
vgf2p8affineqb instruction.
VGF2P8AFFINEQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CE /r ib
AVX512F and GFNI
16/32/64-bit
vgf2p8mulb instruction.
VGF2P8MULB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 CF /r
AVX and GFNI
16/32/64-bit
VGF2P8MULB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 CF /r
AVX512VL and GFNI
16/32/64-bit
vgf2p8mulb instruction.
VGF2P8MULB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 CF /r
AVX and GFNI
16/32/64-bit
VGF2P8MULB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 CF /r
AVX512VL and GFNI
16/32/64-bit
vgf2p8mulb instruction.
VGF2P8MULB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 CF /r
AVX512F and GFNI
16/32/64-bit
vgf2p8mulb instruction.
VGF2P8MULB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 CF /r
AVX and GFNI
16/32/64-bit
VGF2P8MULB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 CF /r
AVX512VL and GFNI
16/32/64-bit
vgf2p8mulb instruction.
VGF2P8MULB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 CF /r
AVX and GFNI
16/32/64-bit
VGF2P8MULB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 CF /r
AVX512VL and GFNI
16/32/64-bit
vgf2p8mulb instruction.
VGF2P8MULB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 CF /r
AVX512F and GFNI
16/32/64-bit
vhaddpd instruction.
VHADDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 7C /r
AVX
16/32/64-bit
vhaddpd instruction.
VHADDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 7C /r
AVX
16/32/64-bit
vhaddpd instruction.
VHADDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 7C /r
AVX
16/32/64-bit
vhaddpd instruction.
VHADDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 7C /r
AVX
16/32/64-bit
vhaddps instruction.
VHADDPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG 7C /r
AVX
16/32/64-bit
vhaddps instruction.
VHADDPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG 7C /r
AVX
16/32/64-bit
vhaddps instruction.
VHADDPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG 7C /r
AVX
16/32/64-bit
vhaddps instruction.
VHADDPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG 7C /r
AVX
16/32/64-bit
vhsubpd instruction.
VHSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 7D /r
AVX
16/32/64-bit
vhsubpd instruction.
VHSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 7D /r
AVX
16/32/64-bit
vhsubpd instruction.
VHSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 7D /r
AVX
16/32/64-bit
vhsubpd instruction.
VHSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 7D /r
AVX
16/32/64-bit
vhsubps instruction.
VHSUBPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG 7D /r
AVX
16/32/64-bit
vhsubps instruction.
VHSUBPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG 7D /r
AVX
16/32/64-bit
vhsubps instruction.
VHSUBPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG 7D /r
AVX
16/32/64-bit
vhsubps instruction.
VHSUBPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG 7D /r
AVX
16/32/64-bit
vinsertf128 instruction.
VINSERTF128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 18 /r ib
AVX
16/32/64-bit
vinsertf128 instruction.
VINSERTF128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 18 /r ib
AVX
16/32/64-bit
vinsertf128 instruction.
VINSERTF128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 18 /r ib
AVX
16/32/64-bit
vinsertf128 instruction.
VINSERTF128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 18 /r ib
AVX
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 18 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 18 /r ib
AVX512F
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 18 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 18 /r ib
AVX512F
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 18 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 18 /r ib
AVX512F
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 18 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinsertf32x4 instruction.
VINSERTF32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 18 /r ib
AVX512F
16/32/64-bit
vinsertf32x8 instruction.
VINSERTF32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 1A /r ib
AVX512DQ
16/32/64-bit
vinsertf32x8 instruction.
VINSERTF32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 1A /r ib
AVX512DQ
16/32/64-bit
vinsertf32x8 instruction.
VINSERTF32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 1A /r ib
AVX512DQ
16/32/64-bit
vinsertf32x8 instruction.
VINSERTF32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 1A /r ib
AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 18 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 18 /r ib
AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 18 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 18 /r ib
AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 18 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 18 /r ib
AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 18 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinsertf64x2 instruction.
VINSERTF64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 18 /r ib
AVX512DQ
16/32/64-bit
vinsertf64x4 instruction.
VINSERTF64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 1A /r ib
AVX512F
16/32/64-bit
vinsertf64x4 instruction.
VINSERTF64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 1A /r ib
AVX512F
16/32/64-bit
vinsertf64x4 instruction.
VINSERTF64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 1A /r ib
AVX512F
16/32/64-bit
vinsertf64x4 instruction.
VINSERTF64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 1A /r ib
AVX512F
16/32/64-bit
vinserti128 instruction.
VINSERTI128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 38 /r ib
AVX2
16/32/64-bit
vinserti128 instruction.
VINSERTI128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 38 /r ib
AVX2
16/32/64-bit
vinserti128 instruction.
VINSERTI128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 38 /r ib
AVX2
16/32/64-bit
vinserti128 instruction.
VINSERTI128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 38 /r ib
AVX2
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 38 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 38 /r ib
AVX512F
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 38 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 38 /r ib
AVX512F
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 38 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 38 /r ib
AVX512F
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 38 /r ib
AVX512VL and AVX512F
16/32/64-bit
vinserti32x4 instruction.
VINSERTI32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 38 /r ib
AVX512F
16/32/64-bit
vinserti32x8 instruction.
VINSERTI32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 3A /r ib
AVX512DQ
16/32/64-bit
vinserti32x8 instruction.
VINSERTI32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 3A /r ib
AVX512DQ
16/32/64-bit
vinserti32x8 instruction.
VINSERTI32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 3A /r ib
AVX512DQ
16/32/64-bit
vinserti32x8 instruction.
VINSERTI32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 3A /r ib
AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 38 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 38 /r ib
AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 38 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 38 /r ib
AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 38 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 38 /r ib
AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 38 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vinserti64x2 instruction.
VINSERTI64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 38 /r ib
AVX512DQ
16/32/64-bit
vinserti64x4 instruction.
VINSERTI64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 3A /r ib
AVX512F
16/32/64-bit
vinserti64x4 instruction.
VINSERTI64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 3A /r ib
AVX512F
16/32/64-bit
vinserti64x4 instruction.
VINSERTI64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 3A /r ib
AVX512F
16/32/64-bit
vinserti64x4 instruction.
VINSERTI64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 3A /r ib
AVX512F
16/32/64-bit
vinsertps instruction.
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
VEX.128.66.0F3A.WIG 21 /r ib
AVX
16/32/64-bit
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
EVEX.128.66.0F3A.W0 21 /r ib
AVX512F
16/32/64-bit
vinsertps instruction.
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
VEX.128.66.0F3A.WIG 21 /r ib
AVX
16/32/64-bit
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
EVEX.128.66.0F3A.W0 21 /r ib
AVX512F
16/32/64-bit
vinsertps instruction.
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
VEX.128.66.0F3A.WIG 21 /r ib
AVX
16/32/64-bit
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
EVEX.128.66.0F3A.W0 21 /r ib
AVX512F
16/32/64-bit
vinsertps instruction.
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
VEX.128.66.0F3A.WIG 21 /r ib
AVX
16/32/64-bit
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
EVEX.128.66.0F3A.W0 21 /r ib
AVX512F
16/32/64-bit
vlddqu instruction.
VLDDQU xmm1, m128
VEX.128.F2.0F.WIG F0 /r
AVX
16/32/64-bit
vlddqu instruction.
VLDDQU ymm1, m256
VEX.256.F2.0F.WIG F0 /r
AVX
16/32/64-bit
vldmxcsr instruction.
VLDMXCSR m32
VEX.LZ.0F.WIG AE /2
AVX
16/32/64-bit
vmaskmovdqu instruction.
VMASKMOVDQU xmm1, xmm2
VEX.128.66.0F.WIG F7 /r
AVX
16/32/64-bit
vmaskmovpd instruction.
VMASKMOVPD m128, xmm1, xmm2
VEX.128.66.0F38.W0 2F /r
AVX
16/32/64-bit
vmaskmovpd instruction.
VMASKMOVPD m256, ymm1, ymm2
VEX.256.66.0F38.W0 2F /r
AVX
16/32/64-bit
vmaskmovpd instruction.
VMASKMOVPD xmm1, xmm2, m128
VEX.128.66.0F38.W0 2D /r
AVX
16/32/64-bit
vmaskmovpd instruction.
VMASKMOVPD ymm1, ymm2, m256
VEX.256.66.0F38.W0 2D /r
AVX
16/32/64-bit
vmaskmovps instruction.
VMASKMOVPS m128, xmm1, xmm2
VEX.128.66.0F38.W0 2E /r
AVX
16/32/64-bit
vmaskmovps instruction.
VMASKMOVPS m256, ymm1, ymm2
VEX.256.66.0F38.W0 2E /r
AVX
16/32/64-bit
vmaskmovps instruction.
VMASKMOVPS xmm1, xmm2, m128
VEX.128.66.0F38.W0 2C /r
AVX
16/32/64-bit
vmaskmovps instruction.
VMASKMOVPS ymm1, ymm2, m256
VEX.256.66.0F38.W0 2C /r
AVX
16/32/64-bit
vmaxpd instruction.
VMAXPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxpd instruction.
VMAXPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxpd instruction.
VMAXPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}
EVEX.512.66.0F.W1 5F /r
AVX512F
16/32/64-bit
vmaxpd instruction.
VMAXPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxpd instruction.
VMAXPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxpd instruction.
VMAXPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}
EVEX.512.66.0F.W1 5F /r
AVX512F
16/32/64-bit
vmaxph instruction.
VMAXPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5F /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmaxph instruction.
VMAXPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5F /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmaxph instruction.
VMAXPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}
EVEX.512.MAP5.W0 5F /r
AVX512-FP16
16/32/64-bit
vmaxph instruction.
VMAXPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5F /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmaxph instruction.
VMAXPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5F /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmaxph instruction.
VMAXPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}
EVEX.512.MAP5.W0 5F /r
AVX512-FP16
16/32/64-bit
vmaxps instruction.
VMAXPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxps instruction.
VMAXPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxps instruction.
VMAXPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}
EVEX.512.0F.W0 5F /r
AVX512F
16/32/64-bit
vmaxps instruction.
VMAXPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxps instruction.
VMAXPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5F /r
AVX512VL and AVX512F
16/32/64-bit
vmaxps instruction.
VMAXPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}
EVEX.512.0F.W0 5F /r
AVX512F
16/32/64-bit
vmaxsd instruction.
VMAXSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.F2.0F.W1 5F /r
AVX512F
16/32/64-bit
vmaxsd instruction.
VMAXSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.F2.0F.W1 5F /r
AVX512F
16/32/64-bit
vmaxsh instruction.
VMAXSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5F /r
AVX512-FP16
16/32/64-bit
vmaxsh instruction.
VMAXSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5F /r
AVX512-FP16
16/32/64-bit
vmaxss instruction.
VMAXSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5F /r
AVX512F
16/32/64-bit
vmaxss instruction.
VMAXSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5F /r
AVX512F
16/32/64-bit
vmcall instruction.
VMCALL
NP 0F 01 C1
VMX
16/32/64-bit
vmclear instruction.
VMCLEAR m64
66 0F C7 /6
VMX
16/32/64-bit
vmfunc instruction.
VMFUNC
NP 0F 01 D4
VMX
16/32/64-bit
vmgexit instruction.
VMGEXIT
F3 0F 01 D9
SEV-ES
16/32/64-bit
vminpd instruction.
VMINPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminpd instruction.
VMINPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminpd instruction.
VMINPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}
EVEX.512.66.0F.W1 5D /r
AVX512F
16/32/64-bit
vminpd instruction.
VMINPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminpd instruction.
VMINPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminpd instruction.
VMINPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}
EVEX.512.66.0F.W1 5D /r
AVX512F
16/32/64-bit
vminph instruction.
VMINPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vminph instruction.
VMINPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vminph instruction.
VMINPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}
EVEX.512.MAP5.W0 5D /r
AVX512-FP16
16/32/64-bit
vminph instruction.
VMINPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vminph instruction.
VMINPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5D /r
AVX512VL and AVX512-FP16
16/32/64-bit
vminph instruction.
VMINPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}
EVEX.512.MAP5.W0 5D /r
AVX512-FP16
16/32/64-bit
vminps instruction.
VMINPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminps instruction.
VMINPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminps instruction.
VMINPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}
EVEX.512.0F.W0 5D /r
AVX512F
16/32/64-bit
vminps instruction.
VMINPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminps instruction.
VMINPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5D /r
AVX512VL and AVX512F
16/32/64-bit
vminps instruction.
VMINPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}
EVEX.512.0F.W0 5D /r
AVX512F
16/32/64-bit
vminsd instruction.
VMINSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5D /r
AVX
16/32/64-bit
VMINSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.F2.0F.W1 5D /r
AVX512F
16/32/64-bit
vminsd instruction.
VMINSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5D /r
AVX
16/32/64-bit
VMINSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.F2.0F.W1 5D /r
AVX512F
16/32/64-bit
vminsh instruction.
VMINSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5D /r
AVX512-FP16
16/32/64-bit
vminsh instruction.
VMINSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5D /r
AVX512-FP16
16/32/64-bit
vminss instruction.
VMINSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5D /r
AVX
16/32/64-bit
VMINSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5D /r
AVX512F
16/32/64-bit
vminss instruction.
VMINSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5D /r
AVX
16/32/64-bit
VMINSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5D /r
AVX512F
16/32/64-bit
vmlaunch instruction.
VMLAUNCH
NP 0F 01 C2
VMX
16/32/64-bit
vmload instruction.
VMLOAD
a64 0F 01 DA
SVM
64-bit
VMLOAD
a32 0F 01 DA
SVM
16/32/64-bit
VMLOAD
a16 0F 01 DA
SVM
16/32-bit
vmmcall instruction.
VMMCALL
0F 01 D9
SVM
16/32/64-bit
vmovapd instruction.
VMOVAPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD xmm2/m128, xmm1
VEX.128.66.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPD xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD ymm2/m256, ymm1
VEX.256.66.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPD ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 28 /r
AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W1 29 /r
AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovapd instruction.
VMOVAPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 28 /r
AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS xmm1, xmm2/m128
VEX.128.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.0F.W0 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS xmm2/m128, xmm1
VEX.128.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPS xmm2/m128 {k1}{z}, xmm1
EVEX.128.0F.W0 29 /r
AVX512VL and AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS ymm1, ymm2/m256
VEX.256.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.0F.W0 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS ymm2/m256, ymm1
VEX.256.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPS ymm2/m256 {k1}{z}, ymm1
EVEX.256.0F.W0 29 /r
AVX512VL and AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.0F.W0 28 /r
AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS zmm2/m512 {k1}{z}, zmm1
EVEX.512.0F.W0 29 /r
AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS xmm1, xmm2/m128
VEX.128.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.0F.W0 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS ymm1, ymm2/m256
VEX.256.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.0F.W0 28 /r
AVX512VL and AVX512F
16/32/64-bit
vmovaps instruction.
VMOVAPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.0F.W0 28 /r
AVX512F
16/32/64-bit
vmovd instruction.
VMOVD xmm1, r/m32
VEX.128.66.0F.W0 6E /r
AVX
16/32/64-bit
VMOVD xmm1, r/m32
EVEX.128.66.0F.W0 6E /r
AVX512F
16/32/64-bit
vmovd instruction.
VMOVD r/m32, xmm1
VEX.128.66.0F.W0 7E /r
AVX
16/32/64-bit
VMOVD r/m32, xmm1
EVEX.128.66.0F.W0 7E /r
AVX512F
16/32/64-bit
vmovd instruction.
VMOVD r/m32, xmm1
VEX.128.66.0F.W0 7E /r
AVX
16/32/64-bit
VMOVD r/m32, xmm1
EVEX.128.66.0F.W0 7E /r
AVX512F
16/32/64-bit
vmovd instruction.
VMOVD xmm1, r/m32
VEX.128.66.0F.W0 6E /r
AVX
16/32/64-bit
VMOVD xmm1, r/m32
EVEX.128.66.0F.W0 6E /r
AVX512F
16/32/64-bit
vmovddup instruction.
VMOVDDUP xmm1, xmm2/m64
VEX.128.F2.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVDDUP xmm1 {k1}{z}, xmm2/m64
EVEX.128.F2.0F.W1 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovddup instruction.
VMOVDDUP ymm1, ymm2/m256
VEX.256.F2.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVDDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W1 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovddup instruction.
VMOVDDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W1 12 /r
AVX512F
16/32/64-bit
vmovddup instruction.
VMOVDDUP xmm1, xmm2/m64
VEX.128.F2.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVDDUP xmm1 {k1}{z}, xmm2/m64
EVEX.128.F2.0F.W1 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovddup instruction.
VMOVDDUP ymm1, ymm2/m256
VEX.256.F2.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVDDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W1 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovddup instruction.
VMOVDDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W1 12 /r
AVX512F
16/32/64-bit
vmovdqa instruction.
VMOVDQA xmm1, xmm2/m128
VEX.128.66.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqa instruction.
VMOVDQA xmm2/m128, xmm1
VEX.128.66.0F.WIG 7F /r
AVX
16/32/64-bit
vmovdqa instruction.
VMOVDQA ymm1, ymm2/m256
VEX.256.66.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqa instruction.
VMOVDQA ymm2/m256, ymm1
VEX.256.66.0F.WIG 7F /r
AVX
16/32/64-bit
vmovdqa instruction.
VMOVDQA xmm1, xmm2/m128
VEX.128.66.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqa instruction.
VMOVDQA ymm1, ymm2/m256
VEX.256.66.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W0 6F /r
AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W0 7F /r
AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa32 instruction.
VMOVDQA32 zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W0 6F /r
AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 6F /r
AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W1 7F /r
AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqa64 instruction.
VMOVDQA64 zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 6F /r
AVX512F
16/32/64-bit
vmovdqu instruction.
VMOVDQU xmm1, xmm2/m128
VEX.128.F3.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqu instruction.
VMOVDQU xmm2/m128, xmm1
VEX.128.F3.0F.WIG 7F /r
AVX
16/32/64-bit
vmovdqu instruction.
VMOVDQU ymm1, ymm2/m256
VEX.256.F3.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqu instruction.
VMOVDQU ymm2/m256, ymm1
VEX.256.F3.0F.WIG 7F /r
AVX
16/32/64-bit
vmovdqu instruction.
VMOVDQU xmm1, xmm2/m128
VEX.128.F3.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqu instruction.
VMOVDQU ymm1, ymm2/m256
VEX.256.F3.0F.WIG 6F /r
AVX
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F2.0F.W1 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F2.0F.W1 7F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W1 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F2.0F.W1 7F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W1 6F /r
AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F2.0F.W1 7F /r
AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F2.0F.W1 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W1 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu16 instruction.
VMOVDQU16 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W1 6F /r
AVX512BW
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F3.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F3.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 6F /r
AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F3.0F.W0 7F /r
AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu32 instruction.
VMOVDQU32 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 6F /r
AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F3.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F3.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W1 6F /r
AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F3.0F.W1 7F /r
AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
vmovdqu64 instruction.
VMOVDQU64 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W1 6F /r
AVX512F
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F2.0F.W0 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F2.0F.W0 7F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W0 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F2.0F.W0 7F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W0 6F /r
AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F2.0F.W0 7F /r
AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F2.0F.W0 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W0 6F /r
AVX512VL and AVX512BW
16/32/64-bit
vmovdqu8 instruction.
VMOVDQU8 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W0 6F /r
AVX512BW
16/32/64-bit
vmovhlps instruction.
VMOVHLPS xmm1, xmm2, xmm3
VEX.128.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVHLPS xmm1, xmm2, xmm3
EVEX.128.0F.W0 12 /r
AVX512F
16/32/64-bit
vmovhpd instruction.
VMOVHPD m64, xmm1
VEX.128.66.0F.WIG 17 /r
AVX
16/32/64-bit
VMOVHPD m64, xmm1
EVEX.128.66.0F.W1 17 /r
AVX512F
16/32/64-bit
vmovhpd instruction.
VMOVHPD xmm2, xmm1, m64
VEX.128.66.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVHPD xmm2, xmm1, m64
EVEX.128.66.0F.W1 16 /r
AVX512F
16/32/64-bit
vmovhps instruction.
VMOVHPS m64, xmm1
VEX.128.0F.WIG 17 /r
AVX
16/32/64-bit
VMOVHPS m64, xmm1
EVEX.128.0F.W0 17 /r
AVX512F
16/32/64-bit
vmovhps instruction.
VMOVHPS xmm2, xmm1, m64
VEX.128.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVHPS xmm2, xmm1, m64
EVEX.128.0F.W0 16 /r
AVX512F
16/32/64-bit
vmovlhps instruction.
VMOVLHPS xmm1, xmm2, xmm3
VEX.128.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVLHPS xmm1, xmm2, xmm3
EVEX.128.0F.W0 16 /r
AVX512F
16/32/64-bit
vmovlpd instruction.
VMOVLPD m64, xmm1
VEX.128.66.0F.WIG 13 /r
AVX
16/32/64-bit
VMOVLPD m64, xmm1
EVEX.128.66.0F.W1 13 /r
AVX512F
16/32/64-bit
vmovlpd instruction.
VMOVLPD xmm2, xmm1, m64
VEX.128.66.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVLPD xmm2, xmm1, m64
EVEX.128.66.0F.W1 12 /r
AVX512F
16/32/64-bit
vmovlps instruction.
VMOVLPS m64, xmm1
VEX.128.0F.WIG 13 /r
AVX
16/32/64-bit
VMOVLPS m64, xmm1
EVEX.128.0F.W0 13 /r
AVX512F
16/32/64-bit
vmovlps instruction.
VMOVLPS xmm2, xmm1, m64
VEX.128.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVLPS xmm2, xmm1, m64
EVEX.128.0F.W0 12 /r
AVX512F
16/32/64-bit
vmovmskpd instruction.
VMOVMSKPD r32, xmm2
VEX.128.66.0F.W0 50 /r
AVX
16/32/64-bit
vmovmskpd instruction.
VMOVMSKPD r64, xmm2
VEX.128.66.0F.W1 50 /r
AVX
64-bit
vmovmskpd instruction.
VMOVMSKPD r32, ymm2
VEX.256.66.0F.W0 50 /r
AVX
16/32/64-bit
vmovmskpd instruction.
VMOVMSKPD r64, ymm2
VEX.256.66.0F.W1 50 /r
AVX
64-bit
vmovmskps instruction.
VMOVMSKPS r32, xmm2
VEX.128.0F.W0 50 /r
AVX
16/32/64-bit
vmovmskps instruction.
VMOVMSKPS r64, xmm2
VEX.128.0F.W1 50 /r
AVX
64-bit
vmovmskps instruction.
VMOVMSKPS r32, ymm2
VEX.256.0F.W0 50 /r
AVX
16/32/64-bit
vmovmskps instruction.
VMOVMSKPS r64, ymm2
VEX.256.0F.W1 50 /r
AVX
64-bit
vmovntdq instruction.
VMOVNTDQ m128, xmm1
VEX.128.66.0F.WIG E7 /r
AVX
16/32/64-bit
VMOVNTDQ m128, xmm1
EVEX.128.66.0F.W0 E7 /r
AVX512VL and AVX512F
16/32/64-bit
vmovntdq instruction.
VMOVNTDQ m256, ymm1
VEX.256.66.0F.WIG E7 /r
AVX
16/32/64-bit
VMOVNTDQ m256, ymm1
EVEX.256.66.0F.W0 E7 /r
AVX512VL and AVX512F
16/32/64-bit
vmovntdq instruction.
VMOVNTDQ m512, zmm1
EVEX.512.66.0F.W0 E7 /r
AVX512F
16/32/64-bit
vmovntdqa instruction.
VMOVNTDQA xmm1, m128
VEX.128.66.0F38.WIG 2A /r
AVX
16/32/64-bit
VMOVNTDQA xmm1, m128
EVEX.128.66.0F38.W0 2A /r
AVX512VL and AVX512F
16/32/64-bit
vmovntdqa instruction.
VMOVNTDQA ymm1, m256
VEX.256.66.0F38.WIG 2A /r
AVX2
16/32/64-bit
VMOVNTDQA ymm1, m256
EVEX.256.66.0F38.W0 2A /r
AVX512VL and AVX512F
16/32/64-bit
vmovntdqa instruction.
VMOVNTDQA zmm1, m512
EVEX.512.66.0F38.W0 2A /r
AVX512F
16/32/64-bit
vmovntpd instruction.
VMOVNTPD m128, xmm1
VEX.128.66.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPD m128, xmm1
EVEX.128.66.0F.W1 2B /r
AVX512VL and AVX512F
16/32/64-bit
vmovntpd instruction.
VMOVNTPD m256, ymm1
VEX.256.66.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPD m256, ymm1
EVEX.256.66.0F.W1 2B /r
AVX512VL and AVX512F
16/32/64-bit
vmovntpd instruction.
VMOVNTPD m512, zmm1
EVEX.512.66.0F.W1 2B /r
AVX512F
16/32/64-bit
vmovntps instruction.
VMOVNTPS m128, xmm1
VEX.128.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPS m128, xmm1
EVEX.128.0F.W0 2B /r
AVX512VL and AVX512F
16/32/64-bit
vmovntps instruction.
VMOVNTPS m256, ymm1
VEX.256.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPS m256, ymm1
EVEX.256.0F.W0 2B /r
AVX512VL and AVX512F
16/32/64-bit
vmovntps instruction.
VMOVNTPS m512, zmm1
EVEX.512.0F.W0 2B /r
AVX512F
16/32/64-bit
vmovq instruction.
VMOVQ xmm1, r/m64
VEX.128.66.0F.W1 6E /r
AVX
64-bit
VMOVQ xmm1, r/m64
EVEX.128.66.0F.W1 6E /r
AVX512F
64-bit
vmovq instruction.
VMOVQ r/m64, xmm1
VEX.128.66.0F.W1 7E /r
AVX
64-bit
VMOVQ r/m64, xmm1
EVEX.128.66.0F.W1 7E /r
AVX512F
64-bit
vmovq instruction.
VMOVQ xmm1, xmm2/m64
VEX.128.F3.0F.WIG 7E /r
AVX
16/32/64-bit
VMOVQ xmm1, xmm2/m64
EVEX.128.F3.0F.W1 7E /r
AVX512F
16/32/64-bit
vmovq instruction.
VMOVQ xmm1/m64, xmm2
VEX.128.66.0F.WIG D6 /r
AVX
16/32/64-bit
VMOVQ xmm1/m64, xmm2
EVEX.128.66.0F.W1 D6 /r
AVX512F
16/32/64-bit
vmovq instruction.
VMOVQ xmm1, xmm2/m64
VEX.128.F3.0F.WIG 7E /r
AVX
16/32/64-bit
VMOVQ xmm1, xmm2/m64
EVEX.128.F3.0F.W1 7E /r
AVX512F
16/32/64-bit
vmovsd instruction.
VMOVSD m64, xmm1
VEX.LIG.F2.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVSD m64 {k1}, xmm1
EVEX.LIG.F2.0F.W1 11 /r
AVX512F
16/32/64-bit
vmovsd instruction.
VMOVSD xmm1, m64
VEX.LIG.F2.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSD xmm1 {k1}{z}, m64
EVEX.LIG.F2.0F.W1 10 /r
AVX512F
16/32/64-bit
vmovsd instruction.
VMOVSD xmm1, xmm2, xmm3
VEX.LIG.F2.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSD xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F2.0F.W1 10 /r
AVX512F
16/32/64-bit
vmovsh instruction.
VMOVSH m16 {k1}, xmm1
EVEX.LIG.F3.MAP5.W0 11 /r
AVX512-FP16
16/32/64-bit
vmovsh instruction.
VMOVSH xmm1 {k1}{z}, m16
EVEX.LIG.F3.MAP5.W0 10 /r
AVX512-FP16
16/32/64-bit
vmovsh instruction.
VMOVSH xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F3.MAP5.W0 10 /r
AVX512-FP16
16/32/64-bit
vmovshdup instruction.
VMOVSHDUP xmm1, xmm2/m128
VEX.128.F3.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVSHDUP xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
vmovshdup instruction.
VMOVSHDUP ymm1, ymm2/m256
VEX.256.F3.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVSHDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
vmovshdup instruction.
VMOVSHDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 16 /r
AVX512F
16/32/64-bit
vmovshdup instruction.
VMOVSHDUP xmm1, xmm2/m128
VEX.128.F3.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVSHDUP xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
vmovshdup instruction.
VMOVSHDUP ymm1, ymm2/m256
VEX.256.F3.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVSHDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
vmovshdup instruction.
VMOVSHDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 16 /r
AVX512F
16/32/64-bit
vmovsldup instruction.
VMOVSLDUP xmm1, xmm2/m128
VEX.128.F3.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVSLDUP xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovsldup instruction.
VMOVSLDUP ymm1, ymm2/m256
VEX.256.F3.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVSLDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovsldup instruction.
VMOVSLDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 12 /r
AVX512F
16/32/64-bit
vmovsldup instruction.
VMOVSLDUP xmm1, xmm2/m128
VEX.128.F3.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVSLDUP xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovsldup instruction.
VMOVSLDUP ymm1, ymm2/m256
VEX.256.F3.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVSLDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vmovsldup instruction.
VMOVSLDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 12 /r
AVX512F
16/32/64-bit
vmovss instruction.
VMOVSS m32, xmm1
VEX.LIG.F3.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVSS m32 {k1}, xmm1
EVEX.LIG.F3.0F.W0 11 /r
AVX512F
16/32/64-bit
vmovss instruction.
VMOVSS xmm1, m32
VEX.LIG.F3.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSS xmm1 {k1}{z}, m32
EVEX.LIG.F3.0F.W0 10 /r
AVX512F
16/32/64-bit
vmovss instruction.
VMOVSS xmm1, xmm2, xmm3
VEX.LIG.F3.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSS xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F3.0F.W0 10 /r
AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD xmm2/m128, xmm1
VEX.128.66.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPD xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W1 11 /r
AVX512VL and AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD ymm2/m256, ymm1
VEX.256.66.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPD ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W1 11 /r
AVX512VL and AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 10 /r
AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W1 11 /r
AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovupd instruction.
VMOVUPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 10 /r
AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS xmm1, xmm2/m128
VEX.128.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.0F.W0 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS xmm2/m128, xmm1
VEX.128.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPS xmm2/m128 {k1}{z}, xmm1
EVEX.128.0F.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS ymm1, ymm2/m256
VEX.256.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.0F.W0 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS ymm2/m256, ymm1
VEX.256.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPS ymm2/m256 {k1}{z}, ymm1
EVEX.256.0F.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.0F.W0 10 /r
AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS zmm2/m512 {k1}{z}, zmm1
EVEX.512.0F.W0 11 /r
AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS xmm1, xmm2/m128
VEX.128.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.0F.W0 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS ymm1, ymm2/m256
VEX.256.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.0F.W0 10 /r
AVX512VL and AVX512F
16/32/64-bit
vmovups instruction.
VMOVUPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.0F.W0 10 /r
AVX512F
16/32/64-bit
vmovw instruction.
VMOVW xmm1, r32/m16
EVEX.128.66.MAP5.W0 6E /r
AVX512-FP16
16/32/64-bit
vmovw instruction.
VMOVW xmm1, r64/m16
EVEX.128.66.MAP5.W1 6E /r
AVX512-FP16
64-bit
vmovw instruction.
VMOVW r32/m16, xmm1
EVEX.128.66.MAP5.W0 7E /r
AVX512-FP16
16/32/64-bit
vmovw instruction.
VMOVW r64/m16, xmm1
EVEX.128.66.MAP5.W1 7E /r
AVX512-FP16
64-bit
vmovw instruction.
VMOVW r32/m16, xmm1
EVEX.128.66.MAP5.W0 7E /r
AVX512-FP16
16/32/64-bit
vmovw instruction.
VMOVW xmm1, r32/m16
EVEX.128.66.MAP5.W0 6E /r
AVX512-FP16
16/32/64-bit
vmpsadbw instruction.
VMPSADBW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 42 /r ib
AVX
16/32/64-bit
vmpsadbw instruction.
VMPSADBW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 42 /r ib
AVX2
16/32/64-bit
vmpsadbw instruction.
VMPSADBW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 42 /r ib
AVX
16/32/64-bit
vmpsadbw instruction.
VMPSADBW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 42 /r ib
AVX2
16/32/64-bit
vmpsadbw instruction.
VMPSADBW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 42 /r ib
AVX
16/32/64-bit
vmpsadbw instruction.
VMPSADBW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 42 /r ib
AVX2
16/32/64-bit
vmpsadbw instruction.
VMPSADBW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 42 /r ib
AVX
16/32/64-bit
vmpsadbw instruction.
VMPSADBW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 42 /r ib
AVX2
16/32/64-bit
vmptrld instruction.
VMPTRLD m64
NP 0F C7 /6
VMX
16/32/64-bit
vmptrst instruction.
VMPTRST m64
NP 0F C7 /7
VMX
16/32/64-bit
vmread instruction.
VMREAD r/m32, r32
NP 0F 78 /r
VMX
16/32-bit
vmread instruction.
VMREAD r/m32, r32
NP 0F 78 /r
VMX
16/32-bit
vmread instruction.
VMREAD r/m64, r64
NP 0F 78 /r
VMX
64-bit
vmread instruction.
VMREAD r/m64, r64
NP 0F 78 /r
VMX
64-bit
vmresume instruction.
VMRESUME
NP 0F 01 C3
VMX
16/32/64-bit
vmrun instruction.
VMRUN
a64 0F 01 D8
SVM
64-bit
VMRUN
a32 0F 01 D8
SVM
16/32/64-bit
VMRUN
a16 0F 01 D8
SVM
16/32-bit
vmsave instruction.
VMSAVE
a64 0F 01 DB
SVM
64-bit
VMSAVE
a32 0F 01 DB
SVM
16/32/64-bit
VMSAVE
a16 0F 01 DB
SVM
16/32-bit
vmulpd instruction.
VMULPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulpd instruction.
VMULPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulpd instruction.
VMULPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 59 /r
AVX512F
16/32/64-bit
vmulpd instruction.
VMULPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulpd instruction.
VMULPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulpd instruction.
VMULPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 59 /r
AVX512F
16/32/64-bit
vmulph instruction.
VMULPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 59 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmulph instruction.
VMULPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 59 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmulph instruction.
VMULPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 59 /r
AVX512-FP16
16/32/64-bit
vmulph instruction.
VMULPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 59 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmulph instruction.
VMULPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 59 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vmulph instruction.
VMULPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 59 /r
AVX512-FP16
16/32/64-bit
vmulps instruction.
VMULPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulps instruction.
VMULPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulps instruction.
VMULPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 59 /r
AVX512F
16/32/64-bit
vmulps instruction.
VMULPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulps instruction.
VMULPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 59 /r
AVX512VL and AVX512F
16/32/64-bit
vmulps instruction.
VMULPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 59 /r
AVX512F
16/32/64-bit
vmulsd instruction.
VMULSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 59 /r
AVX
16/32/64-bit
VMULSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 59 /r
AVX512F
16/32/64-bit
vmulsd instruction.
VMULSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 59 /r
AVX
16/32/64-bit
VMULSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 59 /r
AVX512F
16/32/64-bit
vmulsh instruction.
VMULSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 59 /r
AVX512-FP16
16/32/64-bit
vmulsh instruction.
VMULSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 59 /r
AVX512-FP16
16/32/64-bit
vmulss instruction.
VMULSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 59 /r
AVX
16/32/64-bit
VMULSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 59 /r
AVX512F
16/32/64-bit
vmulss instruction.
VMULSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 59 /r
AVX
16/32/64-bit
VMULSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 59 /r
AVX512F
16/32/64-bit
vmwrite instruction.
VMWRITE r32, r/m32
NP 0F 79 /r
VMX
16/32-bit
vmwrite instruction.
VMWRITE r64, r/m64
NP 0F 79 /r
VMX
64-bit
vmwrite instruction.
VMWRITE r32, r/m32
NP 0F 79 /r
VMX
16/32-bit
vmwrite instruction.
VMWRITE r64, r/m64
NP 0F 79 /r
VMX
64-bit
vmxoff instruction.
VMXOFF
NP 0F 01 C4
VMX
16/32/64-bit
vmxon instruction.
VMXON m64
F3 0F C7 /6
VMX
16/32/64-bit
vorpd instruction.
VORPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 56 /r
AVX
16/32/64-bit
VORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorpd instruction.
VORPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 56 /r
AVX
16/32/64-bit
VORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorpd instruction.
VORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 56 /r
AVX512DQ
16/32/64-bit
vorpd instruction.
VORPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 56 /r
AVX
16/32/64-bit
VORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorpd instruction.
VORPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 56 /r
AVX
16/32/64-bit
VORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorpd instruction.
VORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 56 /r
AVX512DQ
16/32/64-bit
vorps instruction.
VORPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 56 /r
AVX
16/32/64-bit
VORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorps instruction.
VORPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 56 /r
AVX
16/32/64-bit
VORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorps instruction.
VORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 56 /r
AVX512DQ
16/32/64-bit
vorps instruction.
VORPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 56 /r
AVX
16/32/64-bit
VORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorps instruction.
VORPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 56 /r
AVX
16/32/64-bit
VORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
vorps instruction.
VORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 56 /r
AVX512DQ
16/32/64-bit
vp2intersectd instruction.
VP2INTERSECTD k1+1, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.0F38.W0 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectd instruction.
VP2INTERSECTD k1+1, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.0F38.W0 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectd instruction.
VP2INTERSECTD k1+1, zmm2, zmm3/m512/m32bcst
EVEX.512.F2.0F38.W0 68 /r
AVX512F and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectd instruction.
VP2INTERSECTD k1+1, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.0F38.W0 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectd instruction.
VP2INTERSECTD k1+1, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.0F38.W0 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectd instruction.
VP2INTERSECTD k1+1, zmm2, zmm3/m512/m32bcst
EVEX.512.F2.0F38.W0 68 /r
AVX512F and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectq instruction.
VP2INTERSECTQ k1+1, xmm2, xmm3/m128/m64bcst
EVEX.128.F2.0F38.W1 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectq instruction.
VP2INTERSECTQ k1+1, ymm2, ymm3/m256/m64bcst
EVEX.256.F2.0F38.W1 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectq instruction.
VP2INTERSECTQ k1+1, zmm2, zmm3/m512/m64bcst
EVEX.512.F2.0F38.W1 68 /r
AVX512F and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectq instruction.
VP2INTERSECTQ k1+1, xmm2, xmm3/m128/m64bcst
EVEX.128.F2.0F38.W1 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectq instruction.
VP2INTERSECTQ k1+1, ymm2, ymm3/m256/m64bcst
EVEX.256.F2.0F38.W1 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
vp2intersectq instruction.
VP2INTERSECTQ k1+1, zmm2, zmm3/m512/m64bcst
EVEX.512.F2.0F38.W1 68 /r
AVX512F and AVX512_VP2INTERSECT
16/32/64-bit
vp4dpwssd instruction.
VP4DPWSSD zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 52 /r
AVX512_4VNNIW
16/32/64-bit
vp4dpwssds instruction.
VP4DPWSSDS zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 53 /r
AVX512_4VNNIW
16/32/64-bit
vpabsb instruction.
VPABSB xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1C /r
AVX
16/32/64-bit
VPABSB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.WIG 1C /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsb instruction.
VPABSB ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1C /r
AVX2
16/32/64-bit
VPABSB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.WIG 1C /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsb instruction.
VPABSB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.WIG 1C /r
AVX512BW
16/32/64-bit
vpabsb instruction.
VPABSB xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1C /r
AVX
16/32/64-bit
VPABSB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.WIG 1C /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsb instruction.
VPABSB ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1C /r
AVX2
16/32/64-bit
VPABSB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.WIG 1C /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsb instruction.
VPABSB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.WIG 1C /r
AVX512BW
16/32/64-bit
vpabsd instruction.
VPABSD xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1E /r
AVX
16/32/64-bit
VPABSD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 1E /r
AVX512VL and AVX512F
16/32/64-bit
vpabsd instruction.
VPABSD ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1E /r
AVX2
16/32/64-bit
VPABSD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 1E /r
AVX512VL and AVX512F
16/32/64-bit
vpabsd instruction.
VPABSD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 1E /r
AVX512F
16/32/64-bit
vpabsd instruction.
VPABSD xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1E /r
AVX
16/32/64-bit
VPABSD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 1E /r
AVX512VL and AVX512F
16/32/64-bit
vpabsd instruction.
VPABSD ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1E /r
AVX2
16/32/64-bit
VPABSD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 1E /r
AVX512VL and AVX512F
16/32/64-bit
vpabsd instruction.
VPABSD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 1E /r
AVX512F
16/32/64-bit
vpabsq instruction.
VPABSQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 1F /r
AVX512VL and AVX512F
16/32/64-bit
vpabsq instruction.
VPABSQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 1F /r
AVX512VL and AVX512F
16/32/64-bit
vpabsq instruction.
VPABSQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 1F /r
AVX512F
16/32/64-bit
vpabsq instruction.
VPABSQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 1F /r
AVX512VL and AVX512F
16/32/64-bit
vpabsq instruction.
VPABSQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 1F /r
AVX512VL and AVX512F
16/32/64-bit
vpabsq instruction.
VPABSQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 1F /r
AVX512F
16/32/64-bit
vpabsw instruction.
VPABSW xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1D /r
AVX
16/32/64-bit
VPABSW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.WIG 1D /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsw instruction.
VPABSW ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1D /r
AVX2
16/32/64-bit
VPABSW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.WIG 1D /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsw instruction.
VPABSW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.WIG 1D /r
AVX512BW
16/32/64-bit
vpabsw instruction.
VPABSW xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1D /r
AVX
16/32/64-bit
VPABSW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.WIG 1D /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsw instruction.
VPABSW ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1D /r
AVX2
16/32/64-bit
VPABSW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.WIG 1D /r
AVX512VL and AVX512BW
16/32/64-bit
vpabsw instruction.
VPABSW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.WIG 1D /r
AVX512BW
16/32/64-bit
vpackssdw instruction.
VPACKSSDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6B /r
AVX
16/32/64-bit
VPACKSSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 6B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackssdw instruction.
VPACKSSDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6B /r
AVX2
16/32/64-bit
VPACKSSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 6B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackssdw instruction.
VPACKSSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 6B /r
AVX512BW
16/32/64-bit
vpackssdw instruction.
VPACKSSDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6B /r
AVX
16/32/64-bit
VPACKSSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 6B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackssdw instruction.
VPACKSSDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6B /r
AVX2
16/32/64-bit
VPACKSSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 6B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackssdw instruction.
VPACKSSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 6B /r
AVX512BW
16/32/64-bit
vpacksswb instruction.
VPACKSSWB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 63 /r
AVX
16/32/64-bit
VPACKSSWB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 63 /r
AVX512VL and AVX512BW
16/32/64-bit
vpacksswb instruction.
VPACKSSWB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 63 /r
AVX2
16/32/64-bit
VPACKSSWB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 63 /r
AVX512VL and AVX512BW
16/32/64-bit
vpacksswb instruction.
VPACKSSWB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 63 /r
AVX512BW
16/32/64-bit
vpacksswb instruction.
VPACKSSWB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 63 /r
AVX
16/32/64-bit
VPACKSSWB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 63 /r
AVX512VL and AVX512BW
16/32/64-bit
vpacksswb instruction.
VPACKSSWB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 63 /r
AVX2
16/32/64-bit
VPACKSSWB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 63 /r
AVX512VL and AVX512BW
16/32/64-bit
vpacksswb instruction.
VPACKSSWB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 63 /r
AVX512BW
16/32/64-bit
vpackusdw instruction.
VPACKUSDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 2B /r
AVX
16/32/64-bit
VPACKUSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 2B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackusdw instruction.
VPACKUSDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 2B /r
AVX2
16/32/64-bit
VPACKUSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 2B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackusdw instruction.
VPACKUSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 2B /r
AVX512BW
16/32/64-bit
vpackusdw instruction.
VPACKUSDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 2B /r
AVX
16/32/64-bit
VPACKUSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 2B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackusdw instruction.
VPACKUSDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 2B /r
AVX2
16/32/64-bit
VPACKUSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 2B /r
AVX512VL and AVX512BW
16/32/64-bit
vpackusdw instruction.
VPACKUSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 2B /r
AVX512BW
16/32/64-bit
vpackuswb instruction.
VPACKUSWB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 67 /r
AVX
16/32/64-bit
VPACKUSWB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 67 /r
AVX512VL and AVX512BW
16/32/64-bit
vpackuswb instruction.
VPACKUSWB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 67 /r
AVX2
16/32/64-bit
VPACKUSWB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 67 /r
AVX512VL and AVX512BW
16/32/64-bit
vpackuswb instruction.
VPACKUSWB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 67 /r
AVX512BW
16/32/64-bit
vpackuswb instruction.
VPACKUSWB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 67 /r
AVX
16/32/64-bit
VPACKUSWB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 67 /r
AVX512VL and AVX512BW
16/32/64-bit
vpackuswb instruction.
VPACKUSWB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 67 /r
AVX2
16/32/64-bit
VPACKUSWB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 67 /r
AVX512VL and AVX512BW
16/32/64-bit
vpackuswb instruction.
VPACKUSWB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 67 /r
AVX512BW
16/32/64-bit
vpaddb instruction.
VPADDB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FC /r
AVX
16/32/64-bit
VPADDB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG FC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddb instruction.
VPADDB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FC /r
AVX2
16/32/64-bit
VPADDB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG FC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddb instruction.
VPADDB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG FC /r
AVX512BW
16/32/64-bit
vpaddb instruction.
VPADDB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FC /r
AVX
16/32/64-bit
VPADDB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG FC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddb instruction.
VPADDB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FC /r
AVX2
16/32/64-bit
VPADDB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG FC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddb instruction.
VPADDB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG FC /r
AVX512BW
16/32/64-bit
vpaddd instruction.
VPADDD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FE /r
AVX
16/32/64-bit
VPADDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 FE /r
AVX512VL and AVX512F
16/32/64-bit
vpaddd instruction.
VPADDD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FE /r
AVX2
16/32/64-bit
VPADDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 FE /r
AVX512VL and AVX512F
16/32/64-bit
vpaddd instruction.
VPADDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 FE /r
AVX512F
16/32/64-bit
vpaddd instruction.
VPADDD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FE /r
AVX
16/32/64-bit
VPADDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 FE /r
AVX512VL and AVX512F
16/32/64-bit
vpaddd instruction.
VPADDD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FE /r
AVX2
16/32/64-bit
VPADDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 FE /r
AVX512VL and AVX512F
16/32/64-bit
vpaddd instruction.
VPADDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 FE /r
AVX512F
16/32/64-bit
vpaddq instruction.
VPADDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D4 /r
AVX
16/32/64-bit
VPADDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 D4 /r
AVX512VL and AVX512F
16/32/64-bit
vpaddq instruction.
VPADDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D4 /r
AVX2
16/32/64-bit
VPADDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 D4 /r
AVX512VL and AVX512F
16/32/64-bit
vpaddq instruction.
VPADDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 D4 /r
AVX512F
16/32/64-bit
vpaddq instruction.
VPADDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D4 /r
AVX
16/32/64-bit
VPADDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 D4 /r
AVX512VL and AVX512F
16/32/64-bit
vpaddq instruction.
VPADDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D4 /r
AVX2
16/32/64-bit
VPADDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 D4 /r
AVX512VL and AVX512F
16/32/64-bit
vpaddq instruction.
VPADDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 D4 /r
AVX512F
16/32/64-bit
vpaddsb instruction.
VPADDSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EC /r
AVX
16/32/64-bit
VPADDSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsb instruction.
VPADDSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EC /r
AVX2
16/32/64-bit
VPADDSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsb instruction.
VPADDSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EC /r
AVX512BW
16/32/64-bit
vpaddsb instruction.
VPADDSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EC /r
AVX
16/32/64-bit
VPADDSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsb instruction.
VPADDSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EC /r
AVX2
16/32/64-bit
VPADDSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsb instruction.
VPADDSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EC /r
AVX512BW
16/32/64-bit
vpaddsw instruction.
VPADDSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG ED /r
AVX
16/32/64-bit
VPADDSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG ED /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsw instruction.
VPADDSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG ED /r
AVX2
16/32/64-bit
VPADDSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG ED /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsw instruction.
VPADDSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG ED /r
AVX512BW
16/32/64-bit
vpaddsw instruction.
VPADDSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG ED /r
AVX
16/32/64-bit
VPADDSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG ED /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsw instruction.
VPADDSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG ED /r
AVX2
16/32/64-bit
VPADDSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG ED /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddsw instruction.
VPADDSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG ED /r
AVX512BW
16/32/64-bit
vpaddusb instruction.
VPADDUSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DC /r
AVX
16/32/64-bit
VPADDUSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusb instruction.
VPADDUSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DC /r
AVX2
16/32/64-bit
VPADDUSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusb instruction.
VPADDUSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DC /r
AVX512BW
16/32/64-bit
vpaddusb instruction.
VPADDUSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DC /r
AVX
16/32/64-bit
VPADDUSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusb instruction.
VPADDUSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DC /r
AVX2
16/32/64-bit
VPADDUSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DC /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusb instruction.
VPADDUSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DC /r
AVX512BW
16/32/64-bit
vpaddusw instruction.
VPADDUSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DD /r
AVX
16/32/64-bit
VPADDUSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusw instruction.
VPADDUSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DD /r
AVX2
16/32/64-bit
VPADDUSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusw instruction.
VPADDUSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DD /r
AVX512BW
16/32/64-bit
vpaddusw instruction.
VPADDUSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DD /r
AVX
16/32/64-bit
VPADDUSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusw instruction.
VPADDUSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DD /r
AVX2
16/32/64-bit
VPADDUSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddusw instruction.
VPADDUSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DD /r
AVX512BW
16/32/64-bit
vpaddw instruction.
VPADDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FD /r
AVX
16/32/64-bit
VPADDW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG FD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddw instruction.
VPADDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FD /r
AVX2
16/32/64-bit
VPADDW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG FD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddw instruction.
VPADDW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG FD /r
AVX512BW
16/32/64-bit
vpaddw instruction.
VPADDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FD /r
AVX
16/32/64-bit
VPADDW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG FD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddw instruction.
VPADDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FD /r
AVX2
16/32/64-bit
VPADDW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG FD /r
AVX512VL and AVX512BW
16/32/64-bit
vpaddw instruction.
VPADDW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG FD /r
AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0F /r ib
AVX
16/32/64-bit
VPALIGNR xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0F /r ib
AVX2
16/32/64-bit
VPALIGNR ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 0F /r ib
AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0F /r ib
AVX
16/32/64-bit
VPALIGNR xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0F /r ib
AVX2
16/32/64-bit
VPALIGNR ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 0F /r ib
AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0F /r ib
AVX
16/32/64-bit
VPALIGNR xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0F /r ib
AVX2
16/32/64-bit
VPALIGNR ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 0F /r ib
AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0F /r ib
AVX
16/32/64-bit
VPALIGNR xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0F /r ib
AVX2
16/32/64-bit
VPALIGNR ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpalignr instruction.
VPALIGNR zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 0F /r ib
AVX512BW
16/32/64-bit
vpand instruction.
VPAND xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DB /r
AVX
16/32/64-bit
vpand instruction.
VPAND ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DB /r
AVX2
16/32/64-bit
vpand instruction.
VPAND xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DB /r
AVX
16/32/64-bit
vpand instruction.
VPAND ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DB /r
AVX2
16/32/64-bit
vpandd instruction.
VPANDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandd instruction.
VPANDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandd instruction.
VPANDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 DB /r
AVX512F
16/32/64-bit
vpandd instruction.
VPANDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandd instruction.
VPANDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandd instruction.
VPANDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 DB /r
AVX512F
16/32/64-bit
vpandn instruction.
VPANDN xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DF /r
AVX
16/32/64-bit
vpandn instruction.
VPANDN ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DF /r
AVX2
16/32/64-bit
vpandn instruction.
VPANDN xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DF /r
AVX
16/32/64-bit
vpandn instruction.
VPANDN ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DF /r
AVX2
16/32/64-bit
vpandnd instruction.
VPANDND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnd instruction.
VPANDND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnd instruction.
VPANDND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 DF /r
AVX512F
16/32/64-bit
vpandnd instruction.
VPANDND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnd instruction.
VPANDND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnd instruction.
VPANDND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 DF /r
AVX512F
16/32/64-bit
vpandnq instruction.
VPANDNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnq instruction.
VPANDNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnq instruction.
VPANDNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 DF /r
AVX512F
16/32/64-bit
vpandnq instruction.
VPANDNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnq instruction.
VPANDNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 DF /r
AVX512VL and AVX512F
16/32/64-bit
vpandnq instruction.
VPANDNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 DF /r
AVX512F
16/32/64-bit
vpandq instruction.
VPANDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandq instruction.
VPANDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandq instruction.
VPANDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 DB /r
AVX512F
16/32/64-bit
vpandq instruction.
VPANDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandq instruction.
VPANDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 DB /r
AVX512VL and AVX512F
16/32/64-bit
vpandq instruction.
VPANDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 DB /r
AVX512F
16/32/64-bit
vpavgb instruction.
VPAVGB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E0 /r
AVX
16/32/64-bit
VPAVGB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E0 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgb instruction.
VPAVGB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E0 /r
AVX2
16/32/64-bit
VPAVGB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E0 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgb instruction.
VPAVGB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E0 /r
AVX512BW
16/32/64-bit
vpavgb instruction.
VPAVGB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E0 /r
AVX
16/32/64-bit
VPAVGB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E0 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgb instruction.
VPAVGB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E0 /r
AVX2
16/32/64-bit
VPAVGB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E0 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgb instruction.
VPAVGB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E0 /r
AVX512BW
16/32/64-bit
vpavgw instruction.
VPAVGW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E3 /r
AVX
16/32/64-bit
VPAVGW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E3 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgw instruction.
VPAVGW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E3 /r
AVX2
16/32/64-bit
VPAVGW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E3 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgw instruction.
VPAVGW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E3 /r
AVX512BW
16/32/64-bit
vpavgw instruction.
VPAVGW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E3 /r
AVX
16/32/64-bit
VPAVGW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E3 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgw instruction.
VPAVGW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E3 /r
AVX2
16/32/64-bit
VPAVGW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E3 /r
AVX512VL and AVX512BW
16/32/64-bit
vpavgw instruction.
VPAVGW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E3 /r
AVX512BW
16/32/64-bit
vpblendd instruction.
VPBLENDD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendd instruction.
VPBLENDD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendd instruction.
VPBLENDD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendd instruction.
VPBLENDD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendd instruction.
VPBLENDD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendd instruction.
VPBLENDD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendd instruction.
VPBLENDD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendd instruction.
VPBLENDD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
vpblendmb instruction.
VPBLENDMB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmb instruction.
VPBLENDMB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmb instruction.
VPBLENDMB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 66 /r
AVX512BW
16/32/64-bit
vpblendmb instruction.
VPBLENDMB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmb instruction.
VPBLENDMB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmb instruction.
VPBLENDMB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 66 /r
AVX512BW
16/32/64-bit
vpblendmd instruction.
VPBLENDMD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmd instruction.
VPBLENDMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmd instruction.
VPBLENDMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 64 /r
AVX512F
16/32/64-bit
vpblendmd instruction.
VPBLENDMD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmd instruction.
VPBLENDMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmd instruction.
VPBLENDMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 64 /r
AVX512F
16/32/64-bit
vpblendmq instruction.
VPBLENDMQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmq instruction.
VPBLENDMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmq instruction.
VPBLENDMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 64 /r
AVX512F
16/32/64-bit
vpblendmq instruction.
VPBLENDMQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmq instruction.
VPBLENDMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 64 /r
AVX512VL and AVX512F
16/32/64-bit
vpblendmq instruction.
VPBLENDMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 64 /r
AVX512F
16/32/64-bit
vpblendmw instruction.
VPBLENDMW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmw instruction.
VPBLENDMW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmw instruction.
VPBLENDMW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 66 /r
AVX512BW
16/32/64-bit
vpblendmw instruction.
VPBLENDMW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmw instruction.
VPBLENDMW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 66 /r
AVX512VL and AVX512BW
16/32/64-bit
vpblendmw instruction.
VPBLENDMW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 66 /r
AVX512BW
16/32/64-bit
vpblendvb instruction.
VPBLENDVB xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4C /r /is4
AVX
16/32/64-bit
vpblendvb instruction.
VPBLENDVB xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4C /r /is4
AVX
16/32/64-bit
vpblendvb instruction.
VPBLENDVB ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4C /r /is4
AVX2
16/32/64-bit
vpblendvb instruction.
VPBLENDVB ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4C /r /is4
AVX2
16/32/64-bit
vpblendw instruction.
VPBLENDW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0E /r ib
AVX
16/32/64-bit
vpblendw instruction.
VPBLENDW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0E /r ib
AVX2
16/32/64-bit
vpblendw instruction.
VPBLENDW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0E /r ib
AVX
16/32/64-bit
vpblendw instruction.
VPBLENDW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0E /r ib
AVX2
16/32/64-bit
vpblendw instruction.
VPBLENDW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0E /r ib
AVX
16/32/64-bit
vpblendw instruction.
VPBLENDW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0E /r ib
AVX2
16/32/64-bit
vpblendw instruction.
VPBLENDW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0E /r ib
AVX
16/32/64-bit
vpblendw instruction.
VPBLENDW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0E /r ib
AVX2
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB xmm1 {k1}{z}, r32
EVEX.128.66.0F38.W0 7A /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB ymm1 {k1}{z}, r32
EVEX.256.66.0F38.W0 7A /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB zmm1 {k1}{z}, r32
EVEX.512.66.0F38.W0 7A /r
AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB xmm1, xmm2/m8
VEX.128.66.0F38.W0 78 /r
AVX2
16/32/64-bit
VPBROADCASTB xmm1 {k1}{z}, xmm2/m8
EVEX.128.66.0F38.W0 78 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB ymm1, xmm2/m8
VEX.256.66.0F38.W0 78 /r
AVX2
16/32/64-bit
VPBROADCASTB ymm1 {k1}{z}, xmm2/m8
EVEX.256.66.0F38.W0 78 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB zmm1 {k1}{z}, xmm2/m8
EVEX.512.66.0F38.W0 78 /r
AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB xmm1, xmm2/m8
VEX.128.66.0F38.W0 78 /r
AVX2
16/32/64-bit
VPBROADCASTB xmm1 {k1}{z}, xmm2/m8
EVEX.128.66.0F38.W0 78 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB ymm1, xmm2/m8
VEX.256.66.0F38.W0 78 /r
AVX2
16/32/64-bit
VPBROADCASTB ymm1 {k1}{z}, xmm2/m8
EVEX.256.66.0F38.W0 78 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastb instruction.
VPBROADCASTB zmm1 {k1}{z}, xmm2/m8
EVEX.512.66.0F38.W0 78 /r
AVX512BW
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD xmm1 {k1}{z}, r32
EVEX.128.66.0F38.W0 7C /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD ymm1 {k1}{z}, r32
EVEX.256.66.0F38.W0 7C /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD zmm1 {k1}{z}, r32
EVEX.512.66.0F38.W0 7C /r
AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD xmm1, xmm2/m32
VEX.128.66.0F38.W0 58 /r
AVX2
16/32/64-bit
VPBROADCASTD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD ymm1, xmm2/m32
VEX.256.66.0F38.W0 58 /r
AVX2
16/32/64-bit
VPBROADCASTD ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD zmm1 {k1}{z}, xmm2/m32
EVEX.512.66.0F38.W0 58 /r
AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD xmm1, xmm2/m32
VEX.128.66.0F38.W0 58 /r
AVX2
16/32/64-bit
VPBROADCASTD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD ymm1, xmm2/m32
VEX.256.66.0F38.W0 58 /r
AVX2
16/32/64-bit
VPBROADCASTD ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastd instruction.
VPBROADCASTD zmm1 {k1}{z}, xmm2/m32
EVEX.512.66.0F38.W0 58 /r
AVX512F
16/32/64-bit
vpbroadcastmb2q instruction.
VPBROADCASTMB2Q xmm1, k1
EVEX.128.F3.0F38.W1 2A /r
AVX512VL and AVX512CD
16/32/64-bit
vpbroadcastmb2q instruction.
VPBROADCASTMB2Q ymm1, k1
EVEX.256.F3.0F38.W1 2A /r
AVX512VL and AVX512CD
16/32/64-bit
vpbroadcastmb2q instruction.
VPBROADCASTMB2Q zmm1, k1
EVEX.512.F3.0F38.W1 2A /r
AVX512CD
16/32/64-bit
vpbroadcastmw2d instruction.
VPBROADCASTMW2D xmm1, k1
EVEX.128.F3.0F38.W0 3A /r
AVX512VL and AVX512CD
16/32/64-bit
vpbroadcastmw2d instruction.
VPBROADCASTMW2D ymm1, k1
EVEX.256.F3.0F38.W0 3A /r
AVX512VL and AVX512CD
16/32/64-bit
vpbroadcastmw2d instruction.
VPBROADCASTMW2D zmm1, k1
EVEX.512.F3.0F38.W0 3A /r
AVX512CD
16/32/64-bit
vpbroadcastq instruction.
VPBROADCASTQ xmm1 {k1}{z}, r64
EVEX.128.66.0F38.W1 7C /r
AVX512VL and AVX512F
64-bit
vpbroadcastq instruction.
VPBROADCASTQ ymm1 {k1}{z}, r64
EVEX.256.66.0F38.W1 7C /r
AVX512VL and AVX512F
64-bit
vpbroadcastq instruction.
VPBROADCASTQ zmm1 {k1}{z}, r64
EVEX.512.66.0F38.W1 7C /r
AVX512F
64-bit
vpbroadcastq instruction.
VPBROADCASTQ xmm1, xmm2/m64
VEX.128.66.0F38.W0 59 /r
AVX2
16/32/64-bit
VPBROADCASTQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastq instruction.
VPBROADCASTQ ymm1, xmm2/m64
VEX.256.66.0F38.W0 59 /r
AVX2
16/32/64-bit
VPBROADCASTQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastq instruction.
VPBROADCASTQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W1 59 /r
AVX512F
16/32/64-bit
vpbroadcastq instruction.
VPBROADCASTQ xmm1, xmm2/m64
VEX.128.66.0F38.W0 59 /r
AVX2
16/32/64-bit
VPBROADCASTQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastq instruction.
VPBROADCASTQ ymm1, xmm2/m64
VEX.256.66.0F38.W0 59 /r
AVX2
16/32/64-bit
VPBROADCASTQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
vpbroadcastq instruction.
VPBROADCASTQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W1 59 /r
AVX512F
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW xmm1 {k1}{z}, r32
EVEX.128.66.0F38.W0 7B /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW ymm1 {k1}{z}, r32
EVEX.256.66.0F38.W0 7B /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW zmm1 {k1}{z}, r32
EVEX.512.66.0F38.W0 7B /r
AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW xmm1, xmm2/m16
VEX.128.66.0F38.W0 79 /r
AVX2
16/32/64-bit
VPBROADCASTW xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.W0 79 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW ymm1, xmm2/m16
VEX.256.66.0F38.W0 79 /r
AVX2
16/32/64-bit
VPBROADCASTW ymm1 {k1}{z}, xmm2/m16
EVEX.256.66.0F38.W0 79 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW zmm1 {k1}{z}, xmm2/m16
EVEX.512.66.0F38.W0 79 /r
AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW xmm1, xmm2/m16
VEX.128.66.0F38.W0 79 /r
AVX2
16/32/64-bit
VPBROADCASTW xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.W0 79 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW ymm1, xmm2/m16
VEX.256.66.0F38.W0 79 /r
AVX2
16/32/64-bit
VPBROADCASTW ymm1 {k1}{z}, xmm2/m16
EVEX.256.66.0F38.W0 79 /r
AVX512VL and AVX512BW
16/32/64-bit
vpbroadcastw instruction.
VPBROADCASTW zmm1 {k1}{z}, xmm2/m16
EVEX.512.66.0F38.W0 79 /r
AVX512BW
16/32/64-bit
vpclmulhqhqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqhqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqhqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmulhqhqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqhqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqhqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmulhqlqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqlqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqlqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmulhqlqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqlqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulhqlqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmullqhqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqhqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqhqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmullqhqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqhqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqhqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmullqlqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqlqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqlqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmullqlqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqlqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmullqlqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
vpclmulqdq instruction.
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
vpcmov instruction.
VPCMOV xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A2 /r /is4
XOP
16/32/64-bit
vpcmov instruction.
VPCMOV xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A2 /r /is4
XOP
16/32/64-bit
vpcmov instruction.
VPCMOV ymm1, ymm2, ymm3/m256, ymm4
XOP.256.X8.W0 A2 /r /is4
XOP
16/32/64-bit
vpcmov instruction.
VPCMOV ymm1, ymm2, ymm3/m256, ymm4
XOP.256.X8.W0 A2 /r /is4
XOP
16/32/64-bit
vpcmov instruction.
VPCMOV xmm1, xmm2, xmm3, xmm4/m128
XOP.128.X8.W1 A2 /r /is4
XOP
16/32/64-bit
vpcmov instruction.
VPCMOV ymm1, ymm2, ymm3, ymm4/m256
XOP.256.X8.W1 A2 /r /is4
XOP
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 74 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 74 /r
AVX
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 74 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 74 /r
AVX2
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 74 /r
AVX512BW
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 74 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 74 /r
AVX
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 74 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 74 /r
AVX2
16/32/64-bit
vpcmpeqb instruction.
VPCMPEQB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 74 /r
AVX512BW
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD k1 {k2}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 76 /r
AVX
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD k1 {k2}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 76 /r
AVX2
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD k1 {k2}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 76 /r
AVX512F
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD k1 {k2}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 76 /r
AVX
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD k1 {k2}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 76 /r
AVX2
16/32/64-bit
vpcmpeqd instruction.
VPCMPEQD k1 {k2}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 76 /r
AVX512F
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ k1 {k2}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 29 /r
AVX
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ k1 {k2}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 29 /r
AVX2
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ k1 {k2}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 29 /r
AVX512F
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ k1 {k2}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 29 /r
AVX
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ k1 {k2}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 29 /r
AVX2
16/32/64-bit
vpcmpeqq instruction.
VPCMPEQQ k1 {k2}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 29 /r
AVX512F
16/32/64-bit
vpcmpequb instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequb instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequb instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpequb instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequb instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequb instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpequd instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequd instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequd instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpequd instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequd instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequd instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpequq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpequq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpequq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpequw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpequw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpequw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 75 /r
AVX
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 75 /r
AVX2
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 75 /r
AVX512BW
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 75 /r
AVX
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 75 /r
AVX2
16/32/64-bit
vpcmpeqw instruction.
VPCMPEQW k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 75 /r
AVX512BW
16/32/64-bit
vpcmpestri instruction.
VPCMPESTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 61 /r ib
AVX
16/32/64-bit
vpcmpestri instruction.
VPCMPESTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 61 /r ib
AVX
16/32/64-bit
vpcmpestri instruction.
VPCMPESTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 61 /r ib
AVX
16/32/64-bit
vpcmpestri instruction.
VPCMPESTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 61 /r ib
AVX
16/32/64-bit
vpcmpestri64 instruction.
VPCMPESTRI64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 61 /r ib
AVX
64-bit
vpcmpestri64 instruction.
VPCMPESTRI64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 61 /r ib
AVX
64-bit
vpcmpestri64 instruction.
VPCMPESTRI64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 61 /r ib
AVX
64-bit
vpcmpestri64 instruction.
VPCMPESTRI64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 61 /r ib
AVX
64-bit
vpcmpestrm instruction.
VPCMPESTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 60 /r ib
AVX
16/32/64-bit
vpcmpestrm instruction.
VPCMPESTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 60 /r ib
AVX
16/32/64-bit
vpcmpestrm instruction.
VPCMPESTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 60 /r ib
AVX
16/32/64-bit
vpcmpestrm instruction.
VPCMPESTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 60 /r ib
AVX
16/32/64-bit
vpcmpestrm64 instruction.
VPCMPESTRM64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 60 /r ib
AVX
64-bit
vpcmpestrm64 instruction.
VPCMPESTRM64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 60 /r ib
AVX
64-bit
vpcmpestrm64 instruction.
VPCMPESTRM64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 60 /r ib
AVX
64-bit
vpcmpestrm64 instruction.
VPCMPESTRM64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 60 /r ib
AVX
64-bit
vpcmpfalseb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpfalseb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpfalsed instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalsed instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalsed instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpfalsed instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalsed instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalsed instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpfalseq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpfalseq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpfalseub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpfalseub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpfalseud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpfalseud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpfalseuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpfalseuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpfalseuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpfalseuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpfalseuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalseuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpfalsew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalsew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalsew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpfalsew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalsew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpfalsew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 64 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 64 /r
AVX
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 64 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 64 /r
AVX2
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 64 /r
AVX512BW
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 64 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 64 /r
AVX
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 64 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 64 /r
AVX2
16/32/64-bit
vpcmpgtb instruction.
VPCMPGTB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 64 /r
AVX512BW
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD k1 {k2}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 66 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 66 /r
AVX
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD k1 {k2}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 66 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 66 /r
AVX2
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD k1 {k2}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 66 /r
AVX512F
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD k1 {k2}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 66 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 66 /r
AVX
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD k1 {k2}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 66 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 66 /r
AVX2
16/32/64-bit
vpcmpgtd instruction.
VPCMPGTD k1 {k2}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 66 /r
AVX512F
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ k1 {k2}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 37 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 37 /r
AVX
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ k1 {k2}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 37 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 37 /r
AVX2
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ k1 {k2}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 37 /r
AVX512F
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ k1 {k2}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 37 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 37 /r
AVX
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ k1 {k2}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 37 /r
AVX512VL and AVX512F
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 37 /r
AVX2
16/32/64-bit
vpcmpgtq instruction.
VPCMPGTQ k1 {k2}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 37 /r
AVX512F
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 65 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 65 /r
AVX
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 65 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 65 /r
AVX2
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 65 /r
AVX512BW
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 65 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 65 /r
AVX
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 65 /r
AVX512VL and AVX512BW
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 65 /r
AVX2
16/32/64-bit
vpcmpgtw instruction.
VPCMPGTW k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 65 /r
AVX512BW
16/32/64-bit
vpcmpistri instruction.
VPCMPISTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 63 /r ib
AVX
16/32/64-bit
vpcmpistri instruction.
VPCMPISTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 63 /r ib
AVX
16/32/64-bit
vpcmpistri instruction.
VPCMPISTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 63 /r ib
AVX
16/32/64-bit
vpcmpistri instruction.
VPCMPISTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 63 /r ib
AVX
16/32/64-bit
vpcmpistrm instruction.
VPCMPISTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 62 /r ib
AVX
16/32/64-bit
vpcmpistrm instruction.
VPCMPISTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 62 /r ib
AVX
16/32/64-bit
vpcmpistrm instruction.
VPCMPISTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 62 /r ib
AVX
16/32/64-bit
vpcmpistrm instruction.
VPCMPISTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 62 /r ib
AVX
16/32/64-bit
vpcmpleb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpleb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpled instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpled instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpled instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpled instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpled instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpled instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpleq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpleq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpleub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpleub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpleud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpleud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpleuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpleuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpleuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpleuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpleuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpleuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmplew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmplew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmplew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmplew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmplew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmplew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpltb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpltb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpltd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpltd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpltq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpltq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpltub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpltub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpltud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpltud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpltuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpltuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpltuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpltuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpltuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpltw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpltw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpltw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpneqb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpneqb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpneqd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpneqd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpneqq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpneqq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpneqq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpnequb instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequb instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequb instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnequb instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequb instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequb instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnequd instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequd instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequd instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpnequd instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequd instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequd instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpnequq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpnequq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnequq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpnequw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnequw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnequw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpneqw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpneqw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpneqw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnleb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnleb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnled instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnled instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnled instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpnled instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnled instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnled instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpnleq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpnleq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpnleub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnleub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnleud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpnleud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpnleuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpnleuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnleuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpnleuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnleuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnleuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnlew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnlew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnlew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnlew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnlew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnlew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnltb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnltb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnltd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpnltd instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltd instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltd instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmpnltq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpnltq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpnltub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnltub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnltud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpnltud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpnltuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpnltuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpnltuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpnltuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnltuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpnltw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpnltw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpnltw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmptrueb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmptrueb instruction.
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueb instruction.
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueb instruction.
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
vpcmptrued instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrued instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrued instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmptrued instruction.
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrued instruction.
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrued instruction.
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
vpcmptrueq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmptrueq instruction.
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueq instruction.
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueq instruction.
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
vpcmptrueub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmptrueub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmptrueud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmptrueud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmptrueuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmptrueuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmptrueuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmptrueuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmptrueuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptrueuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmptruew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptruew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptruew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmptruew instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptruew instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmptruew instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpub instruction.
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpud instruction.
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
vpcmpuq instruction.
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpuw instruction.
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpcmpw instruction.
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
vpcomb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomeqb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomeqb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomeqd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomeqd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomeqq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomeqq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomequb instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomequb instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomequd instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomequd instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomequq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomequq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomequw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomequw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomeqw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomeqw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomfalseb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomfalseb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomfalsed instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomfalsed instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomfalseq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomfalseq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomfalseub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomfalseub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomfalseud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomfalseud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomfalseuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomfalseuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomfalseuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomfalseuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomfalsew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomfalsew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomgeb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomgeb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomged instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomged instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomgeq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomgeq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomgeub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomgeub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomgeud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomgeud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomgeuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomgeuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomgeuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomgeuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomgew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomgew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomgtb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomgtb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomgtd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomgtd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomgtq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomgtq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomgtub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomgtub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomgtud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomgtud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomgtuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomgtuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomgtuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomgtuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomgtw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomgtw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomleb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomleb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomled instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomled instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomleq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomleq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomleub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomleub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomleud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomleud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomleuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomleuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomleuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomleuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomlew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomlew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomltb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomltb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomltd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomltd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomltq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomltq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomltub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomltub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomltud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomltud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomltuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomltuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomltuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomltuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomltw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomltw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomneqb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomneqb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomneqd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomneqd instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomneqq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomneqq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomnequb instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomnequb instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomnequd instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomnequd instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomnequq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomnequq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomnequw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomnequw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomneqw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomneqw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcompressb instruction.
VPCOMPRESSB xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressb instruction.
VPCOMPRESSB xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressb instruction.
VPCOMPRESSB ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressb instruction.
VPCOMPRESSB ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressb instruction.
VPCOMPRESSB zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 63 /r
AVX512_VBMI2
16/32/64-bit
vpcompressb instruction.
VPCOMPRESSB zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 63 /r
AVX512_VBMI2
16/32/64-bit
vpcompressd instruction.
VPCOMPRESSD xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressd instruction.
VPCOMPRESSD xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressd instruction.
VPCOMPRESSD ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressd instruction.
VPCOMPRESSD ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressd instruction.
VPCOMPRESSD zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 8B /r
AVX512F
16/32/64-bit
vpcompressd instruction.
VPCOMPRESSD zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 8B /r
AVX512F
16/32/64-bit
vpcompressq instruction.
VPCOMPRESSQ xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressq instruction.
VPCOMPRESSQ xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressq instruction.
VPCOMPRESSQ ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressq instruction.
VPCOMPRESSQ ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 8B /r
AVX512VL and AVX512F
16/32/64-bit
vpcompressq instruction.
VPCOMPRESSQ zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 8B /r
AVX512F
16/32/64-bit
vpcompressq instruction.
VPCOMPRESSQ zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 8B /r
AVX512F
16/32/64-bit
vpcompressw instruction.
VPCOMPRESSW xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressw instruction.
VPCOMPRESSW xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressw instruction.
VPCOMPRESSW ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressw instruction.
VPCOMPRESSW ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpcompressw instruction.
VPCOMPRESSW zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 63 /r
AVX512_VBMI2
16/32/64-bit
vpcompressw instruction.
VPCOMPRESSW zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 63 /r
AVX512_VBMI2
16/32/64-bit
vpcomq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomtrueb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomtrueb instruction.
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
vpcomtrued instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomtrued instruction.
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
vpcomtrueq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomtrueq instruction.
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
vpcomtrueub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomtrueub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomtrueud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomtrueud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomtrueuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomtrueuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomtrueuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomtrueuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomtruew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomtruew instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomub instruction.
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
vpcomud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomud instruction.
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
vpcomuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomuq instruction.
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
vpcomuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomuw instruction.
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
vpcomw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpcomw instruction.
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
vpconflictd instruction.
VPCONFLICTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictd instruction.
VPCONFLICTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictd instruction.
VPCONFLICTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 C4 /r
AVX512CD
16/32/64-bit
vpconflictd instruction.
VPCONFLICTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictd instruction.
VPCONFLICTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictd instruction.
VPCONFLICTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 C4 /r
AVX512CD
16/32/64-bit
vpconflictq instruction.
VPCONFLICTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictq instruction.
VPCONFLICTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictq instruction.
VPCONFLICTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 C4 /r
AVX512CD
16/32/64-bit
vpconflictq instruction.
VPCONFLICTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictq instruction.
VPCONFLICTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
vpconflictq instruction.
VPCONFLICTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 C4 /r
AVX512CD
16/32/64-bit
vpdpbssd instruction.
VPDPBSSD xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbssd instruction.
VPDPBSSD ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbssd instruction.
VPDPBSSD xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbssd instruction.
VPDPBSSD ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbssds instruction.
VPDPBSSDS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbssds instruction.
VPDPBSSDS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbssds instruction.
VPDPBSSDS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbssds instruction.
VPDPBSSDS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsud instruction.
VPDPBSUD xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsud instruction.
VPDPBSUD ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsud instruction.
VPDPBSUD xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsud instruction.
VPDPBSUD ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsuds instruction.
VPDPBSUDS xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsuds instruction.
VPDPBSUDS ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsuds instruction.
VPDPBSUDS xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbsuds instruction.
VPDPBSUDS ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbusd instruction.
VPDPBUSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 50 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 50 /r
AVX-VNNI
16/32/64-bit
vpdpbusd instruction.
VPDPBUSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 50 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 50 /r
AVX-VNNI
16/32/64-bit
vpdpbusd instruction.
VPDPBUSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 50 /r
AVX512_VNNI
16/32/64-bit
vpdpbusd instruction.
VPDPBUSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 50 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 50 /r
AVX-VNNI
16/32/64-bit
vpdpbusd instruction.
VPDPBUSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 50 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 50 /r
AVX-VNNI
16/32/64-bit
vpdpbusd instruction.
VPDPBUSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 50 /r
AVX512_VNNI
16/32/64-bit
vpdpbusds instruction.
VPDPBUSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 51 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 51 /r
AVX-VNNI
16/32/64-bit
vpdpbusds instruction.
VPDPBUSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 51 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 51 /r
AVX-VNNI
16/32/64-bit
vpdpbusds instruction.
VPDPBUSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 51 /r
AVX512_VNNI
16/32/64-bit
vpdpbusds instruction.
VPDPBUSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 51 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 51 /r
AVX-VNNI
16/32/64-bit
vpdpbusds instruction.
VPDPBUSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 51 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 51 /r
AVX-VNNI
16/32/64-bit
vpdpbusds instruction.
VPDPBUSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 51 /r
AVX512_VNNI
16/32/64-bit
vpdpbuud instruction.
VPDPBUUD xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbuud instruction.
VPDPBUUD ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbuud instruction.
VPDPBUUD xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbuud instruction.
VPDPBUUD ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbuuds instruction.
VPDPBUUDS xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbuuds instruction.
VPDPBUUDS ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbuuds instruction.
VPDPBUUDS xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpbuuds instruction.
VPDPBUUDS ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
vpdpwssd instruction.
VPDPWSSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 52 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 52 /r
AVX-VNNI
16/32/64-bit
vpdpwssd instruction.
VPDPWSSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 52 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 52 /r
AVX-VNNI
16/32/64-bit
vpdpwssd instruction.
VPDPWSSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 52 /r
AVX512_VNNI
16/32/64-bit
vpdpwssd instruction.
VPDPWSSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 52 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 52 /r
AVX-VNNI
16/32/64-bit
vpdpwssd instruction.
VPDPWSSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 52 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 52 /r
AVX-VNNI
16/32/64-bit
vpdpwssd instruction.
VPDPWSSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 52 /r
AVX512_VNNI
16/32/64-bit
vpdpwssds instruction.
VPDPWSSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 53 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 53 /r
AVX-VNNI
16/32/64-bit
vpdpwssds instruction.
VPDPWSSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 53 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 53 /r
AVX-VNNI
16/32/64-bit
vpdpwssds instruction.
VPDPWSSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 53 /r
AVX512_VNNI
16/32/64-bit
vpdpwssds instruction.
VPDPWSSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 53 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 53 /r
AVX-VNNI
16/32/64-bit
vpdpwssds instruction.
VPDPWSSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 53 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 53 /r
AVX-VNNI
16/32/64-bit
vpdpwssds instruction.
VPDPWSSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 53 /r
AVX512_VNNI
16/32/64-bit
vpdpwsud instruction.
VPDPWSUD xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwsud instruction.
VPDPWSUD ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwsud instruction.
VPDPWSUD xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwsud instruction.
VPDPWSUD ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwsuds instruction.
VPDPWSUDS xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwsuds instruction.
VPDPWSUDS ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwsuds instruction.
VPDPWSUDS xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwsuds instruction.
VPDPWSUDS ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusd instruction.
VPDPWUSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusd instruction.
VPDPWUSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusd instruction.
VPDPWUSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusd instruction.
VPDPWUSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusds instruction.
VPDPWUSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusds instruction.
VPDPWUSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusds instruction.
VPDPWUSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwusds instruction.
VPDPWUSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuud instruction.
VPDPWUUD xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuud instruction.
VPDPWUUD ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuud instruction.
VPDPWUUD xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuud instruction.
VPDPWUUD ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuuds instruction.
VPDPWUUDS xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuuds instruction.
VPDPWUUDS ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuuds instruction.
VPDPWUUDS xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vpdpwuuds instruction.
VPDPWUUDS ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
vperm2f128 instruction.
VPERM2F128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 06 /r ib
AVX
16/32/64-bit
vperm2f128 instruction.
VPERM2F128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 06 /r ib
AVX
16/32/64-bit
vperm2f128 instruction.
VPERM2F128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 06 /r ib
AVX
16/32/64-bit
vperm2f128 instruction.
VPERM2F128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 06 /r ib
AVX
16/32/64-bit
vperm2i128 instruction.
VPERM2I128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 46 /r ib
AVX2
16/32/64-bit
vperm2i128 instruction.
VPERM2I128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 46 /r ib
AVX2
16/32/64-bit
vperm2i128 instruction.
VPERM2I128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 46 /r ib
AVX2
16/32/64-bit
vperm2i128 instruction.
VPERM2I128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 46 /r ib
AVX2
16/32/64-bit
vpermb instruction.
VPERMB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 8D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermb instruction.
VPERMB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 8D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermb instruction.
VPERMB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 8D /r
AVX512_VBMI
16/32/64-bit
vpermb instruction.
VPERMB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 8D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermb instruction.
VPERMB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 8D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermb instruction.
VPERMB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 8D /r
AVX512_VBMI
16/32/64-bit
vpermd instruction.
VPERMD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 36 /r
AVX2
16/32/64-bit
VPERMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 36 /r
AVX512VL and AVX512F
16/32/64-bit
vpermd instruction.
VPERMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 36 /r
AVX512F
16/32/64-bit
vpermd instruction.
VPERMD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 36 /r
AVX2
16/32/64-bit
VPERMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 36 /r
AVX512VL and AVX512F
16/32/64-bit
vpermd instruction.
VPERMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 36 /r
AVX512F
16/32/64-bit
vpermi2b instruction.
VPERMI2B xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 75 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermi2b instruction.
VPERMI2B ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 75 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermi2b instruction.
VPERMI2B zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 75 /r
AVX512_VBMI
16/32/64-bit
vpermi2b instruction.
VPERMI2B xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 75 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermi2b instruction.
VPERMI2B ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 75 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermi2b instruction.
VPERMI2B zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 75 /r
AVX512_VBMI
16/32/64-bit
vpermi2d instruction.
VPERMI2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2d instruction.
VPERMI2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2d instruction.
VPERMI2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 76 /r
AVX512F
16/32/64-bit
vpermi2d instruction.
VPERMI2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2d instruction.
VPERMI2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2d instruction.
VPERMI2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 76 /r
AVX512F
16/32/64-bit
vpermi2pd instruction.
VPERMI2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2pd instruction.
VPERMI2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2pd instruction.
VPERMI2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 77 /r
AVX512F
16/32/64-bit
vpermi2pd instruction.
VPERMI2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2pd instruction.
VPERMI2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2pd instruction.
VPERMI2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 77 /r
AVX512F
16/32/64-bit
vpermi2ps instruction.
VPERMI2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2ps instruction.
VPERMI2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2ps instruction.
VPERMI2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 77 /r
AVX512F
16/32/64-bit
vpermi2ps instruction.
VPERMI2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2ps instruction.
VPERMI2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 77 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2ps instruction.
VPERMI2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 77 /r
AVX512F
16/32/64-bit
vpermi2q instruction.
VPERMI2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2q instruction.
VPERMI2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2q instruction.
VPERMI2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 76 /r
AVX512F
16/32/64-bit
vpermi2q instruction.
VPERMI2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2q instruction.
VPERMI2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 76 /r
AVX512VL and AVX512F
16/32/64-bit
vpermi2q instruction.
VPERMI2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 76 /r
AVX512F
16/32/64-bit
vpermi2w instruction.
VPERMI2W xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpermi2w instruction.
VPERMI2W ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpermi2w instruction.
VPERMI2W zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 75 /r
AVX512BW
16/32/64-bit
vpermi2w instruction.
VPERMI2W xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpermi2w instruction.
VPERMI2W ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 75 /r
AVX512VL and AVX512BW
16/32/64-bit
vpermi2w instruction.
VPERMI2W zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 75 /r
AVX512BW
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD xmm1, xmm2, xmm3, xmm4/m128, imm4
VEX.128.66.0F3A.W1 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD ymm1, ymm2, ymm3, ymm4/m256, imm4
VEX.256.66.0F3A.W1 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD xmm1, xmm2, xmm3, xmm4/m128, imm4
VEX.128.66.0F3A.W1 49 /r /is5
XOP
16/32/64-bit
vpermil2pd instruction.
VPERMIL2PD ymm1, ymm2, ymm3, ymm4/m256, imm4
VEX.256.66.0F3A.W1 49 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS xmm1, xmm2, xmm3, xmm4/m128, imm4
VEX.128.66.0F3A.W1 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS ymm1, ymm2, ymm3, ymm4/m256, imm4
VEX.256.66.0F3A.W1 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS xmm1, xmm2, xmm3, xmm4/m128, imm4
VEX.128.66.0F3A.W1 48 /r /is5
XOP
16/32/64-bit
vpermil2ps instruction.
VPERMIL2PS ymm1, ymm2, ymm3, ymm4/m256, imm4
VEX.256.66.0F3A.W1 48 /r /is5
XOP
16/32/64-bit
vpermilpd instruction.
VPERMILPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 0D /r
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 0D /r
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 0D /r
AVX
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 0D /r
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 0D /r
AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 0D /r
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 0D /r
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 0D /r
AVX
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 0D /r
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 0D /r
AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 05 /r ib
AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 05 /r ib
AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 05 /r ib
AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilpd instruction.
VPERMILPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 05 /r ib
AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 0C /r
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 0C /r
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 0C /r
AVX
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 0C /r
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 0C /r
AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 0C /r
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 0C /r
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 0C /r
AVX
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 0C /r
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 0C /r
AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 04 /r ib
AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 04 /r ib
AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 04 /r ib
AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermilps instruction.
VPERMILPS zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 04 /r ib
AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 16 /r
AVX512VL and AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 16 /r
AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 16 /r
AVX512VL and AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 16 /r
AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 01 /r ib
AVX2
16/32/64-bit
VPERMPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 01 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 01 /r ib
AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 01 /r ib
AVX2
16/32/64-bit
VPERMPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 01 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 01 /r ib
AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 01 /r ib
AVX2
16/32/64-bit
VPERMPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 01 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 01 /r ib
AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 01 /r ib
AVX2
16/32/64-bit
VPERMPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 01 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermpd instruction.
VPERMPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 01 /r ib
AVX512F
16/32/64-bit
vpermps instruction.
VPERMPS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 16 /r
AVX2
16/32/64-bit
VPERMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
vpermps instruction.
VPERMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 16 /r
AVX512F
16/32/64-bit
vpermps instruction.
VPERMPS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 16 /r
AVX2
16/32/64-bit
VPERMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
vpermps instruction.
VPERMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 16 /r
AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 36 /r
AVX512VL and AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 36 /r
AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 36 /r
AVX512VL and AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 36 /r
AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 00 /r ib
AVX2
16/32/64-bit
VPERMQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 00 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 00 /r ib
AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 00 /r ib
AVX2
16/32/64-bit
VPERMQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 00 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 00 /r ib
AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 00 /r ib
AVX2
16/32/64-bit
VPERMQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 00 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 00 /r ib
AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 00 /r ib
AVX2
16/32/64-bit
VPERMQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 00 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpermq instruction.
VPERMQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 00 /r ib
AVX512F
16/32/64-bit
vpermt2b instruction.
VPERMT2B xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 7D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermt2b instruction.
VPERMT2B ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 7D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermt2b instruction.
VPERMT2B zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 7D /r
AVX512_VBMI
16/32/64-bit
vpermt2b instruction.
VPERMT2B xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 7D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermt2b instruction.
VPERMT2B ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 7D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpermt2b instruction.
VPERMT2B zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 7D /r
AVX512_VBMI
16/32/64-bit
vpermt2d instruction.
VPERMT2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2d instruction.
VPERMT2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2d instruction.
VPERMT2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 7E /r
AVX512F
16/32/64-bit
vpermt2d instruction.
VPERMT2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2d instruction.
VPERMT2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2d instruction.
VPERMT2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 7E /r
AVX512F
16/32/64-bit
vpermt2pd instruction.
VPERMT2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2pd instruction.
VPERMT2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2pd instruction.
VPERMT2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 7F /r
AVX512F
16/32/64-bit
vpermt2pd instruction.
VPERMT2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2pd instruction.
VPERMT2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2pd instruction.
VPERMT2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 7F /r
AVX512F
16/32/64-bit
vpermt2ps instruction.
VPERMT2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2ps instruction.
VPERMT2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2ps instruction.
VPERMT2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 7F /r
AVX512F
16/32/64-bit
vpermt2ps instruction.
VPERMT2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2ps instruction.
VPERMT2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2ps instruction.
VPERMT2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 7F /r
AVX512F
16/32/64-bit
vpermt2q instruction.
VPERMT2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2q instruction.
VPERMT2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2q instruction.
VPERMT2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 7E /r
AVX512F
16/32/64-bit
vpermt2q instruction.
VPERMT2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2q instruction.
VPERMT2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 7E /r
AVX512VL and AVX512F
16/32/64-bit
vpermt2q instruction.
VPERMT2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 7E /r
AVX512F
16/32/64-bit
vpermt2w instruction.
VPERMT2W xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 7D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermt2w instruction.
VPERMT2W ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 7D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermt2w instruction.
VPERMT2W zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 7D /r
AVX512BW
16/32/64-bit
vpermt2w instruction.
VPERMT2W xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 7D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermt2w instruction.
VPERMT2W ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 7D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermt2w instruction.
VPERMT2W zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 7D /r
AVX512BW
16/32/64-bit
vpermw instruction.
VPERMW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 8D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermw instruction.
VPERMW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 8D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermw instruction.
VPERMW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 8D /r
AVX512BW
16/32/64-bit
vpermw instruction.
VPERMW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 8D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermw instruction.
VPERMW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 8D /r
AVX512VL and AVX512BW
16/32/64-bit
vpermw instruction.
VPERMW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 8D /r
AVX512BW
16/32/64-bit
vpexpandb instruction.
VPEXPANDB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandb instruction.
VPEXPANDB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandb instruction.
VPEXPANDB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 62 /r
AVX512_VBMI2
16/32/64-bit
vpexpandb instruction.
VPEXPANDB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandb instruction.
VPEXPANDB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandb instruction.
VPEXPANDB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 62 /r
AVX512_VBMI2
16/32/64-bit
vpexpandd instruction.
VPEXPANDD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandd instruction.
VPEXPANDD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandd instruction.
VPEXPANDD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 89 /r
AVX512F
16/32/64-bit
vpexpandd instruction.
VPEXPANDD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandd instruction.
VPEXPANDD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandd instruction.
VPEXPANDD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 89 /r
AVX512F
16/32/64-bit
vpexpandq instruction.
VPEXPANDQ xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandq instruction.
VPEXPANDQ ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandq instruction.
VPEXPANDQ zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 89 /r
AVX512F
16/32/64-bit
vpexpandq instruction.
VPEXPANDQ xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandq instruction.
VPEXPANDQ ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 89 /r
AVX512VL and AVX512F
16/32/64-bit
vpexpandq instruction.
VPEXPANDQ zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 89 /r
AVX512F
16/32/64-bit
vpexpandw instruction.
VPEXPANDW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandw instruction.
VPEXPANDW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandw instruction.
VPEXPANDW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 62 /r
AVX512_VBMI2
16/32/64-bit
vpexpandw instruction.
VPEXPANDW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandw instruction.
VPEXPANDW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpexpandw instruction.
VPEXPANDW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 62 /r
AVX512_VBMI2
16/32/64-bit
vpextrb instruction.
VPEXTRB r32/m8, xmm2, imm8
VEX.128.66.0F3A.W0 14 /r ib
AVX
16/32/64-bit
VPEXTRB r32/m8, xmm2, imm8
EVEX.128.66.0F3A.W0 14 /r ib
AVX512BW
16/32/64-bit
vpextrb instruction.
VPEXTRB r64/m8, xmm2, imm8
VEX.128.66.0F3A.W1 14 /r ib
AVX
64-bit
VPEXTRB r64/m8, xmm2, imm8
EVEX.128.66.0F3A.W1 14 /r ib
AVX512BW
64-bit
vpextrb instruction.
VPEXTRB r32/m8, xmm2, imm8
VEX.128.66.0F3A.W0 14 /r ib
AVX
16/32/64-bit
VPEXTRB r32/m8, xmm2, imm8
EVEX.128.66.0F3A.W0 14 /r ib
AVX512BW
16/32/64-bit
vpextrb instruction.
VPEXTRB r32/m8, xmm2, imm8
VEX.128.66.0F3A.W0 14 /r ib
AVX
16/32/64-bit
VPEXTRB r32/m8, xmm2, imm8
EVEX.128.66.0F3A.W0 14 /r ib
AVX512BW
16/32/64-bit
vpextrb instruction.
VPEXTRB r64/m8, xmm2, imm8
VEX.128.66.0F3A.W1 14 /r ib
AVX
64-bit
VPEXTRB r64/m8, xmm2, imm8
EVEX.128.66.0F3A.W1 14 /r ib
AVX512BW
64-bit
vpextrb instruction.
VPEXTRB r32/m8, xmm2, imm8
VEX.128.66.0F3A.W0 14 /r ib
AVX
16/32/64-bit
VPEXTRB r32/m8, xmm2, imm8
EVEX.128.66.0F3A.W0 14 /r ib
AVX512BW
16/32/64-bit
vpextrd instruction.
VPEXTRD r/m32, xmm2, imm8
VEX.128.66.0F3A.W0 16 /r ib
AVX
16/32/64-bit
VPEXTRD r/m32, xmm2, imm8
EVEX.128.66.0F3A.W0 16 /r ib
AVX512DQ
16/32/64-bit
vpextrd instruction.
VPEXTRD r/m32, xmm2, imm8
VEX.128.66.0F3A.W0 16 /r ib
AVX
16/32/64-bit
VPEXTRD r/m32, xmm2, imm8
EVEX.128.66.0F3A.W0 16 /r ib
AVX512DQ
16/32/64-bit
vpextrd instruction.
VPEXTRD r/m32, xmm2, imm8
VEX.128.66.0F3A.W0 16 /r ib
AVX
16/32/64-bit
VPEXTRD r/m32, xmm2, imm8
EVEX.128.66.0F3A.W0 16 /r ib
AVX512DQ
16/32/64-bit
vpextrd instruction.
VPEXTRD r/m32, xmm2, imm8
VEX.128.66.0F3A.W0 16 /r ib
AVX
16/32/64-bit
VPEXTRD r/m32, xmm2, imm8
EVEX.128.66.0F3A.W0 16 /r ib
AVX512DQ
16/32/64-bit
vpextrq instruction.
VPEXTRQ r/m64, xmm2, imm8
VEX.128.66.0F3A.W1 16 /r ib
AVX
64-bit
VPEXTRQ r/m64, xmm2, imm8
EVEX.128.66.0F3A.W1 16 /r ib
AVX512DQ
64-bit
vpextrq instruction.
VPEXTRQ r/m64, xmm2, imm8
VEX.128.66.0F3A.W1 16 /r ib
AVX
64-bit
VPEXTRQ r/m64, xmm2, imm8
EVEX.128.66.0F3A.W1 16 /r ib
AVX512DQ
64-bit
vpextrq instruction.
VPEXTRQ r/m64, xmm2, imm8
VEX.128.66.0F3A.W1 16 /r ib
AVX
64-bit
VPEXTRQ r/m64, xmm2, imm8
EVEX.128.66.0F3A.W1 16 /r ib
AVX512DQ
64-bit
vpextrq instruction.
VPEXTRQ r/m64, xmm2, imm8
VEX.128.66.0F3A.W1 16 /r ib
AVX
64-bit
VPEXTRQ r/m64, xmm2, imm8
EVEX.128.66.0F3A.W1 16 /r ib
AVX512DQ
64-bit
vpextrw instruction.
VPEXTRW r32, xmm1, imm8
VEX.128.66.0F.W0 C5 /r ib
AVX
16/32/64-bit
VPEXTRW r32, xmm1, imm8
EVEX.128.66.0F.W0 C5 /r ib
AVX512BW
16/32/64-bit
vpextrw instruction.
VPEXTRW r64, xmm1, imm8
VEX.128.66.0F.W1 C5 /r ib
AVX
64-bit
VPEXTRW r64, xmm1, imm8
EVEX.128.66.0F.W1 C5 /r ib
AVX512BW
64-bit
vpextrw instruction.
VPEXTRW r32/m16, xmm2, imm8
VEX.128.66.0F3A.W0 15 /r ib
AVX
16/32/64-bit
VPEXTRW r32/m16, xmm2, imm8
EVEX.128.66.0F3A.W0 15 /r ib
AVX512BW
16/32/64-bit
vpextrw instruction.
VPEXTRW r32, xmm1, imm8
VEX.128.66.0F.W0 C5 /r ib
AVX
16/32/64-bit
VPEXTRW r32, xmm1, imm8
EVEX.128.66.0F.W0 C5 /r ib
AVX512BW
16/32/64-bit
vpextrw instruction.
VPEXTRW r64, xmm1, imm8
VEX.128.66.0F.W1 C5 /r ib
AVX
64-bit
VPEXTRW r64, xmm1, imm8
EVEX.128.66.0F.W1 C5 /r ib
AVX512BW
64-bit
vpextrw instruction.
VPEXTRW r32/m16, xmm2, imm8
VEX.128.66.0F3A.W0 15 /r ib
AVX
16/32/64-bit
VPEXTRW r32/m16, xmm2, imm8
EVEX.128.66.0F3A.W0 15 /r ib
AVX512BW
16/32/64-bit
vpgatherdd instruction.
VPGATHERDD xmm1 {k1}, vm32x
EVEX.128.66.0F38.W0 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpgatherdd instruction.
VPGATHERDD ymm1 {k1}, vm32y
EVEX.256.66.0F38.W0 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpgatherdd instruction.
VPGATHERDD zmm1 {k1}, vm32z
EVEX.512.66.0F38.W0 90 /vsib
AVX512F
16/32/64-bit
vpgatherdd instruction.
VPGATHERDD xmm1, vm32x, xmm2
VEX.128.66.0F38.W0 90 /r
AVX2
16/32/64-bit
vpgatherdd instruction.
VPGATHERDD ymm1, vm32y, ymm2
VEX.256.66.0F38.W0 90 /r
AVX2
16/32/64-bit
vpgatherdq instruction.
VPGATHERDQ xmm1 {k1}, vm32x
EVEX.128.66.0F38.W1 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpgatherdq instruction.
VPGATHERDQ ymm1 {k1}, vm32x
EVEX.256.66.0F38.W1 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpgatherdq instruction.
VPGATHERDQ zmm1 {k1}, vm32y
EVEX.512.66.0F38.W1 90 /vsib
AVX512F
16/32/64-bit
vpgatherdq instruction.
VPGATHERDQ xmm1, vm32x, xmm2
VEX.128.66.0F38.W1 90 /r
AVX2
16/32/64-bit
vpgatherdq instruction.
VPGATHERDQ ymm1, vm32x, ymm2
VEX.256.66.0F38.W1 90 /r
AVX2
16/32/64-bit
vpgatherqd instruction.
VPGATHERQD xmm1 {k1}, vm64x
EVEX.128.66.0F38.W0 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERQD xmm1 {k1}, vm64y
EVEX.256.66.0F38.W0 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpgatherqd instruction.
VPGATHERQD ymm1 {k1}, vm64z
EVEX.512.66.0F38.W0 91 /vsib
AVX512F
16/32/64-bit
vpgatherqd instruction.
VPGATHERQD xmm1, vm64x, xmm2
VEX.128.66.0F38.W0 91 /r
AVX2
16/32/64-bit
VPGATHERQD xmm1, vm64y, xmm2
VEX.256.66.0F38.W0 91 /r
AVX2
16/32/64-bit
vpgatherqq instruction.
VPGATHERQQ xmm1 {k1}, vm64x
EVEX.128.66.0F38.W1 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpgatherqq instruction.
VPGATHERQQ ymm1 {k1}, vm64y
EVEX.256.66.0F38.W1 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpgatherqq instruction.
VPGATHERQQ zmm1 {k1}, vm64z
EVEX.512.66.0F38.W1 91 /vsib
AVX512F
16/32/64-bit
vpgatherqq instruction.
VPGATHERQQ xmm1, vm64x, xmm2
VEX.128.66.0F38.W1 91 /r
AVX2
16/32/64-bit
vpgatherqq instruction.
VPGATHERQQ ymm1, vm64y, ymm2
VEX.256.66.0F38.W1 91 /r
AVX2
16/32/64-bit
vphaddbd instruction.
VPHADDBD xmm1, xmm2/m128
XOP.128.X9.W0 C2 /r
XOP
16/32/64-bit
vphaddbd instruction.
VPHADDBD xmm1, xmm2/m128
XOP.128.X9.W0 C2 /r
XOP
16/32/64-bit
vphaddbq instruction.
VPHADDBQ xmm1, xmm2/m128
XOP.128.X9.W0 C3 /r
XOP
16/32/64-bit
vphaddbq instruction.
VPHADDBQ xmm1, xmm2/m128
XOP.128.X9.W0 C3 /r
XOP
16/32/64-bit
vphaddbw instruction.
VPHADDBW xmm1, xmm2/m128
XOP.128.X9.W0 C1 /r
XOP
16/32/64-bit
vphaddbw instruction.
VPHADDBW xmm1, xmm2/m128
XOP.128.X9.W0 C1 /r
XOP
16/32/64-bit
vphaddd instruction.
VPHADDD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 02 /r
AVX
16/32/64-bit
vphaddd instruction.
VPHADDD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 02 /r
AVX2
16/32/64-bit
vphaddd instruction.
VPHADDD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 02 /r
AVX
16/32/64-bit
vphaddd instruction.
VPHADDD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 02 /r
AVX2
16/32/64-bit
vphadddq instruction.
VPHADDDQ xmm1, xmm2/m128
XOP.128.X9.W0 CB /r
XOP
16/32/64-bit
vphadddq instruction.
VPHADDDQ xmm1, xmm2/m128
XOP.128.X9.W0 CB /r
XOP
16/32/64-bit
vphaddsw instruction.
VPHADDSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 03 /r
AVX
16/32/64-bit
vphaddsw instruction.
VPHADDSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 03 /r
AVX2
16/32/64-bit
vphaddsw instruction.
VPHADDSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 03 /r
AVX
16/32/64-bit
vphaddsw instruction.
VPHADDSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 03 /r
AVX2
16/32/64-bit
vphaddubd instruction.
VPHADDUBD xmm1, xmm2/m128
XOP.128.X9.W0 D2 /r
XOP
16/32/64-bit
vphaddubd instruction.
VPHADDUBD xmm1, xmm2/m128
XOP.128.X9.W0 D2 /r
XOP
16/32/64-bit
vphaddubq instruction.
VPHADDUBQ xmm1, xmm2/m128
XOP.128.X9.W0 D3 /r
XOP
16/32/64-bit
vphaddubq instruction.
VPHADDUBQ xmm1, xmm2/m128
XOP.128.X9.W0 D3 /r
XOP
16/32/64-bit
vphaddubw instruction.
VPHADDUBW xmm1, xmm2/m128
XOP.128.X9.W0 D1 /r
XOP
16/32/64-bit
vphaddubw instruction.
VPHADDUBW xmm1, xmm2/m128
XOP.128.X9.W0 D1 /r
XOP
16/32/64-bit
vphaddudq instruction.
VPHADDUDQ xmm1, xmm2/m128
XOP.128.X9.W0 DB /r
XOP
16/32/64-bit
vphaddudq instruction.
VPHADDUDQ xmm1, xmm2/m128
XOP.128.X9.W0 DB /r
XOP
16/32/64-bit
vphadduwd instruction.
VPHADDUWD xmm1, xmm2/m128
XOP.128.X9.W0 D6 /r
XOP
16/32/64-bit
vphadduwd instruction.
VPHADDUWD xmm1, xmm2/m128
XOP.128.X9.W0 D6 /r
XOP
16/32/64-bit
vphadduwq instruction.
VPHADDUWQ xmm1, xmm2/m128
XOP.128.X9.W0 D7 /r
XOP
16/32/64-bit
vphadduwq instruction.
VPHADDUWQ xmm1, xmm2/m128
XOP.128.X9.W0 D7 /r
XOP
16/32/64-bit
vphaddw instruction.
VPHADDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 01 /r
AVX
16/32/64-bit
vphaddw instruction.
VPHADDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 01 /r
AVX2
16/32/64-bit
vphaddw instruction.
VPHADDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 01 /r
AVX
16/32/64-bit
vphaddw instruction.
VPHADDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 01 /r
AVX2
16/32/64-bit
vphaddwd instruction.
VPHADDWD xmm1, xmm2/m128
XOP.128.X9.W0 C6 /r
XOP
16/32/64-bit
vphaddwd instruction.
VPHADDWD xmm1, xmm2/m128
XOP.128.X9.W0 C6 /r
XOP
16/32/64-bit
vphaddwq instruction.
VPHADDWQ xmm1, xmm2/m128
XOP.128.X9.W0 C7 /r
XOP
16/32/64-bit
vphaddwq instruction.
VPHADDWQ xmm1, xmm2/m128
XOP.128.X9.W0 C7 /r
XOP
16/32/64-bit
vphminposuw instruction.
VPHMINPOSUW xmm1, xmm2/m128
VEX.128.66.0F38.WIG 41 /r
AVX
16/32/64-bit
vphminposuw instruction.
VPHMINPOSUW xmm1, xmm2/m128
VEX.128.66.0F38.WIG 41 /r
AVX
16/32/64-bit
vphsubbw instruction.
VPHSUBBW xmm1, xmm2/m128
XOP.128.X9.W0 E1 /r
XOP
16/32/64-bit
vphsubbw instruction.
VPHSUBBW xmm1, xmm2/m128
XOP.128.X9.W0 E1 /r
XOP
16/32/64-bit
vphsubd instruction.
VPHSUBD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 06 /r
AVX
16/32/64-bit
vphsubd instruction.
VPHSUBD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 06 /r
AVX2
16/32/64-bit
vphsubd instruction.
VPHSUBD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 06 /r
AVX
16/32/64-bit
vphsubd instruction.
VPHSUBD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 06 /r
AVX2
16/32/64-bit
vphsubdq instruction.
VPHSUBDQ xmm1, xmm2/m128
XOP.128.X9.W0 E3 /r
XOP
16/32/64-bit
vphsubdq instruction.
VPHSUBDQ xmm1, xmm2/m128
XOP.128.X9.W0 E3 /r
XOP
16/32/64-bit
vphsubsw instruction.
VPHSUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 07 /r
AVX
16/32/64-bit
vphsubsw instruction.
VPHSUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 07 /r
AVX2
16/32/64-bit
vphsubsw instruction.
VPHSUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 07 /r
AVX
16/32/64-bit
vphsubsw instruction.
VPHSUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 07 /r
AVX2
16/32/64-bit
vphsubw instruction.
VPHSUBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 05 /r
AVX
16/32/64-bit
vphsubw instruction.
VPHSUBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 05 /r
AVX2
16/32/64-bit
vphsubw instruction.
VPHSUBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 05 /r
AVX
16/32/64-bit
vphsubw instruction.
VPHSUBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 05 /r
AVX2
16/32/64-bit
vphsubwd instruction.
VPHSUBWD xmm1, xmm2/m128
XOP.128.X9.W0 E2 /r
XOP
16/32/64-bit
vphsubwd instruction.
VPHSUBWD xmm1, xmm2/m128
XOP.128.X9.W0 E2 /r
XOP
16/32/64-bit
vpinsrb instruction.
VPINSRB xmm1, xmm2, r32/m8, imm8
VEX.128.66.0F3A.W0 20 /r ib
AVX
16/32/64-bit
VPINSRB xmm1, xmm2, r32/m8, imm8
EVEX.128.66.0F3A.W0 20 /r ib
AVX512BW
16/32/64-bit
vpinsrb instruction.
VPINSRB xmm1, xmm2, r64/m8, imm8
VEX.128.66.0F3A.W1 20 /r ib
AVX
64-bit
VPINSRB xmm1, xmm2, r64/m8, imm8
EVEX.128.66.0F3A.W1 20 /r ib
AVX512BW
64-bit
vpinsrb instruction.
VPINSRB xmm1, xmm2, r32/m8, imm8
VEX.128.66.0F3A.W0 20 /r ib
AVX
16/32/64-bit
VPINSRB xmm1, xmm2, r32/m8, imm8
EVEX.128.66.0F3A.W0 20 /r ib
AVX512BW
16/32/64-bit
vpinsrb instruction.
VPINSRB xmm1, xmm2, r32/m8, imm8
VEX.128.66.0F3A.W0 20 /r ib
AVX
16/32/64-bit
VPINSRB xmm1, xmm2, r32/m8, imm8
EVEX.128.66.0F3A.W0 20 /r ib
AVX512BW
16/32/64-bit
vpinsrb instruction.
VPINSRB xmm1, xmm2, r64/m8, imm8
VEX.128.66.0F3A.W1 20 /r ib
AVX
64-bit
VPINSRB xmm1, xmm2, r64/m8, imm8
EVEX.128.66.0F3A.W1 20 /r ib
AVX512BW
64-bit
vpinsrb instruction.
VPINSRB xmm1, xmm2, r32/m8, imm8
VEX.128.66.0F3A.W0 20 /r ib
AVX
16/32/64-bit
VPINSRB xmm1, xmm2, r32/m8, imm8
EVEX.128.66.0F3A.W0 20 /r ib
AVX512BW
16/32/64-bit
vpinsrd instruction.
VPINSRD xmm1, xmm2, r/m32, imm8
VEX.128.66.0F3A.W0 22 /r ib
AVX
16/32/64-bit
VPINSRD xmm1, xmm2, r/m32, imm8
EVEX.128.66.0F3A.W0 22 /r ib
AVX512DQ
16/32/64-bit
vpinsrd instruction.
VPINSRD xmm1, xmm2, r/m32, imm8
VEX.128.66.0F3A.W0 22 /r ib
AVX
16/32/64-bit
VPINSRD xmm1, xmm2, r/m32, imm8
EVEX.128.66.0F3A.W0 22 /r ib
AVX512DQ
16/32/64-bit
vpinsrd instruction.
VPINSRD xmm1, xmm2, r/m32, imm8
VEX.128.66.0F3A.W0 22 /r ib
AVX
16/32/64-bit
VPINSRD xmm1, xmm2, r/m32, imm8
EVEX.128.66.0F3A.W0 22 /r ib
AVX512DQ
16/32/64-bit
vpinsrd instruction.
VPINSRD xmm1, xmm2, r/m32, imm8
VEX.128.66.0F3A.W0 22 /r ib
AVX
16/32/64-bit
VPINSRD xmm1, xmm2, r/m32, imm8
EVEX.128.66.0F3A.W0 22 /r ib
AVX512DQ
16/32/64-bit
vpinsrq instruction.
VPINSRQ xmm1, xmm2, r/m64, imm8
VEX.128.66.0F3A.W1 22 /r ib
AVX
64-bit
VPINSRQ xmm1, xmm2, r/m64, imm8
EVEX.128.66.0F3A.W1 22 /r ib
AVX512DQ
64-bit
vpinsrq instruction.
VPINSRQ xmm1, xmm2, r/m64, imm8
VEX.128.66.0F3A.W1 22 /r ib
AVX
64-bit
VPINSRQ xmm1, xmm2, r/m64, imm8
EVEX.128.66.0F3A.W1 22 /r ib
AVX512DQ
64-bit
vpinsrq instruction.
VPINSRQ xmm1, xmm2, r/m64, imm8
VEX.128.66.0F3A.W1 22 /r ib
AVX
64-bit
VPINSRQ xmm1, xmm2, r/m64, imm8
EVEX.128.66.0F3A.W1 22 /r ib
AVX512DQ
64-bit
vpinsrq instruction.
VPINSRQ xmm1, xmm2, r/m64, imm8
VEX.128.66.0F3A.W1 22 /r ib
AVX
64-bit
VPINSRQ xmm1, xmm2, r/m64, imm8
EVEX.128.66.0F3A.W1 22 /r ib
AVX512DQ
64-bit
vpinsrw instruction.
VPINSRW xmm1, xmm2, r32/m16, imm8
VEX.128.66.0F.W0 C4 /r ib
AVX
16/32/64-bit
VPINSRW xmm1, xmm2, r32/m16, imm8
EVEX.128.66.0F.W0 C4 /r ib
AVX512BW
16/32/64-bit
vpinsrw instruction.
VPINSRW xmm1, xmm2, r64/m16, imm8
VEX.128.66.0F.W1 C4 /r ib
AVX
64-bit
VPINSRW xmm1, xmm2, r64/m16, imm8
EVEX.128.66.0F.W1 C4 /r ib
AVX512BW
64-bit
vpinsrw instruction.
VPINSRW xmm1, xmm2, r32/m16, imm8
VEX.128.66.0F.W0 C4 /r ib
AVX
16/32/64-bit
VPINSRW xmm1, xmm2, r32/m16, imm8
EVEX.128.66.0F.W0 C4 /r ib
AVX512BW
16/32/64-bit
vpinsrw instruction.
VPINSRW xmm1, xmm2, r32/m16, imm8
VEX.128.66.0F.W0 C4 /r ib
AVX
16/32/64-bit
VPINSRW xmm1, xmm2, r32/m16, imm8
EVEX.128.66.0F.W0 C4 /r ib
AVX512BW
16/32/64-bit
vpinsrw instruction.
VPINSRW xmm1, xmm2, r64/m16, imm8
VEX.128.66.0F.W1 C4 /r ib
AVX
64-bit
VPINSRW xmm1, xmm2, r64/m16, imm8
EVEX.128.66.0F.W1 C4 /r ib
AVX512BW
64-bit
vpinsrw instruction.
VPINSRW xmm1, xmm2, r32/m16, imm8
VEX.128.66.0F.W0 C4 /r ib
AVX
16/32/64-bit
VPINSRW xmm1, xmm2, r32/m16, imm8
EVEX.128.66.0F.W0 C4 /r ib
AVX512BW
16/32/64-bit
vplzcntd instruction.
VPLZCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntd instruction.
VPLZCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntd instruction.
VPLZCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 44 /r
AVX512CD
16/32/64-bit
vplzcntd instruction.
VPLZCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntd instruction.
VPLZCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntd instruction.
VPLZCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 44 /r
AVX512CD
16/32/64-bit
vplzcntq instruction.
VPLZCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntq instruction.
VPLZCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntq instruction.
VPLZCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 44 /r
AVX512CD
16/32/64-bit
vplzcntq instruction.
VPLZCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntq instruction.
VPLZCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 44 /r
AVX512VL and AVX512CD
16/32/64-bit
vplzcntq instruction.
VPLZCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 44 /r
AVX512CD
16/32/64-bit
vpmacsdd instruction.
VPMACSDD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 9E /r /is4
XOP
16/32/64-bit
vpmacsdd instruction.
VPMACSDD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 9E /r /is4
XOP
16/32/64-bit
vpmacsdqh instruction.
VPMACSDQH xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 9F /r /is4
XOP
16/32/64-bit
vpmacsdqh instruction.
VPMACSDQH xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 9F /r /is4
XOP
16/32/64-bit
vpmacsdql instruction.
VPMACSDQL xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 97 /r /is4
XOP
16/32/64-bit
vpmacsdql instruction.
VPMACSDQL xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 97 /r /is4
XOP
16/32/64-bit
vpmacssdd instruction.
VPMACSSDD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 8E /r /is4
XOP
16/32/64-bit
vpmacssdd instruction.
VPMACSSDD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 8E /r /is4
XOP
16/32/64-bit
vpmacssdqh instruction.
VPMACSSDQH xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 8F /r /is4
XOP
16/32/64-bit
vpmacssdqh instruction.
VPMACSSDQH xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 8F /r /is4
XOP
16/32/64-bit
vpmacssdql instruction.
VPMACSSDQL xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 87 /r /is4
XOP
16/32/64-bit
vpmacssdql instruction.
VPMACSSDQL xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 87 /r /is4
XOP
16/32/64-bit
vpmacsswd instruction.
VPMACSSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 86 /r /is4
XOP
16/32/64-bit
vpmacsswd instruction.
VPMACSSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 86 /r /is4
XOP
16/32/64-bit
vpmacssww instruction.
VPMACSSWW xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 85 /r /is4
XOP
16/32/64-bit
vpmacssww instruction.
VPMACSSWW xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 85 /r /is4
XOP
16/32/64-bit
vpmacswd instruction.
VPMACSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 96 /r /is4
XOP
16/32/64-bit
vpmacswd instruction.
VPMACSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 96 /r /is4
XOP
16/32/64-bit
vpmacsww instruction.
VPMACSWW xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 95 /r /is4
XOP
16/32/64-bit
vpmacsww instruction.
VPMACSWW xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 95 /r /is4
XOP
16/32/64-bit
vpmadcsswd instruction.
VPMADCSSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A6 /r /is4
XOP
16/32/64-bit
vpmadcsswd instruction.
VPMADCSSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A6 /r /is4
XOP
16/32/64-bit
vpmadcswd instruction.
VPMADCSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 B6 /r /is4
XOP
16/32/64-bit
vpmadcswd instruction.
VPMADCSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 B6 /r /is4
XOP
16/32/64-bit
vpmadd52huq instruction.
VPMADD52HUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B5 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52HUQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B5 /r
AVX-IFMA
16/32/64-bit
vpmadd52huq instruction.
VPMADD52HUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B5 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52HUQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B5 /r
AVX-IFMA
16/32/64-bit
vpmadd52huq instruction.
VPMADD52HUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 B5 /r
AVX512_IFMA
16/32/64-bit
vpmadd52huq instruction.
VPMADD52HUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B5 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52HUQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B5 /r
AVX-IFMA
16/32/64-bit
vpmadd52huq instruction.
VPMADD52HUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B5 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52HUQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B5 /r
AVX-IFMA
16/32/64-bit
vpmadd52huq instruction.
VPMADD52HUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 B5 /r
AVX512_IFMA
16/32/64-bit
vpmadd52luq instruction.
VPMADD52LUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B4 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52LUQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B4 /r
AVX-IFMA
16/32/64-bit
vpmadd52luq instruction.
VPMADD52LUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B4 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52LUQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B4 /r
AVX-IFMA
16/32/64-bit
vpmadd52luq instruction.
VPMADD52LUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 B4 /r
AVX512_IFMA
16/32/64-bit
vpmadd52luq instruction.
VPMADD52LUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B4 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52LUQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B4 /r
AVX-IFMA
16/32/64-bit
vpmadd52luq instruction.
VPMADD52LUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B4 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52LUQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B4 /r
AVX-IFMA
16/32/64-bit
vpmadd52luq instruction.
VPMADD52LUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 B4 /r
AVX512_IFMA
16/32/64-bit
vpmaddubsw instruction.
VPMADDUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 04 /r
AVX
16/32/64-bit
VPMADDUBSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 04 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddubsw instruction.
VPMADDUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 04 /r
AVX2
16/32/64-bit
VPMADDUBSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 04 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddubsw instruction.
VPMADDUBSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 04 /r
AVX512BW
16/32/64-bit
vpmaddubsw instruction.
VPMADDUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 04 /r
AVX
16/32/64-bit
VPMADDUBSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 04 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddubsw instruction.
VPMADDUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 04 /r
AVX2
16/32/64-bit
VPMADDUBSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 04 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddubsw instruction.
VPMADDUBSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 04 /r
AVX512BW
16/32/64-bit
vpmaddwd instruction.
VPMADDWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F5 /r
AVX
16/32/64-bit
VPMADDWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddwd instruction.
VPMADDWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F5 /r
AVX2
16/32/64-bit
VPMADDWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddwd instruction.
VPMADDWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F5 /r
AVX512BW
16/32/64-bit
vpmaddwd instruction.
VPMADDWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F5 /r
AVX
16/32/64-bit
VPMADDWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddwd instruction.
VPMADDWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F5 /r
AVX2
16/32/64-bit
VPMADDWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaddwd instruction.
VPMADDWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F5 /r
AVX512BW
16/32/64-bit
vpmaskmovd instruction.
VPMASKMOVD m128, xmm1, xmm2
VEX.128.66.0F38.W0 8E /r
AVX2
16/32/64-bit
vpmaskmovd instruction.
VPMASKMOVD m256, ymm1, ymm2
VEX.256.66.0F38.W0 8E /r
AVX2
16/32/64-bit
vpmaskmovd instruction.
VPMASKMOVD xmm1, xmm2, m128
VEX.128.66.0F38.W0 8C /r
AVX2
16/32/64-bit
vpmaskmovd instruction.
VPMASKMOVD ymm1, ymm2, m256
VEX.256.66.0F38.W0 8C /r
AVX2
16/32/64-bit
vpmaskmovq instruction.
VPMASKMOVQ m128, xmm1, xmm2
VEX.128.66.0F38.W1 8E /r
AVX2
16/32/64-bit
vpmaskmovq instruction.
VPMASKMOVQ m256, ymm1, ymm2
VEX.256.66.0F38.W1 8E /r
AVX2
16/32/64-bit
vpmaskmovq instruction.
VPMASKMOVQ xmm1, xmm2, m128
VEX.128.66.0F38.W1 8C /r
AVX2
16/32/64-bit
vpmaskmovq instruction.
VPMASKMOVQ ymm1, ymm2, m256
VEX.256.66.0F38.W1 8C /r
AVX2
16/32/64-bit
vpmaxsb instruction.
VPMAXSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3C /r
AVX
16/32/64-bit
VPMAXSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3C /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsb instruction.
VPMAXSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3C /r
AVX2
16/32/64-bit
VPMAXSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3C /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsb instruction.
VPMAXSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3C /r
AVX512BW
16/32/64-bit
vpmaxsb instruction.
VPMAXSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3C /r
AVX
16/32/64-bit
VPMAXSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3C /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsb instruction.
VPMAXSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3C /r
AVX2
16/32/64-bit
VPMAXSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3C /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsb instruction.
VPMAXSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3C /r
AVX512BW
16/32/64-bit
vpmaxsd instruction.
VPMAXSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3D /r
AVX
16/32/64-bit
VPMAXSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsd instruction.
VPMAXSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3D /r
AVX2
16/32/64-bit
VPMAXSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsd instruction.
VPMAXSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3D /r
AVX512F
16/32/64-bit
vpmaxsd instruction.
VPMAXSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3D /r
AVX
16/32/64-bit
VPMAXSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsd instruction.
VPMAXSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3D /r
AVX2
16/32/64-bit
VPMAXSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsd instruction.
VPMAXSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3D /r
AVX512F
16/32/64-bit
vpmaxsq instruction.
VPMAXSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsq instruction.
VPMAXSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsq instruction.
VPMAXSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3D /r
AVX512F
16/32/64-bit
vpmaxsq instruction.
VPMAXSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsq instruction.
VPMAXSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3D /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxsq instruction.
VPMAXSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3D /r
AVX512F
16/32/64-bit
vpmaxsw instruction.
VPMAXSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EE /r
AVX
16/32/64-bit
VPMAXSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsw instruction.
VPMAXSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EE /r
AVX2
16/32/64-bit
VPMAXSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsw instruction.
VPMAXSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EE /r
AVX512BW
16/32/64-bit
vpmaxsw instruction.
VPMAXSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EE /r
AVX
16/32/64-bit
VPMAXSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsw instruction.
VPMAXSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EE /r
AVX2
16/32/64-bit
VPMAXSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxsw instruction.
VPMAXSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EE /r
AVX512BW
16/32/64-bit
vpmaxub instruction.
VPMAXUB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DE /r
AVX
16/32/64-bit
VPMAXUB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxub instruction.
VPMAXUB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DE /r
AVX2
16/32/64-bit
VPMAXUB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxub instruction.
VPMAXUB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DE /r
AVX512BW
16/32/64-bit
vpmaxub instruction.
VPMAXUB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DE /r
AVX
16/32/64-bit
VPMAXUB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxub instruction.
VPMAXUB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DE /r
AVX2
16/32/64-bit
VPMAXUB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DE /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxub instruction.
VPMAXUB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DE /r
AVX512BW
16/32/64-bit
vpmaxud instruction.
VPMAXUD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3F /r
AVX
16/32/64-bit
VPMAXUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxud instruction.
VPMAXUD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3F /r
AVX2
16/32/64-bit
VPMAXUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxud instruction.
VPMAXUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3F /r
AVX512F
16/32/64-bit
vpmaxud instruction.
VPMAXUD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3F /r
AVX
16/32/64-bit
VPMAXUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxud instruction.
VPMAXUD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3F /r
AVX2
16/32/64-bit
VPMAXUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxud instruction.
VPMAXUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3F /r
AVX512F
16/32/64-bit
vpmaxuq instruction.
VPMAXUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxuq instruction.
VPMAXUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxuq instruction.
VPMAXUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3F /r
AVX512F
16/32/64-bit
vpmaxuq instruction.
VPMAXUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxuq instruction.
VPMAXUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3F /r
AVX512VL and AVX512F
16/32/64-bit
vpmaxuq instruction.
VPMAXUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3F /r
AVX512F
16/32/64-bit
vpmaxuw instruction.
VPMAXUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3E /r
AVX
16/32/64-bit
VPMAXUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3E /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxuw instruction.
VPMAXUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3E /r
AVX2
16/32/64-bit
VPMAXUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3E /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxuw instruction.
VPMAXUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3E /r
AVX512BW
16/32/64-bit
vpmaxuw instruction.
VPMAXUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3E /r
AVX
16/32/64-bit
VPMAXUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3E /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxuw instruction.
VPMAXUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3E /r
AVX2
16/32/64-bit
VPMAXUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3E /r
AVX512VL and AVX512BW
16/32/64-bit
vpmaxuw instruction.
VPMAXUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3E /r
AVX512BW
16/32/64-bit
vpminsb instruction.
VPMINSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 38 /r
AVX
16/32/64-bit
VPMINSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 38 /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsb instruction.
VPMINSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 38 /r
AVX2
16/32/64-bit
VPMINSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 38 /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsb instruction.
VPMINSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 38 /r
AVX512BW
16/32/64-bit
vpminsb instruction.
VPMINSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 38 /r
AVX
16/32/64-bit
VPMINSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 38 /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsb instruction.
VPMINSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 38 /r
AVX2
16/32/64-bit
VPMINSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 38 /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsb instruction.
VPMINSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 38 /r
AVX512BW
16/32/64-bit
vpminsd instruction.
VPMINSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 39 /r
AVX
16/32/64-bit
VPMINSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsd instruction.
VPMINSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 39 /r
AVX2
16/32/64-bit
VPMINSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsd instruction.
VPMINSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 39 /r
AVX512F
16/32/64-bit
vpminsd instruction.
VPMINSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 39 /r
AVX
16/32/64-bit
VPMINSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsd instruction.
VPMINSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 39 /r
AVX2
16/32/64-bit
VPMINSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsd instruction.
VPMINSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 39 /r
AVX512F
16/32/64-bit
vpminsq instruction.
VPMINSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsq instruction.
VPMINSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsq instruction.
VPMINSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 39 /r
AVX512F
16/32/64-bit
vpminsq instruction.
VPMINSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsq instruction.
VPMINSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 39 /r
AVX512VL and AVX512F
16/32/64-bit
vpminsq instruction.
VPMINSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 39 /r
AVX512F
16/32/64-bit
vpminsw instruction.
VPMINSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EA /r
AVX
16/32/64-bit
VPMINSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsw instruction.
VPMINSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EA /r
AVX2
16/32/64-bit
VPMINSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsw instruction.
VPMINSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EA /r
AVX512BW
16/32/64-bit
vpminsw instruction.
VPMINSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EA /r
AVX
16/32/64-bit
VPMINSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsw instruction.
VPMINSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EA /r
AVX2
16/32/64-bit
VPMINSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminsw instruction.
VPMINSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EA /r
AVX512BW
16/32/64-bit
vpminub instruction.
VPMINUB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DA /r
AVX
16/32/64-bit
VPMINUB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminub instruction.
VPMINUB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DA /r
AVX2
16/32/64-bit
VPMINUB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminub instruction.
VPMINUB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DA /r
AVX512BW
16/32/64-bit
vpminub instruction.
VPMINUB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DA /r
AVX
16/32/64-bit
VPMINUB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminub instruction.
VPMINUB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DA /r
AVX2
16/32/64-bit
VPMINUB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DA /r
AVX512VL and AVX512BW
16/32/64-bit
vpminub instruction.
VPMINUB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DA /r
AVX512BW
16/32/64-bit
vpminud instruction.
VPMINUD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3B /r
AVX
16/32/64-bit
VPMINUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminud instruction.
VPMINUD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3B /r
AVX2
16/32/64-bit
VPMINUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminud instruction.
VPMINUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3B /r
AVX512F
16/32/64-bit
vpminud instruction.
VPMINUD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3B /r
AVX
16/32/64-bit
VPMINUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminud instruction.
VPMINUD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3B /r
AVX2
16/32/64-bit
VPMINUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminud instruction.
VPMINUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3B /r
AVX512F
16/32/64-bit
vpminuq instruction.
VPMINUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminuq instruction.
VPMINUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminuq instruction.
VPMINUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3B /r
AVX512F
16/32/64-bit
vpminuq instruction.
VPMINUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminuq instruction.
VPMINUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3B /r
AVX512VL and AVX512F
16/32/64-bit
vpminuq instruction.
VPMINUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3B /r
AVX512F
16/32/64-bit
vpminuw instruction.
VPMINUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3A /r
AVX
16/32/64-bit
VPMINUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3A /r
AVX512VL and AVX512BW
16/32/64-bit
vpminuw instruction.
VPMINUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3A /r
AVX2
16/32/64-bit
VPMINUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3A /r
AVX512VL and AVX512BW
16/32/64-bit
vpminuw instruction.
VPMINUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3A /r
AVX512BW
16/32/64-bit
vpminuw instruction.
VPMINUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3A /r
AVX
16/32/64-bit
VPMINUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3A /r
AVX512VL and AVX512BW
16/32/64-bit
vpminuw instruction.
VPMINUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3A /r
AVX2
16/32/64-bit
VPMINUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3A /r
AVX512VL and AVX512BW
16/32/64-bit
vpminuw instruction.
VPMINUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3A /r
AVX512BW
16/32/64-bit
vpmovb2m instruction.
VPMOVB2M k1, xmm1
EVEX.128.F3.0F38.W0 29 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovb2m instruction.
VPMOVB2M k1, ymm1
EVEX.256.F3.0F38.W0 29 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovb2m instruction.
VPMOVB2M k1, zmm1
EVEX.512.F3.0F38.W0 29 /r
AVX512BW
16/32/64-bit
vpmovd2m instruction.
VPMOVD2M k1, xmm1
EVEX.128.F3.0F38.W0 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovd2m instruction.
VPMOVD2M k1, ymm1
EVEX.256.F3.0F38.W0 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovd2m instruction.
VPMOVD2M k1, zmm1
EVEX.512.F3.0F38.W0 39 /r
AVX512DQ
16/32/64-bit
vpmovdb instruction.
VPMOVDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdb instruction.
VPMOVDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdb instruction.
VPMOVDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdb instruction.
VPMOVDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdb instruction.
VPMOVDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 31 /r
AVX512F
16/32/64-bit
vpmovdb instruction.
VPMOVDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 31 /r
AVX512F
16/32/64-bit
vpmovdw instruction.
VPMOVDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdw instruction.
VPMOVDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdw instruction.
VPMOVDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdw instruction.
VPMOVDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovdw instruction.
VPMOVDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 33 /r
AVX512F
16/32/64-bit
vpmovdw instruction.
VPMOVDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 33 /r
AVX512F
16/32/64-bit
vpmovm2b instruction.
VPMOVM2B xmm1, k1
EVEX.128.F3.0F38.W0 28 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovm2b instruction.
VPMOVM2B ymm1, k1
EVEX.256.F3.0F38.W0 28 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovm2b instruction.
VPMOVM2B zmm1, k1
EVEX.512.F3.0F38.W0 28 /r
AVX512BW
16/32/64-bit
vpmovm2d instruction.
VPMOVM2D xmm1, k1
EVEX.128.F3.0F38.W0 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovm2d instruction.
VPMOVM2D ymm1, k1
EVEX.256.F3.0F38.W0 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovm2d instruction.
VPMOVM2D zmm1, k1
EVEX.512.F3.0F38.W0 38 /r
AVX512DQ
16/32/64-bit
vpmovm2q instruction.
VPMOVM2Q xmm1, k1
EVEX.128.F3.0F38.W1 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovm2q instruction.
VPMOVM2Q ymm1, k1
EVEX.256.F3.0F38.W1 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovm2q instruction.
VPMOVM2Q zmm1, k1
EVEX.512.F3.0F38.W1 38 /r
AVX512DQ
16/32/64-bit
vpmovm2w instruction.
VPMOVM2W xmm1, k1
EVEX.128.F3.0F38.W1 28 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovm2w instruction.
VPMOVM2W ymm1, k1
EVEX.256.F3.0F38.W1 28 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovm2w instruction.
VPMOVM2W zmm1, k1
EVEX.512.F3.0F38.W1 28 /r
AVX512BW
16/32/64-bit
vpmovmskb instruction.
VPMOVMSKB r32, xmm1
VEX.128.66.0F.W0 D7 /r
AVX
16/32/64-bit
vpmovmskb instruction.
VPMOVMSKB r64, xmm1
VEX.128.66.0F.W1 D7 /r
AVX
64-bit
vpmovmskb instruction.
VPMOVMSKB r32, ymm1
VEX.256.66.0F.W0 D7 /r
AVX2
16/32/64-bit
vpmovmskb instruction.
VPMOVMSKB r64, ymm1
VEX.256.66.0F.W1 D7 /r
AVX2
64-bit
vpmovq2m instruction.
VPMOVQ2M k1, xmm1
EVEX.128.F3.0F38.W1 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovq2m instruction.
VPMOVQ2M k1, ymm1
EVEX.256.F3.0F38.W1 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmovq2m instruction.
VPMOVQ2M k1, zmm1
EVEX.512.F3.0F38.W1 39 /r
AVX512DQ
16/32/64-bit
vpmovqb instruction.
VPMOVQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqb instruction.
VPMOVQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqb instruction.
VPMOVQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqb instruction.
VPMOVQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqb instruction.
VPMOVQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 32 /r
AVX512F
16/32/64-bit
vpmovqb instruction.
VPMOVQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 32 /r
AVX512F
16/32/64-bit
vpmovqd instruction.
VPMOVQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqd instruction.
VPMOVQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqd instruction.
VPMOVQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqd instruction.
VPMOVQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqd instruction.
VPMOVQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 35 /r
AVX512F
16/32/64-bit
vpmovqd instruction.
VPMOVQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 35 /r
AVX512F
16/32/64-bit
vpmovqw instruction.
VPMOVQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqw instruction.
VPMOVQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqw instruction.
VPMOVQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqw instruction.
VPMOVQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovqw instruction.
VPMOVQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 34 /r
AVX512F
16/32/64-bit
vpmovqw instruction.
VPMOVQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 34 /r
AVX512F
16/32/64-bit
vpmovsdb instruction.
VPMOVSDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdb instruction.
VPMOVSDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdb instruction.
VPMOVSDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdb instruction.
VPMOVSDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdb instruction.
VPMOVSDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 21 /r
AVX512F
16/32/64-bit
vpmovsdb instruction.
VPMOVSDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 21 /r
AVX512F
16/32/64-bit
vpmovsdw instruction.
VPMOVSDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdw instruction.
VPMOVSDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdw instruction.
VPMOVSDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdw instruction.
VPMOVSDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsdw instruction.
VPMOVSDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 23 /r
AVX512F
16/32/64-bit
vpmovsdw instruction.
VPMOVSDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 23 /r
AVX512F
16/32/64-bit
vpmovsqb instruction.
VPMOVSQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqb instruction.
VPMOVSQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqb instruction.
VPMOVSQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqb instruction.
VPMOVSQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqb instruction.
VPMOVSQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 22 /r
AVX512F
16/32/64-bit
vpmovsqb instruction.
VPMOVSQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 22 /r
AVX512F
16/32/64-bit
vpmovsqd instruction.
VPMOVSQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqd instruction.
VPMOVSQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqd instruction.
VPMOVSQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqd instruction.
VPMOVSQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqd instruction.
VPMOVSQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 25 /r
AVX512F
16/32/64-bit
vpmovsqd instruction.
VPMOVSQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 25 /r
AVX512F
16/32/64-bit
vpmovsqw instruction.
VPMOVSQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqw instruction.
VPMOVSQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqw instruction.
VPMOVSQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqw instruction.
VPMOVSQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsqw instruction.
VPMOVSQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 24 /r
AVX512F
16/32/64-bit
vpmovsqw instruction.
VPMOVSQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 24 /r
AVX512F
16/32/64-bit
vpmovswb instruction.
VPMOVSWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovswb instruction.
VPMOVSWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovswb instruction.
VPMOVSWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovswb instruction.
VPMOVSWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovswb instruction.
VPMOVSWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 20 /r
AVX512BW
16/32/64-bit
vpmovswb instruction.
VPMOVSWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 20 /r
AVX512BW
16/32/64-bit
vpmovsxbd instruction.
VPMOVSXBD xmm1, xmm2/m32
VEX.128.66.0F38.WIG 21 /r
AVX
16/32/64-bit
VPMOVSXBD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbd instruction.
VPMOVSXBD ymm1, xmm2/m64
VEX.256.66.0F38.WIG 21 /r
AVX2
16/32/64-bit
VPMOVSXBD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbd instruction.
VPMOVSXBD zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 21 /r
AVX512F
16/32/64-bit
vpmovsxbd instruction.
VPMOVSXBD xmm1, xmm2/m32
VEX.128.66.0F38.WIG 21 /r
AVX
16/32/64-bit
VPMOVSXBD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbd instruction.
VPMOVSXBD ymm1, xmm2/m64
VEX.256.66.0F38.WIG 21 /r
AVX2
16/32/64-bit
VPMOVSXBD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 21 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbd instruction.
VPMOVSXBD zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 21 /r
AVX512F
16/32/64-bit
vpmovsxbq instruction.
VPMOVSXBQ xmm1, xmm2/m16
VEX.128.66.0F38.WIG 22 /r
AVX
16/32/64-bit
VPMOVSXBQ xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.WIG 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbq instruction.
VPMOVSXBQ ymm1, xmm2/m32
VEX.256.66.0F38.WIG 22 /r
AVX2
16/32/64-bit
VPMOVSXBQ ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.WIG 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbq instruction.
VPMOVSXBQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.WIG 22 /r
AVX512F
16/32/64-bit
vpmovsxbq instruction.
VPMOVSXBQ xmm1, xmm2/m16
VEX.128.66.0F38.WIG 22 /r
AVX
16/32/64-bit
VPMOVSXBQ xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.WIG 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbq instruction.
VPMOVSXBQ ymm1, xmm2/m32
VEX.256.66.0F38.WIG 22 /r
AVX2
16/32/64-bit
VPMOVSXBQ ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.WIG 22 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxbq instruction.
VPMOVSXBQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.WIG 22 /r
AVX512F
16/32/64-bit
vpmovsxbw instruction.
VPMOVSXBW xmm1, xmm2/m64
VEX.128.66.0F38.WIG 20 /r
AVX
16/32/64-bit
VPMOVSXBW xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovsxbw instruction.
VPMOVSXBW ymm1, xmm2/m128
VEX.256.66.0F38.WIG 20 /r
AVX2
16/32/64-bit
VPMOVSXBW ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovsxbw instruction.
VPMOVSXBW zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 20 /r
AVX512BW
16/32/64-bit
vpmovsxbw instruction.
VPMOVSXBW xmm1, xmm2/m64
VEX.128.66.0F38.WIG 20 /r
AVX
16/32/64-bit
VPMOVSXBW xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovsxbw instruction.
VPMOVSXBW ymm1, xmm2/m128
VEX.256.66.0F38.WIG 20 /r
AVX2
16/32/64-bit
VPMOVSXBW ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 20 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovsxbw instruction.
VPMOVSXBW zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 20 /r
AVX512BW
16/32/64-bit
vpmovsxdq instruction.
VPMOVSXDQ xmm1, xmm2/m64
VEX.128.66.0F38.WIG 25 /r
AVX
16/32/64-bit
VPMOVSXDQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxdq instruction.
VPMOVSXDQ ymm1, xmm2/m128
VEX.256.66.0F38.WIG 25 /r
AVX2
16/32/64-bit
VPMOVSXDQ ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxdq instruction.
VPMOVSXDQ zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.W0 25 /r
AVX512F
16/32/64-bit
vpmovsxdq instruction.
VPMOVSXDQ xmm1, xmm2/m64
VEX.128.66.0F38.WIG 25 /r
AVX
16/32/64-bit
VPMOVSXDQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxdq instruction.
VPMOVSXDQ ymm1, xmm2/m128
VEX.256.66.0F38.WIG 25 /r
AVX2
16/32/64-bit
VPMOVSXDQ ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxdq instruction.
VPMOVSXDQ zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.W0 25 /r
AVX512F
16/32/64-bit
vpmovsxwd instruction.
VPMOVSXWD xmm1, xmm2/m64
VEX.128.66.0F38.WIG 23 /r
AVX
16/32/64-bit
VPMOVSXWD xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwd instruction.
VPMOVSXWD ymm1, xmm2/m128
VEX.256.66.0F38.WIG 23 /r
AVX2
16/32/64-bit
VPMOVSXWD ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwd instruction.
VPMOVSXWD zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 23 /r
AVX512F
16/32/64-bit
vpmovsxwd instruction.
VPMOVSXWD xmm1, xmm2/m64
VEX.128.66.0F38.WIG 23 /r
AVX
16/32/64-bit
VPMOVSXWD xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwd instruction.
VPMOVSXWD ymm1, xmm2/m128
VEX.256.66.0F38.WIG 23 /r
AVX2
16/32/64-bit
VPMOVSXWD ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 23 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwd instruction.
VPMOVSXWD zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 23 /r
AVX512F
16/32/64-bit
vpmovsxwq instruction.
VPMOVSXWQ xmm1, xmm2/m32
VEX.128.66.0F38.WIG 24 /r
AVX
16/32/64-bit
VPMOVSXWQ xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwq instruction.
VPMOVSXWQ ymm1, xmm2/m64
VEX.256.66.0F38.WIG 24 /r
AVX2
16/32/64-bit
VPMOVSXWQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwq instruction.
VPMOVSXWQ zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 24 /r
AVX512F
16/32/64-bit
vpmovsxwq instruction.
VPMOVSXWQ xmm1, xmm2/m32
VEX.128.66.0F38.WIG 24 /r
AVX
16/32/64-bit
VPMOVSXWQ xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwq instruction.
VPMOVSXWQ ymm1, xmm2/m64
VEX.256.66.0F38.WIG 24 /r
AVX2
16/32/64-bit
VPMOVSXWQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 24 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovsxwq instruction.
VPMOVSXWQ zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 24 /r
AVX512F
16/32/64-bit
vpmovusdb instruction.
VPMOVUSDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdb instruction.
VPMOVUSDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdb instruction.
VPMOVUSDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdb instruction.
VPMOVUSDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdb instruction.
VPMOVUSDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 11 /r
AVX512F
16/32/64-bit
vpmovusdb instruction.
VPMOVUSDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 11 /r
AVX512F
16/32/64-bit
vpmovusdw instruction.
VPMOVUSDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdw instruction.
VPMOVUSDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdw instruction.
VPMOVUSDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdw instruction.
VPMOVUSDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusdw instruction.
VPMOVUSDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 13 /r
AVX512F
16/32/64-bit
vpmovusdw instruction.
VPMOVUSDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 13 /r
AVX512F
16/32/64-bit
vpmovusqb instruction.
VPMOVUSQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqb instruction.
VPMOVUSQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqb instruction.
VPMOVUSQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqb instruction.
VPMOVUSQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqb instruction.
VPMOVUSQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 12 /r
AVX512F
16/32/64-bit
vpmovusqb instruction.
VPMOVUSQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 12 /r
AVX512F
16/32/64-bit
vpmovusqd instruction.
VPMOVUSQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqd instruction.
VPMOVUSQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqd instruction.
VPMOVUSQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqd instruction.
VPMOVUSQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqd instruction.
VPMOVUSQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 15 /r
AVX512F
16/32/64-bit
vpmovusqd instruction.
VPMOVUSQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 15 /r
AVX512F
16/32/64-bit
vpmovusqw instruction.
VPMOVUSQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqw instruction.
VPMOVUSQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqw instruction.
VPMOVUSQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqw instruction.
VPMOVUSQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovusqw instruction.
VPMOVUSQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 14 /r
AVX512F
16/32/64-bit
vpmovusqw instruction.
VPMOVUSQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 14 /r
AVX512F
16/32/64-bit
vpmovuswb instruction.
VPMOVUSWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovuswb instruction.
VPMOVUSWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovuswb instruction.
VPMOVUSWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovuswb instruction.
VPMOVUSWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovuswb instruction.
VPMOVUSWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 10 /r
AVX512BW
16/32/64-bit
vpmovuswb instruction.
VPMOVUSWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 10 /r
AVX512BW
16/32/64-bit
vpmovw2m instruction.
VPMOVW2M k1, xmm1
EVEX.128.F3.0F38.W1 29 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovw2m instruction.
VPMOVW2M k1, ymm1
EVEX.256.F3.0F38.W1 29 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovw2m instruction.
VPMOVW2M k1, zmm1
EVEX.512.F3.0F38.W1 29 /r
AVX512BW
16/32/64-bit
vpmovwb instruction.
VPMOVWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovwb instruction.
VPMOVWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovwb instruction.
VPMOVWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovwb instruction.
VPMOVWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovwb instruction.
VPMOVWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 30 /r
AVX512BW
16/32/64-bit
vpmovwb instruction.
VPMOVWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 30 /r
AVX512BW
16/32/64-bit
vpmovzxbd instruction.
VPMOVZXBD xmm1, xmm2/m32
VEX.128.66.0F38.WIG 31 /r
AVX
16/32/64-bit
VPMOVZXBD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbd instruction.
VPMOVZXBD ymm1, xmm2/m64
VEX.256.66.0F38.WIG 31 /r
AVX2
16/32/64-bit
VPMOVZXBD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbd instruction.
VPMOVZXBD zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 31 /r
AVX512F
16/32/64-bit
vpmovzxbd instruction.
VPMOVZXBD xmm1, xmm2/m32
VEX.128.66.0F38.WIG 31 /r
AVX
16/32/64-bit
VPMOVZXBD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbd instruction.
VPMOVZXBD ymm1, xmm2/m64
VEX.256.66.0F38.WIG 31 /r
AVX2
16/32/64-bit
VPMOVZXBD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 31 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbd instruction.
VPMOVZXBD zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 31 /r
AVX512F
16/32/64-bit
vpmovzxbq instruction.
VPMOVZXBQ xmm1, xmm2/m16
VEX.128.66.0F38.WIG 32 /r
AVX
16/32/64-bit
VPMOVZXBQ xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.WIG 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbq instruction.
VPMOVZXBQ ymm1, xmm2/m32
VEX.256.66.0F38.WIG 32 /r
AVX2
16/32/64-bit
VPMOVZXBQ ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.WIG 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbq instruction.
VPMOVZXBQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.WIG 32 /r
AVX512F
16/32/64-bit
vpmovzxbq instruction.
VPMOVZXBQ xmm1, xmm2/m16
VEX.128.66.0F38.WIG 32 /r
AVX
16/32/64-bit
VPMOVZXBQ xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.WIG 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbq instruction.
VPMOVZXBQ ymm1, xmm2/m32
VEX.256.66.0F38.WIG 32 /r
AVX2
16/32/64-bit
VPMOVZXBQ ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.WIG 32 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxbq instruction.
VPMOVZXBQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.WIG 32 /r
AVX512F
16/32/64-bit
vpmovzxbw instruction.
VPMOVZXBW xmm1, xmm2/m64
VEX.128.66.0F38.WIG 30 /r
AVX
16/32/64-bit
VPMOVZXBW xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovzxbw instruction.
VPMOVZXBW ymm1, xmm2/m128
VEX.256.66.0F38.WIG 30 /r
AVX2
16/32/64-bit
VPMOVZXBW ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovzxbw instruction.
VPMOVZXBW zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 30 /r
AVX512BW
16/32/64-bit
vpmovzxbw instruction.
VPMOVZXBW xmm1, xmm2/m64
VEX.128.66.0F38.WIG 30 /r
AVX
16/32/64-bit
VPMOVZXBW xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovzxbw instruction.
VPMOVZXBW ymm1, xmm2/m128
VEX.256.66.0F38.WIG 30 /r
AVX2
16/32/64-bit
VPMOVZXBW ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 30 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmovzxbw instruction.
VPMOVZXBW zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 30 /r
AVX512BW
16/32/64-bit
vpmovzxdq instruction.
VPMOVZXDQ xmm1, xmm2/m64
VEX.128.66.0F38.WIG 35 /r
AVX
16/32/64-bit
VPMOVZXDQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxdq instruction.
VPMOVZXDQ ymm1, xmm2/m128
VEX.256.66.0F38.WIG 35 /r
AVX2
16/32/64-bit
VPMOVZXDQ ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxdq instruction.
VPMOVZXDQ zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.W0 35 /r
AVX512F
16/32/64-bit
vpmovzxdq instruction.
VPMOVZXDQ xmm1, xmm2/m64
VEX.128.66.0F38.WIG 35 /r
AVX
16/32/64-bit
VPMOVZXDQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxdq instruction.
VPMOVZXDQ ymm1, xmm2/m128
VEX.256.66.0F38.WIG 35 /r
AVX2
16/32/64-bit
VPMOVZXDQ ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxdq instruction.
VPMOVZXDQ zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.W0 35 /r
AVX512F
16/32/64-bit
vpmovzxwd instruction.
VPMOVZXWD xmm1, xmm2/m64
VEX.128.66.0F38.WIG 33 /r
AVX
16/32/64-bit
VPMOVZXWD xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwd instruction.
VPMOVZXWD ymm1, xmm2/m128
VEX.256.66.0F38.WIG 33 /r
AVX2
16/32/64-bit
VPMOVZXWD ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwd instruction.
VPMOVZXWD zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 33 /r
AVX512F
16/32/64-bit
vpmovzxwd instruction.
VPMOVZXWD xmm1, xmm2/m64
VEX.128.66.0F38.WIG 33 /r
AVX
16/32/64-bit
VPMOVZXWD xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwd instruction.
VPMOVZXWD ymm1, xmm2/m128
VEX.256.66.0F38.WIG 33 /r
AVX2
16/32/64-bit
VPMOVZXWD ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 33 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwd instruction.
VPMOVZXWD zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 33 /r
AVX512F
16/32/64-bit
vpmovzxwq instruction.
VPMOVZXWQ xmm1, xmm2/m32
VEX.128.66.0F38.WIG 34 /r
AVX
16/32/64-bit
VPMOVZXWQ xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwq instruction.
VPMOVZXWQ ymm1, xmm2/m64
VEX.256.66.0F38.WIG 34 /r
AVX2
16/32/64-bit
VPMOVZXWQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwq instruction.
VPMOVZXWQ zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 34 /r
AVX512F
16/32/64-bit
vpmovzxwq instruction.
VPMOVZXWQ xmm1, xmm2/m32
VEX.128.66.0F38.WIG 34 /r
AVX
16/32/64-bit
VPMOVZXWQ xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwq instruction.
VPMOVZXWQ ymm1, xmm2/m64
VEX.256.66.0F38.WIG 34 /r
AVX2
16/32/64-bit
VPMOVZXWQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 34 /r
AVX512VL and AVX512F
16/32/64-bit
vpmovzxwq instruction.
VPMOVZXWQ zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 34 /r
AVX512F
16/32/64-bit
vpmuldq instruction.
VPMULDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 28 /r
AVX
16/32/64-bit
VPMULDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuldq instruction.
VPMULDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 28 /r
AVX2
16/32/64-bit
VPMULDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuldq instruction.
VPMULDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 28 /r
AVX512F
16/32/64-bit
vpmuldq instruction.
VPMULDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 28 /r
AVX
16/32/64-bit
VPMULDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuldq instruction.
VPMULDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 28 /r
AVX2
16/32/64-bit
VPMULDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuldq instruction.
VPMULDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 28 /r
AVX512F
16/32/64-bit
vpmulhrsw instruction.
VPMULHRSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 0B /r
AVX
16/32/64-bit
VPMULHRSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 0B /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhrsw instruction.
VPMULHRSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 0B /r
AVX2
16/32/64-bit
VPMULHRSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 0B /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhrsw instruction.
VPMULHRSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 0B /r
AVX512BW
16/32/64-bit
vpmulhrsw instruction.
VPMULHRSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 0B /r
AVX
16/32/64-bit
VPMULHRSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 0B /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhrsw instruction.
VPMULHRSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 0B /r
AVX2
16/32/64-bit
VPMULHRSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 0B /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhrsw instruction.
VPMULHRSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 0B /r
AVX512BW
16/32/64-bit
vpmulhuw instruction.
VPMULHUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E4 /r
AVX
16/32/64-bit
VPMULHUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E4 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhuw instruction.
VPMULHUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E4 /r
AVX2
16/32/64-bit
VPMULHUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E4 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhuw instruction.
VPMULHUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E4 /r
AVX512BW
16/32/64-bit
vpmulhuw instruction.
VPMULHUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E4 /r
AVX
16/32/64-bit
VPMULHUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E4 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhuw instruction.
VPMULHUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E4 /r
AVX2
16/32/64-bit
VPMULHUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E4 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhuw instruction.
VPMULHUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E4 /r
AVX512BW
16/32/64-bit
vpmulhw instruction.
VPMULHW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E5 /r
AVX
16/32/64-bit
VPMULHW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhw instruction.
VPMULHW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E5 /r
AVX2
16/32/64-bit
VPMULHW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhw instruction.
VPMULHW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E5 /r
AVX512BW
16/32/64-bit
vpmulhw instruction.
VPMULHW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E5 /r
AVX
16/32/64-bit
VPMULHW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhw instruction.
VPMULHW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E5 /r
AVX2
16/32/64-bit
VPMULHW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmulhw instruction.
VPMULHW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E5 /r
AVX512BW
16/32/64-bit
vpmulld instruction.
VPMULLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 40 /r
AVX
16/32/64-bit
VPMULLD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 40 /r
AVX512VL and AVX512F
16/32/64-bit
vpmulld instruction.
VPMULLD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 40 /r
AVX2
16/32/64-bit
VPMULLD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 40 /r
AVX512VL and AVX512F
16/32/64-bit
vpmulld instruction.
VPMULLD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 40 /r
AVX512F
16/32/64-bit
vpmulld instruction.
VPMULLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 40 /r
AVX
16/32/64-bit
VPMULLD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 40 /r
AVX512VL and AVX512F
16/32/64-bit
vpmulld instruction.
VPMULLD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 40 /r
AVX2
16/32/64-bit
VPMULLD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 40 /r
AVX512VL and AVX512F
16/32/64-bit
vpmulld instruction.
VPMULLD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 40 /r
AVX512F
16/32/64-bit
vpmullq instruction.
VPMULLQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 40 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmullq instruction.
VPMULLQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 40 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmullq instruction.
VPMULLQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 40 /r
AVX512DQ
16/32/64-bit
vpmullq instruction.
VPMULLQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 40 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmullq instruction.
VPMULLQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 40 /r
AVX512VL and AVX512DQ
16/32/64-bit
vpmullq instruction.
VPMULLQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 40 /r
AVX512DQ
16/32/64-bit
vpmullw instruction.
VPMULLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D5 /r
AVX
16/32/64-bit
VPMULLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmullw instruction.
VPMULLW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D5 /r
AVX2
16/32/64-bit
VPMULLW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmullw instruction.
VPMULLW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D5 /r
AVX512BW
16/32/64-bit
vpmullw instruction.
VPMULLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D5 /r
AVX
16/32/64-bit
VPMULLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmullw instruction.
VPMULLW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D5 /r
AVX2
16/32/64-bit
VPMULLW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D5 /r
AVX512VL and AVX512BW
16/32/64-bit
vpmullw instruction.
VPMULLW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D5 /r
AVX512BW
16/32/64-bit
vpmultishiftqb instruction.
VPMULTISHIFTQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 83 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpmultishiftqb instruction.
VPMULTISHIFTQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 83 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpmultishiftqb instruction.
VPMULTISHIFTQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 83 /r
AVX512_VBMI
16/32/64-bit
vpmultishiftqb instruction.
VPMULTISHIFTQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 83 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpmultishiftqb instruction.
VPMULTISHIFTQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 83 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
vpmultishiftqb instruction.
VPMULTISHIFTQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 83 /r
AVX512_VBMI
16/32/64-bit
vpmuludq instruction.
VPMULUDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F4 /r
AVX
16/32/64-bit
VPMULUDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 F4 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuludq instruction.
VPMULUDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F4 /r
AVX2
16/32/64-bit
VPMULUDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 F4 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuludq instruction.
VPMULUDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 F4 /r
AVX512F
16/32/64-bit
vpmuludq instruction.
VPMULUDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F4 /r
AVX
16/32/64-bit
VPMULUDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 F4 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuludq instruction.
VPMULUDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F4 /r
AVX2
16/32/64-bit
VPMULUDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 F4 /r
AVX512VL and AVX512F
16/32/64-bit
vpmuludq instruction.
VPMULUDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 F4 /r
AVX512F
16/32/64-bit
vpopcntb instruction.
VPOPCNTB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntb instruction.
VPOPCNTB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntb instruction.
VPOPCNTB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 54 /r
AVX512_BITALG
16/32/64-bit
vpopcntb instruction.
VPOPCNTB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntb instruction.
VPOPCNTB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntb instruction.
VPOPCNTB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 54 /r
AVX512_BITALG
16/32/64-bit
vpopcntd instruction.
VPOPCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntd instruction.
VPOPCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntd instruction.
VPOPCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 55 /r
AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntd instruction.
VPOPCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntd instruction.
VPOPCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntd instruction.
VPOPCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 55 /r
AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntq instruction.
VPOPCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntq instruction.
VPOPCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntq instruction.
VPOPCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 55 /r
AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntq instruction.
VPOPCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntq instruction.
VPOPCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntq instruction.
VPOPCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 55 /r
AVX512_VPOPCNTDQ
16/32/64-bit
vpopcntw instruction.
VPOPCNTW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntw instruction.
VPOPCNTW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntw instruction.
VPOPCNTW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 54 /r
AVX512_BITALG
16/32/64-bit
vpopcntw instruction.
VPOPCNTW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntw instruction.
VPOPCNTW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpopcntw instruction.
VPOPCNTW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 54 /r
AVX512_BITALG
16/32/64-bit
vpor instruction.
VPOR xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EB /r
AVX
16/32/64-bit
vpor instruction.
VPOR ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EB /r
AVX2
16/32/64-bit
vpor instruction.
VPOR xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EB /r
AVX
16/32/64-bit
vpor instruction.
VPOR ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EB /r
AVX2
16/32/64-bit
vpord instruction.
VPORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 EB /r
AVX512VL and AVX512F
16/32/64-bit
vpord instruction.
VPORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 EB /r
AVX512VL and AVX512F
16/32/64-bit
vpord instruction.
VPORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 EB /r
AVX512F
16/32/64-bit
vpord instruction.
VPORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 EB /r
AVX512VL and AVX512F
16/32/64-bit
vpord instruction.
VPORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 EB /r
AVX512VL and AVX512F
16/32/64-bit
vpord instruction.
VPORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 EB /r
AVX512F
16/32/64-bit
vporq instruction.
VPORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 EB /r
AVX512VL and AVX512F
16/32/64-bit
vporq instruction.
VPORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 EB /r
AVX512VL and AVX512F
16/32/64-bit
vporq instruction.
VPORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 EB /r
AVX512F
16/32/64-bit
vporq instruction.
VPORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 EB /r
AVX512VL and AVX512F
16/32/64-bit
vporq instruction.
VPORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 EB /r
AVX512VL and AVX512F
16/32/64-bit
vporq instruction.
VPORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 EB /r
AVX512F
16/32/64-bit
vpperm instruction.
VPPERM xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A3 /r /is4
XOP
16/32/64-bit
vpperm instruction.
VPPERM xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A3 /r /is4
XOP
16/32/64-bit
vpperm instruction.
VPPERM xmm1, xmm2, xmm3, xmm4/m128
XOP.128.X8.W1 A3 /r /is4
XOP
16/32/64-bit
vprold instruction.
VPROLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /1 ib
AVX512F
16/32/64-bit
vprold instruction.
VPROLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /1 ib
AVX512F
16/32/64-bit
vprold instruction.
VPROLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /1 ib
AVX512F
16/32/64-bit
vprold instruction.
VPROLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprold instruction.
VPROLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /1 ib
AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /1 ib
AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /1 ib
AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /1 ib
AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
vprolq instruction.
VPROLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /1 ib
AVX512F
16/32/64-bit
vprolvd instruction.
VPROLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvd instruction.
VPROLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvd instruction.
VPROLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 15 /r
AVX512F
16/32/64-bit
vprolvd instruction.
VPROLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvd instruction.
VPROLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvd instruction.
VPROLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 15 /r
AVX512F
16/32/64-bit
vprolvq instruction.
VPROLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvq instruction.
VPROLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvq instruction.
VPROLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 15 /r
AVX512F
16/32/64-bit
vprolvq instruction.
VPROLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvq instruction.
VPROLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vprolvq instruction.
VPROLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 15 /r
AVX512F
16/32/64-bit
vprord instruction.
VPRORD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /0 ib
AVX512F
16/32/64-bit
vprord instruction.
VPRORD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /0 ib
AVX512F
16/32/64-bit
vprord instruction.
VPRORD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /0 ib
AVX512F
16/32/64-bit
vprord instruction.
VPRORD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprord instruction.
VPRORD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /0 ib
AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /0 ib
AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /0 ib
AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /0 ib
AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
vprorq instruction.
VPRORQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /0 ib
AVX512F
16/32/64-bit
vprorvd instruction.
VPRORVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvd instruction.
VPRORVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvd instruction.
VPRORVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 14 /r
AVX512F
16/32/64-bit
vprorvd instruction.
VPRORVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvd instruction.
VPRORVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvd instruction.
VPRORVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 14 /r
AVX512F
16/32/64-bit
vprorvq instruction.
VPRORVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvq instruction.
VPRORVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvq instruction.
VPRORVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 14 /r
AVX512F
16/32/64-bit
vprorvq instruction.
VPRORVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvq instruction.
VPRORVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vprorvq instruction.
VPRORVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 14 /r
AVX512F
16/32/64-bit
vprotb instruction.
VPROTB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 90 /r
XOP
16/32/64-bit
vprotb instruction.
VPROTB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 90 /r
XOP
16/32/64-bit
vprotb instruction.
VPROTB xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 90 /r
XOP
16/32/64-bit
vprotb instruction.
VPROTB xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C0 /r ib
XOP
16/32/64-bit
vprotb instruction.
VPROTB xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C0 /r ib
XOP
16/32/64-bit
vprotb instruction.
VPROTB xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C0 /r ib
XOP
16/32/64-bit
vprotb instruction.
VPROTB xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C0 /r ib
XOP
16/32/64-bit
vprotd instruction.
VPROTD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 92 /r
XOP
16/32/64-bit
vprotd instruction.
VPROTD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 92 /r
XOP
16/32/64-bit
vprotd instruction.
VPROTD xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 92 /r
XOP
16/32/64-bit
vprotd instruction.
VPROTD xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C2 /r ib
XOP
16/32/64-bit
vprotd instruction.
VPROTD xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C2 /r ib
XOP
16/32/64-bit
vprotd instruction.
VPROTD xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C2 /r ib
XOP
16/32/64-bit
vprotd instruction.
VPROTD xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C2 /r ib
XOP
16/32/64-bit
vprotq instruction.
VPROTQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 93 /r
XOP
16/32/64-bit
vprotq instruction.
VPROTQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 93 /r
XOP
16/32/64-bit
vprotq instruction.
VPROTQ xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 93 /r
XOP
16/32/64-bit
vprotq instruction.
VPROTQ xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C3 /r ib
XOP
16/32/64-bit
vprotq instruction.
VPROTQ xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C3 /r ib
XOP
16/32/64-bit
vprotq instruction.
VPROTQ xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C3 /r ib
XOP
16/32/64-bit
vprotq instruction.
VPROTQ xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C3 /r ib
XOP
16/32/64-bit
vprotw instruction.
VPROTW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 91 /r
XOP
16/32/64-bit
vprotw instruction.
VPROTW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 91 /r
XOP
16/32/64-bit
vprotw instruction.
VPROTW xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 91 /r
XOP
16/32/64-bit
vprotw instruction.
VPROTW xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C1 /r ib
XOP
16/32/64-bit
vprotw instruction.
VPROTW xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C1 /r ib
XOP
16/32/64-bit
vprotw instruction.
VPROTW xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C1 /r ib
XOP
16/32/64-bit
vprotw instruction.
VPROTW xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C1 /r ib
XOP
16/32/64-bit
vpsadbw instruction.
VPSADBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F6 /r
AVX
16/32/64-bit
VPSADBW xmm1, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F6 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsadbw instruction.
VPSADBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F6 /r
AVX2
16/32/64-bit
VPSADBW ymm1, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F6 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsadbw instruction.
VPSADBW zmm1, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F6 /r
AVX512BW
16/32/64-bit
vpsadbw instruction.
VPSADBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F6 /r
AVX
16/32/64-bit
VPSADBW xmm1, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F6 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsadbw instruction.
VPSADBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F6 /r
AVX2
16/32/64-bit
VPSADBW ymm1, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F6 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsadbw instruction.
VPSADBW zmm1, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F6 /r
AVX512BW
16/32/64-bit
vpscatterdd instruction.
VPSCATTERDD vm32x {k1}, xmm1
EVEX.128.66.0F38.W0 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpscatterdd instruction.
VPSCATTERDD vm32y {k1}, ymm1
EVEX.256.66.0F38.W0 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpscatterdd instruction.
VPSCATTERDD vm32z {k1}, zmm1
EVEX.512.66.0F38.W0 A0 /vsib
AVX512F
16/32/64-bit
vpscatterdq instruction.
VPSCATTERDQ vm32x {k1}, xmm1
EVEX.128.66.0F38.W1 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpscatterdq instruction.
VPSCATTERDQ vm32x {k1}, ymm1
EVEX.256.66.0F38.W1 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpscatterdq instruction.
VPSCATTERDQ vm32y {k1}, zmm1
EVEX.512.66.0F38.W1 A0 /vsib
AVX512F
16/32/64-bit
vpscatterqd instruction.
VPSCATTERQD vm64x {k1}, xmm1
EVEX.128.66.0F38.W0 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERQD vm64y {k1}, xmm1
EVEX.256.66.0F38.W0 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpscatterqd instruction.
VPSCATTERQD vm64z {k1}, ymm1
EVEX.512.66.0F38.W0 A1 /vsib
AVX512F
16/32/64-bit
vpscatterqq instruction.
VPSCATTERQQ vm64x {k1}, xmm1
EVEX.128.66.0F38.W1 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpscatterqq instruction.
VPSCATTERQQ vm64y {k1}, ymm1
EVEX.256.66.0F38.W1 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
vpscatterqq instruction.
VPSCATTERQQ vm64z {k1}, zmm1
EVEX.512.66.0F38.W1 A1 /vsib
AVX512F
16/32/64-bit
vpshab instruction.
VPSHAB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 98 /r
XOP
16/32/64-bit
vpshab instruction.
VPSHAB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 98 /r
XOP
16/32/64-bit
vpshab instruction.
VPSHAB xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 98 /r
XOP
16/32/64-bit
vpshad instruction.
VPSHAD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 9A /r
XOP
16/32/64-bit
vpshad instruction.
VPSHAD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 9A /r
XOP
16/32/64-bit
vpshad instruction.
VPSHAD xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 9A /r
XOP
16/32/64-bit
vpshaq instruction.
VPSHAQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 9B /r
XOP
16/32/64-bit
vpshaq instruction.
VPSHAQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 9B /r
XOP
16/32/64-bit
vpshaq instruction.
VPSHAQ xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 9B /r
XOP
16/32/64-bit
vpshaw instruction.
VPSHAW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 99 /r
XOP
16/32/64-bit
vpshaw instruction.
VPSHAW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 99 /r
XOP
16/32/64-bit
vpshaw instruction.
VPSHAW xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 99 /r
XOP
16/32/64-bit
vpshlb instruction.
VPSHLB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 94 /r
XOP
16/32/64-bit
vpshlb instruction.
VPSHLB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 94 /r
XOP
16/32/64-bit
vpshlb instruction.
VPSHLB xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 94 /r
XOP
16/32/64-bit
vpshld instruction.
VPSHLD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 96 /r
XOP
16/32/64-bit
vpshld instruction.
VPSHLD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 96 /r
XOP
16/32/64-bit
vpshld instruction.
VPSHLD xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 96 /r
XOP
16/32/64-bit
vpshldd instruction.
VPSHLDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldd instruction.
VPSHLDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldq instruction.
VPSHLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 71 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldvd instruction.
VPSHLDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvd instruction.
VPSHLDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvd instruction.
VPSHLDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 71 /r
AVX512_VBMI2
16/32/64-bit
vpshldvd instruction.
VPSHLDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvd instruction.
VPSHLDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvd instruction.
VPSHLDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 71 /r
AVX512_VBMI2
16/32/64-bit
vpshldvq instruction.
VPSHLDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvq instruction.
VPSHLDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvq instruction.
VPSHLDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 71 /r
AVX512_VBMI2
16/32/64-bit
vpshldvq instruction.
VPSHLDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvq instruction.
VPSHLDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvq instruction.
VPSHLDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 71 /r
AVX512_VBMI2
16/32/64-bit
vpshldvw instruction.
VPSHLDVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 70 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvw instruction.
VPSHLDVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 70 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvw instruction.
VPSHLDVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 70 /r
AVX512_VBMI2
16/32/64-bit
vpshldvw instruction.
VPSHLDVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 70 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvw instruction.
VPSHLDVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 70 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldvw instruction.
VPSHLDVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 70 /r
AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 70 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 70 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 70 /r ib
AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshldw instruction.
VPSHLDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 70 /r ib
AVX512_VBMI2
16/32/64-bit
vpshlq instruction.
VPSHLQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 97 /r
XOP
16/32/64-bit
vpshlq instruction.
VPSHLQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 97 /r
XOP
16/32/64-bit
vpshlq instruction.
VPSHLQ xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 97 /r
XOP
16/32/64-bit
vpshlw instruction.
VPSHLW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 95 /r
XOP
16/32/64-bit
vpshlw instruction.
VPSHLW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 95 /r
XOP
16/32/64-bit
vpshlw instruction.
VPSHLW xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 95 /r
XOP
16/32/64-bit
vpshrdd instruction.
VPSHRDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdd instruction.
VPSHRDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdq instruction.
VPSHRDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 73 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdvd instruction.
VPSHRDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvd instruction.
VPSHRDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvd instruction.
VPSHRDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 73 /r
AVX512_VBMI2
16/32/64-bit
vpshrdvd instruction.
VPSHRDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvd instruction.
VPSHRDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvd instruction.
VPSHRDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 73 /r
AVX512_VBMI2
16/32/64-bit
vpshrdvq instruction.
VPSHRDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvq instruction.
VPSHRDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvq instruction.
VPSHRDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 73 /r
AVX512_VBMI2
16/32/64-bit
vpshrdvq instruction.
VPSHRDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvq instruction.
VPSHRDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvq instruction.
VPSHRDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 73 /r
AVX512_VBMI2
16/32/64-bit
vpshrdvw instruction.
VPSHRDVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 72 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvw instruction.
VPSHRDVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 72 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvw instruction.
VPSHRDVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 72 /r
AVX512_VBMI2
16/32/64-bit
vpshrdvw instruction.
VPSHRDVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 72 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvw instruction.
VPSHRDVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 72 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdvw instruction.
VPSHRDVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 72 /r
AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 72 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 72 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 72 /r ib
AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
vpshrdw instruction.
VPSHRDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 72 /r ib
AVX512_VBMI2
16/32/64-bit
vpshufb instruction.
VPSHUFB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 00 /r
AVX
16/32/64-bit
VPSHUFB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 00 /r
AVX512VL and AVX512BW
16/32/64-bit
vpshufb instruction.
VPSHUFB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 00 /r
AVX2
16/32/64-bit
VPSHUFB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 00 /r
AVX512VL and AVX512BW
16/32/64-bit
vpshufb instruction.
VPSHUFB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 00 /r
AVX512BW
16/32/64-bit
vpshufb instruction.
VPSHUFB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 00 /r
AVX
16/32/64-bit
VPSHUFB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 00 /r
AVX512VL and AVX512BW
16/32/64-bit
vpshufb instruction.
VPSHUFB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 00 /r
AVX2
16/32/64-bit
VPSHUFB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 00 /r
AVX512VL and AVX512BW
16/32/64-bit
vpshufb instruction.
VPSHUFB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 00 /r
AVX512BW
16/32/64-bit
vpshufbitqmb instruction.
VPSHUFBITQMB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 8F /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpshufbitqmb instruction.
VPSHUFBITQMB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 8F /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpshufbitqmb instruction.
VPSHUFBITQMB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 8F /r
AVX512_BITALG
16/32/64-bit
vpshufbitqmb instruction.
VPSHUFBITQMB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 8F /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpshufbitqmb instruction.
VPSHUFBITQMB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 8F /r
AVX512VL and AVX512_BITALG
16/32/64-bit
vpshufbitqmb instruction.
VPSHUFBITQMB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 8F /r
AVX512_BITALG
16/32/64-bit
vpshufd instruction.
VPSHUFD xmm1, xmm2/m128, imm8
VEX.128.66.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD ymm1, ymm2/m256, imm8
VEX.256.66.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 70 /r ib
AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD xmm1, xmm2/m128, imm8
VEX.128.66.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD ymm1, ymm2/m256, imm8
VEX.256.66.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 70 /r ib
AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD xmm1, xmm2/m128, imm8
VEX.128.66.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD ymm1, ymm2/m256, imm8
VEX.256.66.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 70 /r ib
AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD xmm1, xmm2/m128, imm8
VEX.128.66.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD ymm1, ymm2/m256, imm8
VEX.256.66.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpshufd instruction.
VPSHUFD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 70 /r ib
AVX512F
16/32/64-bit
vpshufhw instruction.
VPSHUFHW xmm1, xmm2/m128, imm8
VEX.128.F3.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFHW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW ymm1, ymm2/m256, imm8
VEX.256.F3.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFHW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F3.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW xmm1, xmm2/m128, imm8
VEX.128.F3.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFHW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW ymm1, ymm2/m256, imm8
VEX.256.F3.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFHW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F3.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW xmm1, xmm2/m128, imm8
VEX.128.F3.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFHW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW ymm1, ymm2/m256, imm8
VEX.256.F3.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFHW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F3.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW xmm1, xmm2/m128, imm8
VEX.128.F3.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFHW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW ymm1, ymm2/m256, imm8
VEX.256.F3.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFHW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshufhw instruction.
VPSHUFHW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F3.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW xmm1, xmm2/m128, imm8
VEX.128.F2.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW ymm1, ymm2/m256, imm8
VEX.256.F2.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F2.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW xmm1, xmm2/m128, imm8
VEX.128.F2.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW ymm1, ymm2/m256, imm8
VEX.256.F2.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F2.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW xmm1, xmm2/m128, imm8
VEX.128.F2.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW ymm1, ymm2/m256, imm8
VEX.256.F2.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F2.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW xmm1, xmm2/m128, imm8
VEX.128.F2.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW ymm1, ymm2/m256, imm8
VEX.256.F2.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
vpshuflw instruction.
VPSHUFLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F2.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
vpsignb instruction.
VPSIGNB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 08 /r
AVX
16/32/64-bit
vpsignb instruction.
VPSIGNB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 08 /r
AVX2
16/32/64-bit
vpsignb instruction.
VPSIGNB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 08 /r
AVX
16/32/64-bit
vpsignb instruction.
VPSIGNB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 08 /r
AVX2
16/32/64-bit
vpsignd instruction.
VPSIGND xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 0A /r
AVX
16/32/64-bit
vpsignd instruction.
VPSIGND ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 0A /r
AVX2
16/32/64-bit
vpsignd instruction.
VPSIGND xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 0A /r
AVX
16/32/64-bit
vpsignd instruction.
VPSIGND ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 0A /r
AVX2
16/32/64-bit
vpsignw instruction.
VPSIGNW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 09 /r
AVX
16/32/64-bit
vpsignw instruction.
VPSIGNW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 09 /r
AVX2
16/32/64-bit
vpsignw instruction.
VPSIGNW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 09 /r
AVX
16/32/64-bit
vpsignw instruction.
VPSIGNW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 09 /r
AVX2
16/32/64-bit
vpslld instruction.
VPSLLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F2 /r
AVX
16/32/64-bit
VPSLLD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 F2 /r
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F2 /r
AVX2
16/32/64-bit
VPSLLD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 F2 /r
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 F2 /r
AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F2 /r
AVX
16/32/64-bit
VPSLLD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 F2 /r
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F2 /r
AVX2
16/32/64-bit
VPSLLD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 F2 /r
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 F2 /r
AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /6 ib
AVX
16/32/64-bit
vpslld instruction.
VPSLLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /6 ib
AVX2
16/32/64-bit
vpslld instruction.
VPSLLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /6 ib
AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /6 ib
AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /6 ib
AVX
16/32/64-bit
vpslld instruction.
VPSLLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /6 ib
AVX2
16/32/64-bit
vpslld instruction.
VPSLLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /6 ib
AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpslld instruction.
VPSLLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /6 ib
AVX512F
16/32/64-bit
vpslldq instruction.
VPSLLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLDQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /7 ib
AVX
16/32/64-bit
vpslldq instruction.
VPSLLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLDQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /7 ib
AVX2
16/32/64-bit
vpslldq instruction.
VPSLLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /7 ib
AVX512BW
16/32/64-bit
vpslldq instruction.
VPSLLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
vpslldq instruction.
VPSLLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
vpslldq instruction.
VPSLLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /7 ib
AVX512BW
16/32/64-bit
vpslldq instruction.
VPSLLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLDQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /7 ib
AVX
16/32/64-bit
vpslldq instruction.
VPSLLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLDQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /7 ib
AVX2
16/32/64-bit
vpslldq instruction.
VPSLLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /7 ib
AVX512BW
16/32/64-bit
vpslldq instruction.
VPSLLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
vpslldq instruction.
VPSLLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
vpslldq instruction.
VPSLLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /7 ib
AVX512BW
16/32/64-bit
vpsllq instruction.
VPSLLQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F3 /r
AVX
16/32/64-bit
VPSLLQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 F3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F3 /r
AVX2
16/32/64-bit
VPSLLQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 F3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 F3 /r
AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F3 /r
AVX
16/32/64-bit
VPSLLQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 F3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F3 /r
AVX2
16/32/64-bit
VPSLLQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 F3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 F3 /r
AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /6 ib
AVX
16/32/64-bit
vpsllq instruction.
VPSLLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /6 ib
AVX2
16/32/64-bit
vpsllq instruction.
VPSLLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /6 ib
AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /6 ib
AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /6 ib
AVX
16/32/64-bit
vpsllq instruction.
VPSLLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /6 ib
AVX2
16/32/64-bit
vpsllq instruction.
VPSLLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /6 ib
AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
vpsllq instruction.
VPSLLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /6 ib
AVX512F
16/32/64-bit
vpsllvd instruction.
VPSLLVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 47 /r
AVX2
16/32/64-bit
VPSLLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvd instruction.
VPSLLVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 47 /r
AVX2
16/32/64-bit
VPSLLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvd instruction.
VPSLLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 47 /r
AVX512F
16/32/64-bit
vpsllvd instruction.
VPSLLVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 47 /r
AVX2
16/32/64-bit
VPSLLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvd instruction.
VPSLLVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 47 /r
AVX2
16/32/64-bit
VPSLLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvd instruction.
VPSLLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 47 /r
AVX512F
16/32/64-bit
vpsllvq instruction.
VPSLLVQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 47 /r
AVX2
16/32/64-bit
VPSLLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvq instruction.
VPSLLVQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 47 /r
AVX2
16/32/64-bit
VPSLLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvq instruction.
VPSLLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 47 /r
AVX512F
16/32/64-bit
vpsllvq instruction.
VPSLLVQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 47 /r
AVX2
16/32/64-bit
VPSLLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvq instruction.
VPSLLVQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 47 /r
AVX2
16/32/64-bit
VPSLLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 47 /r
AVX512VL and AVX512F
16/32/64-bit
vpsllvq instruction.
VPSLLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 47 /r
AVX512F
16/32/64-bit
vpsllvw instruction.
VPSLLVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 12 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllvw instruction.
VPSLLVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 12 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllvw instruction.
VPSLLVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 12 /r
AVX512BW
16/32/64-bit
vpsllvw instruction.
VPSLLVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 12 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllvw instruction.
VPSLLVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 12 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllvw instruction.
VPSLLVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 12 /r
AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F1 /r
AVX
16/32/64-bit
VPSLLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F1 /r
AVX2
16/32/64-bit
VPSLLW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG F1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG F1 /r
AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F1 /r
AVX
16/32/64-bit
VPSLLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F1 /r
AVX2
16/32/64-bit
VPSLLW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG F1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG F1 /r
AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /6 ib
AVX
16/32/64-bit
vpsllw instruction.
VPSLLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /6 ib
AVX2
16/32/64-bit
vpsllw instruction.
VPSLLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /6 ib
AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /6 ib
AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /6 ib
AVX
16/32/64-bit
vpsllw instruction.
VPSLLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /6 ib
AVX2
16/32/64-bit
vpsllw instruction.
VPSLLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /6 ib
AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsllw instruction.
VPSLLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /6 ib
AVX512BW
16/32/64-bit
vpsrad instruction.
VPSRAD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E2 /r
AVX
16/32/64-bit
VPSRAD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG E2 /r
AVX2
16/32/64-bit
VPSRAD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 E2 /r
AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E2 /r
AVX
16/32/64-bit
VPSRAD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG E2 /r
AVX2
16/32/64-bit
VPSRAD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 E2 /r
AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /4 ib
AVX
16/32/64-bit
vpsrad instruction.
VPSRAD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /4 ib
AVX2
16/32/64-bit
vpsrad instruction.
VPSRAD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /4 ib
AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /4 ib
AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /4 ib
AVX
16/32/64-bit
vpsrad instruction.
VPSRAD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /4 ib
AVX2
16/32/64-bit
vpsrad instruction.
VPSRAD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /4 ib
AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrad instruction.
VPSRAD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /4 ib
AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 E2 /r
AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 E2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 E2 /r
AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /4 ib
AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /4 ib
AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /4 ib
AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
vpsraq instruction.
VPSRAQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /4 ib
AVX512F
16/32/64-bit
vpsravd instruction.
VPSRAVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 46 /r
AVX2
16/32/64-bit
VPSRAVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravd instruction.
VPSRAVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 46 /r
AVX2
16/32/64-bit
VPSRAVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravd instruction.
VPSRAVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 46 /r
AVX512F
16/32/64-bit
vpsravd instruction.
VPSRAVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 46 /r
AVX2
16/32/64-bit
VPSRAVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravd instruction.
VPSRAVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 46 /r
AVX2
16/32/64-bit
VPSRAVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravd instruction.
VPSRAVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 46 /r
AVX512F
16/32/64-bit
vpsravq instruction.
VPSRAVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravq instruction.
VPSRAVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravq instruction.
VPSRAVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 46 /r
AVX512F
16/32/64-bit
vpsravq instruction.
VPSRAVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravq instruction.
VPSRAVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 46 /r
AVX512VL and AVX512F
16/32/64-bit
vpsravq instruction.
VPSRAVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 46 /r
AVX512F
16/32/64-bit
vpsravw instruction.
VPSRAVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 11 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsravw instruction.
VPSRAVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 11 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsravw instruction.
VPSRAVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 11 /r
AVX512BW
16/32/64-bit
vpsravw instruction.
VPSRAVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 11 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsravw instruction.
VPSRAVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 11 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsravw instruction.
VPSRAVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 11 /r
AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E1 /r
AVX
16/32/64-bit
VPSRAW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG E1 /r
AVX2
16/32/64-bit
VPSRAW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG E1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG E1 /r
AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E1 /r
AVX
16/32/64-bit
VPSRAW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG E1 /r
AVX2
16/32/64-bit
VPSRAW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG E1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG E1 /r
AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /4 ib
AVX
16/32/64-bit
vpsraw instruction.
VPSRAW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /4 ib
AVX2
16/32/64-bit
vpsraw instruction.
VPSRAW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /4 ib
AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /4 ib
AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /4 ib
AVX
16/32/64-bit
vpsraw instruction.
VPSRAW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /4 ib
AVX2
16/32/64-bit
vpsraw instruction.
VPSRAW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /4 ib
AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsraw instruction.
VPSRAW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /4 ib
AVX512BW
16/32/64-bit
vpsrld instruction.
VPSRLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D2 /r
AVX
16/32/64-bit
VPSRLD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 D2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D2 /r
AVX2
16/32/64-bit
VPSRLD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 D2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 D2 /r
AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D2 /r
AVX
16/32/64-bit
VPSRLD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 D2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D2 /r
AVX2
16/32/64-bit
VPSRLD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 D2 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 D2 /r
AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /2 ib
AVX
16/32/64-bit
vpsrld instruction.
VPSRLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /2 ib
AVX2
16/32/64-bit
vpsrld instruction.
VPSRLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /2 ib
AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /2 ib
AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /2 ib
AVX
16/32/64-bit
vpsrld instruction.
VPSRLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /2 ib
AVX2
16/32/64-bit
vpsrld instruction.
VPSRLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /2 ib
AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrld instruction.
VPSRLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /2 ib
AVX512F
16/32/64-bit
vpsrldq instruction.
VPSRLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLDQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /3 ib
AVX
16/32/64-bit
vpsrldq instruction.
VPSRLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLDQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /3 ib
AVX2
16/32/64-bit
vpsrldq instruction.
VPSRLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /3 ib
AVX512BW
16/32/64-bit
vpsrldq instruction.
VPSRLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrldq instruction.
VPSRLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrldq instruction.
VPSRLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /3 ib
AVX512BW
16/32/64-bit
vpsrldq instruction.
VPSRLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLDQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /3 ib
AVX
16/32/64-bit
vpsrldq instruction.
VPSRLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLDQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /3 ib
AVX2
16/32/64-bit
vpsrldq instruction.
VPSRLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /3 ib
AVX512BW
16/32/64-bit
vpsrldq instruction.
VPSRLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrldq instruction.
VPSRLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrldq instruction.
VPSRLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /3 ib
AVX512BW
16/32/64-bit
vpsrlq instruction.
VPSRLQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D3 /r
AVX
16/32/64-bit
VPSRLQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 D3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D3 /r
AVX2
16/32/64-bit
VPSRLQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 D3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 D3 /r
AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D3 /r
AVX
16/32/64-bit
VPSRLQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 D3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D3 /r
AVX2
16/32/64-bit
VPSRLQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 D3 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 D3 /r
AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /2 ib
AVX
16/32/64-bit
vpsrlq instruction.
VPSRLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /2 ib
AVX2
16/32/64-bit
vpsrlq instruction.
VPSRLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /2 ib
AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /2 ib
AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /2 ib
AVX
16/32/64-bit
vpsrlq instruction.
VPSRLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /2 ib
AVX2
16/32/64-bit
vpsrlq instruction.
VPSRLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /2 ib
AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
vpsrlq instruction.
VPSRLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /2 ib
AVX512F
16/32/64-bit
vpsrlvd instruction.
VPSRLVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 45 /r
AVX2
16/32/64-bit
VPSRLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvd instruction.
VPSRLVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 45 /r
AVX2
16/32/64-bit
VPSRLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvd instruction.
VPSRLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 45 /r
AVX512F
16/32/64-bit
vpsrlvd instruction.
VPSRLVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 45 /r
AVX2
16/32/64-bit
VPSRLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvd instruction.
VPSRLVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 45 /r
AVX2
16/32/64-bit
VPSRLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvd instruction.
VPSRLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 45 /r
AVX512F
16/32/64-bit
vpsrlvq instruction.
VPSRLVQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 45 /r
AVX2
16/32/64-bit
VPSRLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvq instruction.
VPSRLVQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 45 /r
AVX2
16/32/64-bit
VPSRLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvq instruction.
VPSRLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 45 /r
AVX512F
16/32/64-bit
vpsrlvq instruction.
VPSRLVQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 45 /r
AVX2
16/32/64-bit
VPSRLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvq instruction.
VPSRLVQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 45 /r
AVX2
16/32/64-bit
VPSRLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 45 /r
AVX512VL and AVX512F
16/32/64-bit
vpsrlvq instruction.
VPSRLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 45 /r
AVX512F
16/32/64-bit
vpsrlvw instruction.
VPSRLVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlvw instruction.
VPSRLVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlvw instruction.
VPSRLVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 10 /r
AVX512BW
16/32/64-bit
vpsrlvw instruction.
VPSRLVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlvw instruction.
VPSRLVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 10 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlvw instruction.
VPSRLVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 10 /r
AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D1 /r
AVX
16/32/64-bit
VPSRLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D1 /r
AVX2
16/32/64-bit
VPSRLW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG D1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG D1 /r
AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D1 /r
AVX
16/32/64-bit
VPSRLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D1 /r
AVX2
16/32/64-bit
VPSRLW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG D1 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG D1 /r
AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /2 ib
AVX
16/32/64-bit
vpsrlw instruction.
VPSRLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /2 ib
AVX2
16/32/64-bit
vpsrlw instruction.
VPSRLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /2 ib
AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /2 ib
AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /2 ib
AVX
16/32/64-bit
vpsrlw instruction.
VPSRLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /2 ib
AVX2
16/32/64-bit
vpsrlw instruction.
VPSRLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /2 ib
AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
vpsrlw instruction.
VPSRLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /2 ib
AVX512BW
16/32/64-bit
vpsubb instruction.
VPSUBB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F8 /r
AVX
16/32/64-bit
VPSUBB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubb instruction.
VPSUBB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F8 /r
AVX2
16/32/64-bit
VPSUBB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubb instruction.
VPSUBB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F8 /r
AVX512BW
16/32/64-bit
vpsubb instruction.
VPSUBB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F8 /r
AVX
16/32/64-bit
VPSUBB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubb instruction.
VPSUBB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F8 /r
AVX2
16/32/64-bit
VPSUBB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubb instruction.
VPSUBB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F8 /r
AVX512BW
16/32/64-bit
vpsubd instruction.
VPSUBD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FA /r
AVX
16/32/64-bit
VPSUBD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 FA /r
AVX512VL and AVX512F
16/32/64-bit
vpsubd instruction.
VPSUBD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FA /r
AVX2
16/32/64-bit
VPSUBD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 FA /r
AVX512VL and AVX512F
16/32/64-bit
vpsubd instruction.
VPSUBD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 FA /r
AVX512F
16/32/64-bit
vpsubd instruction.
VPSUBD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FA /r
AVX
16/32/64-bit
VPSUBD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 FA /r
AVX512VL and AVX512F
16/32/64-bit
vpsubd instruction.
VPSUBD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FA /r
AVX2
16/32/64-bit
VPSUBD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 FA /r
AVX512VL and AVX512F
16/32/64-bit
vpsubd instruction.
VPSUBD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 FA /r
AVX512F
16/32/64-bit
vpsubq instruction.
VPSUBQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FB /r
AVX
16/32/64-bit
VPSUBQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 FB /r
AVX512VL and AVX512F
16/32/64-bit
vpsubq instruction.
VPSUBQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FB /r
AVX2
16/32/64-bit
VPSUBQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 FB /r
AVX512VL and AVX512F
16/32/64-bit
vpsubq instruction.
VPSUBQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 FB /r
AVX512F
16/32/64-bit
vpsubq instruction.
VPSUBQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FB /r
AVX
16/32/64-bit
VPSUBQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 FB /r
AVX512VL and AVX512F
16/32/64-bit
vpsubq instruction.
VPSUBQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FB /r
AVX2
16/32/64-bit
VPSUBQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 FB /r
AVX512VL and AVX512F
16/32/64-bit
vpsubq instruction.
VPSUBQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 FB /r
AVX512F
16/32/64-bit
vpsubsb instruction.
VPSUBSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E8 /r
AVX
16/32/64-bit
VPSUBSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsb instruction.
VPSUBSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E8 /r
AVX2
16/32/64-bit
VPSUBSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsb instruction.
VPSUBSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E8 /r
AVX512BW
16/32/64-bit
vpsubsb instruction.
VPSUBSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E8 /r
AVX
16/32/64-bit
VPSUBSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsb instruction.
VPSUBSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E8 /r
AVX2
16/32/64-bit
VPSUBSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsb instruction.
VPSUBSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E8 /r
AVX512BW
16/32/64-bit
vpsubsw instruction.
VPSUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E9 /r
AVX
16/32/64-bit
VPSUBSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsw instruction.
VPSUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E9 /r
AVX2
16/32/64-bit
VPSUBSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsw instruction.
VPSUBSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E9 /r
AVX512BW
16/32/64-bit
vpsubsw instruction.
VPSUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E9 /r
AVX
16/32/64-bit
VPSUBSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsw instruction.
VPSUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E9 /r
AVX2
16/32/64-bit
VPSUBSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubsw instruction.
VPSUBSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E9 /r
AVX512BW
16/32/64-bit
vpsubusb instruction.
VPSUBUSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D8 /r
AVX
16/32/64-bit
VPSUBUSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusb instruction.
VPSUBUSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D8 /r
AVX2
16/32/64-bit
VPSUBUSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusb instruction.
VPSUBUSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D8 /r
AVX512BW
16/32/64-bit
vpsubusb instruction.
VPSUBUSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D8 /r
AVX
16/32/64-bit
VPSUBUSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusb instruction.
VPSUBUSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D8 /r
AVX2
16/32/64-bit
VPSUBUSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D8 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusb instruction.
VPSUBUSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D8 /r
AVX512BW
16/32/64-bit
vpsubusw instruction.
VPSUBUSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D9 /r
AVX
16/32/64-bit
VPSUBUSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusw instruction.
VPSUBUSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D9 /r
AVX2
16/32/64-bit
VPSUBUSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusw instruction.
VPSUBUSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D9 /r
AVX512BW
16/32/64-bit
vpsubusw instruction.
VPSUBUSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D9 /r
AVX
16/32/64-bit
VPSUBUSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusw instruction.
VPSUBUSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D9 /r
AVX2
16/32/64-bit
VPSUBUSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubusw instruction.
VPSUBUSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D9 /r
AVX512BW
16/32/64-bit
vpsubw instruction.
VPSUBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F9 /r
AVX
16/32/64-bit
VPSUBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubw instruction.
VPSUBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F9 /r
AVX2
16/32/64-bit
VPSUBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubw instruction.
VPSUBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F9 /r
AVX512BW
16/32/64-bit
vpsubw instruction.
VPSUBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F9 /r
AVX
16/32/64-bit
VPSUBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubw instruction.
VPSUBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F9 /r
AVX2
16/32/64-bit
VPSUBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F9 /r
AVX512VL and AVX512BW
16/32/64-bit
vpsubw instruction.
VPSUBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F9 /r
AVX512BW
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 25 /r ib
AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 25 /r ib
AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 25 /r ib
AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogd instruction.
VPTERNLOGD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 25 /r ib
AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 25 /r ib
AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 25 /r ib
AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 25 /r ib
AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
vpternlogq instruction.
VPTERNLOGQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 25 /r ib
AVX512F
16/32/64-bit
vptest instruction.
VPTEST xmm1, xmm2/m128
VEX.128.66.0F38.WIG 17 /r
AVX
16/32/64-bit
vptest instruction.
VPTEST ymm1, ymm2/m256
VEX.256.66.0F38.WIG 17 /r
AVX
16/32/64-bit
vptest instruction.
VPTEST xmm1, xmm2/m128
VEX.128.66.0F38.WIG 17 /r
AVX
16/32/64-bit
vptest instruction.
VPTEST ymm1, ymm2/m256
VEX.256.66.0F38.WIG 17 /r
AVX
16/32/64-bit
vptestmb instruction.
VPTESTMB k2 {k1}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmb instruction.
VPTESTMB k2 {k1}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmb instruction.
VPTESTMB k2 {k1}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 26 /r
AVX512BW
16/32/64-bit
vptestmb instruction.
VPTESTMB k2 {k1}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmb instruction.
VPTESTMB k2 {k1}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmb instruction.
VPTESTMB k2 {k1}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 26 /r
AVX512BW
16/32/64-bit
vptestmd instruction.
VPTESTMD k2 {k1}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmd instruction.
VPTESTMD k2 {k1}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmd instruction.
VPTESTMD k2 {k1}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 27 /r
AVX512F
16/32/64-bit
vptestmd instruction.
VPTESTMD k2 {k1}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmd instruction.
VPTESTMD k2 {k1}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmd instruction.
VPTESTMD k2 {k1}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 27 /r
AVX512F
16/32/64-bit
vptestmq instruction.
VPTESTMQ k2 {k1}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmq instruction.
VPTESTMQ k2 {k1}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmq instruction.
VPTESTMQ k2 {k1}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 27 /r
AVX512F
16/32/64-bit
vptestmq instruction.
VPTESTMQ k2 {k1}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmq instruction.
VPTESTMQ k2 {k1}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestmq instruction.
VPTESTMQ k2 {k1}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 27 /r
AVX512F
16/32/64-bit
vptestmw instruction.
VPTESTMW k2 {k1}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmw instruction.
VPTESTMW k2 {k1}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmw instruction.
VPTESTMW k2 {k1}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 26 /r
AVX512BW
16/32/64-bit
vptestmw instruction.
VPTESTMW k2 {k1}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmw instruction.
VPTESTMW k2 {k1}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestmw instruction.
VPTESTMW k2 {k1}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 26 /r
AVX512BW
16/32/64-bit
vptestnmb instruction.
VPTESTNMB k2 {k1}, xmm2, xmm3/m128
EVEX.128.F3.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmb instruction.
VPTESTNMB k2 {k1}, ymm2, ymm3/m256
EVEX.256.F3.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmb instruction.
VPTESTNMB k2 {k1}, zmm2, zmm3/m512
EVEX.512.F3.0F38.W0 26 /r
AVX512BW
16/32/64-bit
vptestnmb instruction.
VPTESTNMB k2 {k1}, xmm2, xmm3/m128
EVEX.128.F3.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmb instruction.
VPTESTNMB k2 {k1}, ymm2, ymm3/m256
EVEX.256.F3.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmb instruction.
VPTESTNMB k2 {k1}, zmm2, zmm3/m512
EVEX.512.F3.0F38.W0 26 /r
AVX512BW
16/32/64-bit
vptestnmd instruction.
VPTESTNMD k2 {k1}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmd instruction.
VPTESTNMD k2 {k1}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmd instruction.
VPTESTNMD k2 {k1}, zmm2, zmm3/m512/m32bcst
EVEX.512.F3.0F38.W0 27 /r
AVX512F
16/32/64-bit
vptestnmd instruction.
VPTESTNMD k2 {k1}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmd instruction.
VPTESTNMD k2 {k1}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmd instruction.
VPTESTNMD k2 {k1}, zmm2, zmm3/m512/m32bcst
EVEX.512.F3.0F38.W0 27 /r
AVX512F
16/32/64-bit
vptestnmq instruction.
VPTESTNMQ k2 {k1}, xmm2, xmm3/m128/m64bcst
EVEX.128.F3.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmq instruction.
VPTESTNMQ k2 {k1}, ymm2, ymm3/m256/m64bcst
EVEX.256.F3.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmq instruction.
VPTESTNMQ k2 {k1}, zmm2, zmm3/m512/m64bcst
EVEX.512.F3.0F38.W1 27 /r
AVX512F
16/32/64-bit
vptestnmq instruction.
VPTESTNMQ k2 {k1}, xmm2, xmm3/m128/m64bcst
EVEX.128.F3.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmq instruction.
VPTESTNMQ k2 {k1}, ymm2, ymm3/m256/m64bcst
EVEX.256.F3.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
vptestnmq instruction.
VPTESTNMQ k2 {k1}, zmm2, zmm3/m512/m64bcst
EVEX.512.F3.0F38.W1 27 /r
AVX512F
16/32/64-bit
vptestnmw instruction.
VPTESTNMW k2 {k1}, xmm2, xmm3/m128
EVEX.128.F3.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmw instruction.
VPTESTNMW k2 {k1}, ymm2, ymm3/m256
EVEX.256.F3.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmw instruction.
VPTESTNMW k2 {k1}, zmm2, zmm3/m512
EVEX.512.F3.0F38.W1 26 /r
AVX512BW
16/32/64-bit
vptestnmw instruction.
VPTESTNMW k2 {k1}, xmm2, xmm3/m128
EVEX.128.F3.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmw instruction.
VPTESTNMW k2 {k1}, ymm2, ymm3/m256
EVEX.256.F3.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
vptestnmw instruction.
VPTESTNMW k2 {k1}, zmm2, zmm3/m512
EVEX.512.F3.0F38.W1 26 /r
AVX512BW
16/32/64-bit
vpunpckhbw instruction.
VPUNPCKHBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 68 /r
AVX
16/32/64-bit
VPUNPCKHBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 68 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhbw instruction.
VPUNPCKHBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 68 /r
AVX2
16/32/64-bit
VPUNPCKHBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 68 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhbw instruction.
VPUNPCKHBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 68 /r
AVX512BW
16/32/64-bit
vpunpckhbw instruction.
VPUNPCKHBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 68 /r
AVX
16/32/64-bit
VPUNPCKHBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 68 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhbw instruction.
VPUNPCKHBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 68 /r
AVX2
16/32/64-bit
VPUNPCKHBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 68 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhbw instruction.
VPUNPCKHBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 68 /r
AVX512BW
16/32/64-bit
vpunpckhdq instruction.
VPUNPCKHDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6A /r
AVX
16/32/64-bit
VPUNPCKHDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 6A /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhdq instruction.
VPUNPCKHDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6A /r
AVX2
16/32/64-bit
VPUNPCKHDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 6A /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhdq instruction.
VPUNPCKHDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 6A /r
AVX512F
16/32/64-bit
vpunpckhdq instruction.
VPUNPCKHDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6A /r
AVX
16/32/64-bit
VPUNPCKHDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 6A /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhdq instruction.
VPUNPCKHDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6A /r
AVX2
16/32/64-bit
VPUNPCKHDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 6A /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhdq instruction.
VPUNPCKHDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 6A /r
AVX512F
16/32/64-bit
vpunpckhqdq instruction.
VPUNPCKHQDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6D /r
AVX
16/32/64-bit
VPUNPCKHQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 6D /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhqdq instruction.
VPUNPCKHQDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6D /r
AVX2
16/32/64-bit
VPUNPCKHQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 6D /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhqdq instruction.
VPUNPCKHQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 6D /r
AVX512F
16/32/64-bit
vpunpckhqdq instruction.
VPUNPCKHQDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6D /r
AVX
16/32/64-bit
VPUNPCKHQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 6D /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhqdq instruction.
VPUNPCKHQDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6D /r
AVX2
16/32/64-bit
VPUNPCKHQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 6D /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckhqdq instruction.
VPUNPCKHQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 6D /r
AVX512F
16/32/64-bit
vpunpckhwd instruction.
VPUNPCKHWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 69 /r
AVX
16/32/64-bit
VPUNPCKHWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 69 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhwd instruction.
VPUNPCKHWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 69 /r
AVX2
16/32/64-bit
VPUNPCKHWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 69 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhwd instruction.
VPUNPCKHWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 69 /r
AVX512BW
16/32/64-bit
vpunpckhwd instruction.
VPUNPCKHWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 69 /r
AVX
16/32/64-bit
VPUNPCKHWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 69 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhwd instruction.
VPUNPCKHWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 69 /r
AVX2
16/32/64-bit
VPUNPCKHWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 69 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpckhwd instruction.
VPUNPCKHWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 69 /r
AVX512BW
16/32/64-bit
vpunpcklbw instruction.
VPUNPCKLBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 60 /r
AVX
16/32/64-bit
VPUNPCKLBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 60 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklbw instruction.
VPUNPCKLBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 60 /r
AVX2
16/32/64-bit
VPUNPCKLBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 60 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklbw instruction.
VPUNPCKLBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 60 /r
AVX512BW
16/32/64-bit
vpunpcklbw instruction.
VPUNPCKLBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 60 /r
AVX
16/32/64-bit
VPUNPCKLBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 60 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklbw instruction.
VPUNPCKLBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 60 /r
AVX2
16/32/64-bit
VPUNPCKLBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 60 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklbw instruction.
VPUNPCKLBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 60 /r
AVX512BW
16/32/64-bit
vpunpckldq instruction.
VPUNPCKLDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 62 /r
AVX
16/32/64-bit
VPUNPCKLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 62 /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckldq instruction.
VPUNPCKLDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 62 /r
AVX2
16/32/64-bit
VPUNPCKLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 62 /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckldq instruction.
VPUNPCKLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 62 /r
AVX512F
16/32/64-bit
vpunpckldq instruction.
VPUNPCKLDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 62 /r
AVX
16/32/64-bit
VPUNPCKLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 62 /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckldq instruction.
VPUNPCKLDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 62 /r
AVX2
16/32/64-bit
VPUNPCKLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 62 /r
AVX512VL and AVX512F
16/32/64-bit
vpunpckldq instruction.
VPUNPCKLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 62 /r
AVX512F
16/32/64-bit
vpunpcklqdq instruction.
VPUNPCKLQDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6C /r
AVX
16/32/64-bit
VPUNPCKLQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 6C /r
AVX512VL and AVX512F
16/32/64-bit
vpunpcklqdq instruction.
VPUNPCKLQDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6C /r
AVX2
16/32/64-bit
VPUNPCKLQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 6C /r
AVX512VL and AVX512F
16/32/64-bit
vpunpcklqdq instruction.
VPUNPCKLQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 6C /r
AVX512F
16/32/64-bit
vpunpcklqdq instruction.
VPUNPCKLQDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6C /r
AVX
16/32/64-bit
VPUNPCKLQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 6C /r
AVX512VL and AVX512F
16/32/64-bit
vpunpcklqdq instruction.
VPUNPCKLQDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6C /r
AVX2
16/32/64-bit
VPUNPCKLQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 6C /r
AVX512VL and AVX512F
16/32/64-bit
vpunpcklqdq instruction.
VPUNPCKLQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 6C /r
AVX512F
16/32/64-bit
vpunpcklwd instruction.
VPUNPCKLWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 61 /r
AVX
16/32/64-bit
VPUNPCKLWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 61 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklwd instruction.
VPUNPCKLWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 61 /r
AVX2
16/32/64-bit
VPUNPCKLWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 61 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklwd instruction.
VPUNPCKLWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 61 /r
AVX512BW
16/32/64-bit
vpunpcklwd instruction.
VPUNPCKLWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 61 /r
AVX
16/32/64-bit
VPUNPCKLWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 61 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklwd instruction.
VPUNPCKLWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 61 /r
AVX2
16/32/64-bit
VPUNPCKLWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 61 /r
AVX512VL and AVX512BW
16/32/64-bit
vpunpcklwd instruction.
VPUNPCKLWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 61 /r
AVX512BW
16/32/64-bit
vpxor instruction.
VPXOR xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EF /r
AVX
16/32/64-bit
vpxor instruction.
VPXOR ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EF /r
AVX2
16/32/64-bit
vpxor instruction.
VPXOR xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EF /r
AVX
16/32/64-bit
vpxor instruction.
VPXOR ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EF /r
AVX2
16/32/64-bit
vpxord instruction.
VPXORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxord instruction.
VPXORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxord instruction.
VPXORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 EF /r
AVX512F
16/32/64-bit
vpxord instruction.
VPXORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxord instruction.
VPXORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxord instruction.
VPXORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 EF /r
AVX512F
16/32/64-bit
vpxorq instruction.
VPXORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxorq instruction.
VPXORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxorq instruction.
VPXORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 EF /r
AVX512F
16/32/64-bit
vpxorq instruction.
VPXORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxorq instruction.
VPXORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 EF /r
AVX512VL and AVX512F
16/32/64-bit
vpxorq instruction.
VPXORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 EF /r
AVX512F
16/32/64-bit
vrangepd instruction.
VRANGEPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 50 /r ib
AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 50 /r ib
AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 50 /r ib
AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangepd instruction.
VRANGEPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 50 /r ib
AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 50 /r ib
AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 50 /r ib
AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 50 /r ib
AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vrangeps instruction.
VRANGEPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 50 /r ib
AVX512DQ
16/32/64-bit
vrangesd instruction.
VRANGESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 51 /r ib
AVX512DQ
16/32/64-bit
vrangesd instruction.
VRANGESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 51 /r ib
AVX512DQ
16/32/64-bit
vrangesd instruction.
VRANGESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 51 /r ib
AVX512DQ
16/32/64-bit
vrangesd instruction.
VRANGESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 51 /r ib
AVX512DQ
16/32/64-bit
vrangess instruction.
VRANGESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 51 /r ib
AVX512DQ
16/32/64-bit
vrangess instruction.
VRANGESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 51 /r ib
AVX512DQ
16/32/64-bit
vrangess instruction.
VRANGESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 51 /r ib
AVX512DQ
16/32/64-bit
vrangess instruction.
VRANGESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 51 /r ib
AVX512DQ
16/32/64-bit
vrcp14pd instruction.
VRCP14PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14pd instruction.
VRCP14PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14pd instruction.
VRCP14PD zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 4C /r
AVX512F
16/32/64-bit
vrcp14pd instruction.
VRCP14PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14pd instruction.
VRCP14PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14pd instruction.
VRCP14PD zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 4C /r
AVX512F
16/32/64-bit
vrcp14ps instruction.
VRCP14PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14ps instruction.
VRCP14PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14ps instruction.
VRCP14PS zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 4C /r
AVX512F
16/32/64-bit
vrcp14ps instruction.
VRCP14PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14ps instruction.
VRCP14PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 4C /r
AVX512VL and AVX512F
16/32/64-bit
vrcp14ps instruction.
VRCP14PS zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 4C /r
AVX512F
16/32/64-bit
vrcp14sd instruction.
VRCP14SD xmm1 {k1}{z}, xmm2, xmm3/m64
EVEX.LIG.66.0F38.W1 4D /r
AVX512F
16/32/64-bit
vrcp14sd instruction.
VRCP14SD xmm1 {k1}{z}, xmm2, xmm3/m64
EVEX.LIG.66.0F38.W1 4D /r
AVX512F
16/32/64-bit
vrcp14ss instruction.
VRCP14SS xmm1 {k1}{z}, xmm2, xmm3/m32
EVEX.LIG.66.0F38.W0 4D /r
AVX512F
16/32/64-bit
vrcp14ss instruction.
VRCP14SS xmm1 {k1}{z}, xmm2, xmm3/m32
EVEX.LIG.66.0F38.W0 4D /r
AVX512F
16/32/64-bit
vrcp28pd instruction.
VRCP28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 CA /r
AVX512ER
16/32/64-bit
vrcp28pd instruction.
VRCP28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 CA /r
AVX512ER
16/32/64-bit
vrcp28ps instruction.
VRCP28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 CA /r
AVX512ER
16/32/64-bit
vrcp28ps instruction.
VRCP28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 CA /r
AVX512ER
16/32/64-bit
vrcp28sd instruction.
VRCP28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 CB /r
AVX512ER
16/32/64-bit
vrcp28sd instruction.
VRCP28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 CB /r
AVX512ER
16/32/64-bit
vrcp28ss instruction.
VRCP28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 CB /r
AVX512ER
16/32/64-bit
vrcp28ss instruction.
VRCP28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 CB /r
AVX512ER
16/32/64-bit
vrcpph instruction.
VRCPPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 4C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrcpph instruction.
VRCPPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 4C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrcpph instruction.
VRCPPH zmm1 {k1}{z}, zmm2/m512/m16bcst
EVEX.512.66.MAP6.W0 4C /r
AVX512-FP16
16/32/64-bit
vrcpph instruction.
VRCPPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 4C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrcpph instruction.
VRCPPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 4C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrcpph instruction.
VRCPPH zmm1 {k1}{z}, zmm2/m512/m16bcst
EVEX.512.66.MAP6.W0 4C /r
AVX512-FP16
16/32/64-bit
vrcpps instruction.
VRCPPS xmm1, xmm2/m128
VEX.128.0F.WIG 53 /r
AVX
16/32/64-bit
vrcpps instruction.
VRCPPS ymm1, ymm2/m256
VEX.256.0F.WIG 53 /r
AVX
16/32/64-bit
vrcpps instruction.
VRCPPS xmm1, xmm2/m128
VEX.128.0F.WIG 53 /r
AVX
16/32/64-bit
vrcpps instruction.
VRCPPS ymm1, ymm2/m256
VEX.256.0F.WIG 53 /r
AVX
16/32/64-bit
vrcpsh instruction.
VRCPSH xmm1 {k1}{z}, xmm2, xmm3/m16
EVEX.LIG.66.MAP6.W0 4D /r
AVX512-FP16
16/32/64-bit
vrcpsh instruction.
VRCPSH xmm1 {k1}{z}, xmm2, xmm3/m16
EVEX.LIG.66.MAP6.W0 4D /r
AVX512-FP16
16/32/64-bit
vrcpss instruction.
VRCPSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 53 /r
AVX
16/32/64-bit
vrcpss instruction.
VRCPSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 53 /r
AVX
16/32/64-bit
vreducepd instruction.
VREDUCEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 56 /r ib
AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 56 /r ib
AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 56 /r ib
AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreducepd instruction.
VREDUCEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 56 /r ib
AVX512DQ
16/32/64-bit
vreduceph instruction.
VREDUCEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 56 /r ib
AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 56 /r ib
AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 56 /r ib
AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vreduceph instruction.
VREDUCEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 56 /r ib
AVX512-FP16
16/32/64-bit
vreduceps instruction.
VREDUCEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 56 /r ib
AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 56 /r ib
AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 56 /r ib
AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
vreduceps instruction.
VREDUCEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 56 /r ib
AVX512DQ
16/32/64-bit
vreducesd instruction.
VREDUCESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 57 /r ib
AVX512DQ
16/32/64-bit
vreducesd instruction.
VREDUCESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 57 /r ib
AVX512DQ
16/32/64-bit
vreducesd instruction.
VREDUCESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 57 /r ib
AVX512DQ
16/32/64-bit
vreducesd instruction.
VREDUCESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 57 /r ib
AVX512DQ
16/32/64-bit
vreducesh instruction.
VREDUCESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 57 /r ib
AVX512-FP16
16/32/64-bit
vreducesh instruction.
VREDUCESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 57 /r ib
AVX512-FP16
16/32/64-bit
vreducesh instruction.
VREDUCESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 57 /r ib
AVX512-FP16
16/32/64-bit
vreducesh instruction.
VREDUCESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 57 /r ib
AVX512-FP16
16/32/64-bit
vreducess instruction.
VREDUCESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 57 /r ib
AVX512DQ
16/32/64-bit
vreducess instruction.
VREDUCESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 57 /r ib
AVX512DQ
16/32/64-bit
vreducess instruction.
VREDUCESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 57 /r ib
AVX512DQ
16/32/64-bit
vreducess instruction.
VREDUCESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 57 /r ib
AVX512DQ
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 09 /r ib
AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 09 /r ib
AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 09 /r ib
AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscalepd instruction.
VRNDSCALEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 09 /r ib
AVX512F
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 08 /r ib
AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 08 /r ib
AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 08 /r ib
AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
vrndscaleph instruction.
VRNDSCALEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 08 /r ib
AVX512-FP16
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 08 /r ib
AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 08 /r ib
AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 08 /r ib
AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
vrndscaleps instruction.
VRNDSCALEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 08 /r ib
AVX512F
16/32/64-bit
vrndscalesd instruction.
VRNDSCALESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 0B /r ib
AVX512F
16/32/64-bit
vrndscalesd instruction.
VRNDSCALESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 0B /r ib
AVX512F
16/32/64-bit
vrndscalesd instruction.
VRNDSCALESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 0B /r ib
AVX512F
16/32/64-bit
vrndscalesd instruction.
VRNDSCALESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 0B /r ib
AVX512F
16/32/64-bit
vrndscalesh instruction.
VRNDSCALESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 0A /r ib
AVX512-FP16
16/32/64-bit
vrndscalesh instruction.
VRNDSCALESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 0A /r ib
AVX512-FP16
16/32/64-bit
vrndscalesh instruction.
VRNDSCALESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 0A /r ib
AVX512-FP16
16/32/64-bit
vrndscalesh instruction.
VRNDSCALESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 0A /r ib
AVX512-FP16
16/32/64-bit
vrndscaless instruction.
VRNDSCALESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 0A /r ib
AVX512F
16/32/64-bit
vrndscaless instruction.
VRNDSCALESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 0A /r ib
AVX512F
16/32/64-bit
vrndscaless instruction.
VRNDSCALESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 0A /r ib
AVX512F
16/32/64-bit
vrndscaless instruction.
VRNDSCALESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 0A /r ib
AVX512F
16/32/64-bit
vroundpd instruction.
VROUNDPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundpd instruction.
VROUNDPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundpd instruction.
VROUNDPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundpd instruction.
VROUNDPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundpd instruction.
VROUNDPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundpd instruction.
VROUNDPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundpd instruction.
VROUNDPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundpd instruction.
VROUNDPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundps instruction.
VROUNDPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
vroundsd instruction.
VROUNDSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.66.0F3A.WIG 0B /r ib
AVX
16/32/64-bit
vroundsd instruction.
VROUNDSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.66.0F3A.WIG 0B /r ib
AVX
16/32/64-bit
vroundsd instruction.
VROUNDSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.66.0F3A.WIG 0B /r ib
AVX
16/32/64-bit
vroundsd instruction.
VROUNDSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.66.0F3A.WIG 0B /r ib
AVX
16/32/64-bit
vroundss instruction.
VROUNDSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.66.0F3A.WIG 0A /r ib
AVX
16/32/64-bit
vroundss instruction.
VROUNDSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.66.0F3A.WIG 0A /r ib
AVX
16/32/64-bit
vroundss instruction.
VROUNDSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.66.0F3A.WIG 0A /r ib
AVX
16/32/64-bit
vroundss instruction.
VROUNDSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.66.0F3A.WIG 0A /r ib
AVX
16/32/64-bit
vrsqrt14pd instruction.
VRSQRT14PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14pd instruction.
VRSQRT14PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14pd instruction.
VRSQRT14PD zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 4E /r
AVX512F
16/32/64-bit
vrsqrt14pd instruction.
VRSQRT14PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14pd instruction.
VRSQRT14PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14pd instruction.
VRSQRT14PD zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 4E /r
AVX512F
16/32/64-bit
vrsqrt14ps instruction.
VRSQRT14PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14ps instruction.
VRSQRT14PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14ps instruction.
VRSQRT14PS zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 4E /r
AVX512F
16/32/64-bit
vrsqrt14ps instruction.
VRSQRT14PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14ps instruction.
VRSQRT14PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 4E /r
AVX512VL and AVX512F
16/32/64-bit
vrsqrt14ps instruction.
VRSQRT14PS zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 4E /r
AVX512F
16/32/64-bit
vrsqrt14sd instruction.
VRSQRT14SD xmm1 {k1}{z}, xmm2, xmm3/m64
EVEX.LIG.66.0F38.W1 4F /r
AVX512F
16/32/64-bit
vrsqrt14sd instruction.
VRSQRT14SD xmm1 {k1}{z}, xmm2, xmm3/m64
EVEX.LIG.66.0F38.W1 4F /r
AVX512F
16/32/64-bit
vrsqrt14ss instruction.
VRSQRT14SS xmm1 {k1}{z}, xmm2, xmm3/m32
EVEX.LIG.66.0F38.W0 4F /r
AVX512F
16/32/64-bit
vrsqrt14ss instruction.
VRSQRT14SS xmm1 {k1}{z}, xmm2, xmm3/m32
EVEX.LIG.66.0F38.W0 4F /r
AVX512F
16/32/64-bit
vrsqrt28pd instruction.
VRSQRT28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 CC /r
AVX512ER
16/32/64-bit
vrsqrt28pd instruction.
VRSQRT28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 CC /r
AVX512ER
16/32/64-bit
vrsqrt28ps instruction.
VRSQRT28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 CC /r
AVX512ER
16/32/64-bit
vrsqrt28ps instruction.
VRSQRT28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 CC /r
AVX512ER
16/32/64-bit
vrsqrt28sd instruction.
VRSQRT28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 CD /r
AVX512ER
16/32/64-bit
vrsqrt28sd instruction.
VRSQRT28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 CD /r
AVX512ER
16/32/64-bit
vrsqrt28ss instruction.
VRSQRT28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 CD /r
AVX512ER
16/32/64-bit
vrsqrt28ss instruction.
VRSQRT28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 CD /r
AVX512ER
16/32/64-bit
vrsqrtph instruction.
VRSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 4E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrsqrtph instruction.
VRSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 4E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrsqrtph instruction.
VRSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst
EVEX.512.66.MAP6.W0 4E /r
AVX512-FP16
16/32/64-bit
vrsqrtph instruction.
VRSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 4E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrsqrtph instruction.
VRSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 4E /r
AVX512VL and AVX512-FP16
16/32/64-bit
vrsqrtph instruction.
VRSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst
EVEX.512.66.MAP6.W0 4E /r
AVX512-FP16
16/32/64-bit
vrsqrtps instruction.
VRSQRTPS xmm1, xmm2/m128
VEX.128.0F.WIG 52 /r
AVX
16/32/64-bit
vrsqrtps instruction.
VRSQRTPS ymm1, ymm2/m256
VEX.256.0F.WIG 52 /r
AVX
16/32/64-bit
vrsqrtps instruction.
VRSQRTPS xmm1, xmm2/m128
VEX.128.0F.WIG 52 /r
AVX
16/32/64-bit
vrsqrtps instruction.
VRSQRTPS ymm1, ymm2/m256
VEX.256.0F.WIG 52 /r
AVX
16/32/64-bit
vrsqrtsh instruction.
VRSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16
EVEX.LIG.66.MAP6.W0 4F /r
AVX512-FP16
16/32/64-bit
vrsqrtsh instruction.
VRSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16
EVEX.LIG.66.MAP6.W0 4F /r
AVX512-FP16
16/32/64-bit
vrsqrtss instruction.
VRSQRTSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 52 /r
AVX
16/32/64-bit
vrsqrtss instruction.
VRSQRTSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 52 /r
AVX
16/32/64-bit
vscalefpd instruction.
VSCALEFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefpd instruction.
VSCALEFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefpd instruction.
VSCALEFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 2C /r
AVX512F
16/32/64-bit
vscalefpd instruction.
VSCALEFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefpd instruction.
VSCALEFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefpd instruction.
VSCALEFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 2C /r
AVX512F
16/32/64-bit
vscalefph instruction.
VSCALEFPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 2C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vscalefph instruction.
VSCALEFPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 2C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vscalefph instruction.
VSCALEFPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 2C /r
AVX512-FP16
16/32/64-bit
vscalefph instruction.
VSCALEFPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 2C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vscalefph instruction.
VSCALEFPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 2C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vscalefph instruction.
VSCALEFPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 2C /r
AVX512-FP16
16/32/64-bit
vscalefps instruction.
VSCALEFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefps instruction.
VSCALEFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefps instruction.
VSCALEFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 2C /r
AVX512F
16/32/64-bit
vscalefps instruction.
VSCALEFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefps instruction.
VSCALEFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 2C /r
AVX512VL and AVX512F
16/32/64-bit
vscalefps instruction.
VSCALEFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 2C /r
AVX512F
16/32/64-bit
vscalefsd instruction.
VSCALEFSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 2D /r
AVX512F
16/32/64-bit
vscalefsd instruction.
VSCALEFSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 2D /r
AVX512F
16/32/64-bit
vscalefsh instruction.
VSCALEFSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 2D /r
AVX512-FP16
16/32/64-bit
vscalefsh instruction.
VSCALEFSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 2D /r
AVX512-FP16
16/32/64-bit
vscalefss instruction.
VSCALEFSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 2D /r
AVX512F
16/32/64-bit
vscalefss instruction.
VSCALEFSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 2D /r
AVX512F
16/32/64-bit
vscatterdpd instruction.
VSCATTERDPD vm32x {k1}, xmm1
EVEX.128.66.0F38.W1 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
vscatterdpd instruction.
VSCATTERDPD vm32x {k1}, ymm1
EVEX.256.66.0F38.W1 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
vscatterdpd instruction.
VSCATTERDPD vm32y {k1}, zmm1
EVEX.512.66.0F38.W1 A2 /vsib
AVX512F
16/32/64-bit
vscatterdps instruction.
VSCATTERDPS vm32x {k1}, xmm1
EVEX.128.66.0F38.W0 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
vscatterdps instruction.
VSCATTERDPS vm32y {k1}, ymm1
EVEX.256.66.0F38.W0 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
vscatterdps instruction.
VSCATTERDPS vm32z {k1}, zmm1
EVEX.512.66.0F38.W0 A2 /vsib
AVX512F
16/32/64-bit
vscatterpf0dpd instruction.
VSCATTERPF0DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /5 /vsib
AVX512PF
16/32/64-bit
vscatterpf0dps instruction.
VSCATTERPF0DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /5 /vsib
AVX512PF
16/32/64-bit
vscatterpf0qpd instruction.
VSCATTERPF0QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /5 /vsib
AVX512PF
16/32/64-bit
vscatterpf0qps instruction.
VSCATTERPF0QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /5 /vsib
AVX512PF
16/32/64-bit
vscatterpf1dpd instruction.
VSCATTERPF1DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /6 /vsib
AVX512PF
16/32/64-bit
vscatterpf1dps instruction.
VSCATTERPF1DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /6 /vsib
AVX512PF
16/32/64-bit
vscatterpf1qpd instruction.
VSCATTERPF1QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /6 /vsib
AVX512PF
16/32/64-bit
vscatterpf1qps instruction.
VSCATTERPF1QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /6 /vsib
AVX512PF
16/32/64-bit
vscatterqpd instruction.
VSCATTERQPD vm64x {k1}, xmm1
EVEX.128.66.0F38.W1 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
vscatterqpd instruction.
VSCATTERQPD vm64y {k1}, ymm1
EVEX.256.66.0F38.W1 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
vscatterqpd instruction.
VSCATTERQPD vm64z {k1}, zmm1
EVEX.512.66.0F38.W1 A3 /vsib
AVX512F
16/32/64-bit
vscatterqps instruction.
VSCATTERQPS vm64x {k1}, xmm1
EVEX.128.66.0F38.W0 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERQPS vm64y {k1}, xmm1
EVEX.256.66.0F38.W0 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
vscatterqps instruction.
VSCATTERQPS vm64z {k1}, ymm1
EVEX.512.66.0F38.W0 A3 /vsib
AVX512F
16/32/64-bit
vsha512msg1 instruction.
VSHA512MSG1 ymm1, xmm2
VEX.256.F2.0F38.W0 CC 11:rrr:bbb
AVX and SHA512
16/32/64-bit
vsha512msg2 instruction.
VSHA512MSG2 ymm1, ymm2
VEX.256.F2.0F38.W0 CD 11:rrr:bbb
AVX and SHA512
16/32/64-bit
vsha512rnds2 instruction.
VSHA512RNDS2 ymm1, ymm2, xmm3
VEX.256.F2.0F38.W0 CB 11:rrr:bbb
AVX and SHA512
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 23 /r ib
AVX512F
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 23 /r ib
AVX512F
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 23 /r ib
AVX512F
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff32x4 instruction.
VSHUFF32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 23 /r ib
AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 23 /r ib
AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 23 /r ib
AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 23 /r ib
AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshuff64x2 instruction.
VSHUFF64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 23 /r ib
AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 43 /r ib
AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 43 /r ib
AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 43 /r ib
AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi32x4 instruction.
VSHUFI32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 43 /r ib
AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 43 /r ib
AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 43 /r ib
AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 43 /r ib
AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufi64x2 instruction.
VSHUFI64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 43 /r ib
AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F.W1 C6 /r ib
AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F.W1 C6 /r ib
AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F.W1 C6 /r ib
AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufpd instruction.
VSHUFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F.W1 C6 /r ib
AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.0F.W0 C6 /r ib
AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.0F.W0 C6 /r ib
AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.0F.W0 C6 /r ib
AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
vshufps instruction.
VSHUFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.0F.W0 C6 /r ib
AVX512F
16/32/64-bit
vsm3msg1 instruction.
VSM3MSG1 xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 DA /r
AVX and SM3
16/32/64-bit
vsm3msg1 instruction.
VSM3MSG1 xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 DA /r
AVX and SM3
16/32/64-bit
vsm3msg2 instruction.
VSM3MSG2 xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 DA /r
AVX and SM3
16/32/64-bit
vsm3msg2 instruction.
VSM3MSG2 xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 DA /r
AVX and SM3
16/32/64-bit
vsm3rnds2 instruction.
VSM3RNDS2 xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 DE /r ib
AVX and SM3
16/32/64-bit
vsm3rnds2 instruction.
VSM3RNDS2 xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 DE /r ib
AVX and SM3
16/32/64-bit
vsm3rnds2 instruction.
VSM3RNDS2 xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 DE /r ib
AVX and SM3
16/32/64-bit
vsm3rnds2 instruction.
VSM3RNDS2 xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 DE /r ib
AVX and SM3
16/32/64-bit
vsm4key4 instruction.
VSM4KEY4 xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsm4key4 instruction.
VSM4KEY4 ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsm4key4 instruction.
VSM4KEY4 xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsm4key4 instruction.
VSM4KEY4 ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsm4rnds4 instruction.
VSM4RNDS4 xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsm4rnds4 instruction.
VSM4RNDS4 ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsm4rnds4 instruction.
VSM4RNDS4 xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsm4rnds4 instruction.
VSM4RNDS4 ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
vsqrtpd instruction.
VSQRTPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtpd instruction.
VSQRTPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtpd instruction.
VSQRTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 51 /r
AVX512F
16/32/64-bit
vsqrtpd instruction.
VSQRTPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtpd instruction.
VSQRTPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtpd instruction.
VSQRTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 51 /r
AVX512F
16/32/64-bit
vsqrtph instruction.
VSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 51 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsqrtph instruction.
VSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 51 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsqrtph instruction.
VSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.MAP5.W0 51 /r
AVX512-FP16
16/32/64-bit
vsqrtph instruction.
VSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 51 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsqrtph instruction.
VSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 51 /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsqrtph instruction.
VSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.MAP5.W0 51 /r
AVX512-FP16
16/32/64-bit
vsqrtps instruction.
VSQRTPS xmm1, xmm2/m128
VEX.128.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtps instruction.
VSQRTPS ymm1, ymm2/m256
VEX.256.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtps instruction.
VSQRTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 51 /r
AVX512F
16/32/64-bit
vsqrtps instruction.
VSQRTPS xmm1, xmm2/m128
VEX.128.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtps instruction.
VSQRTPS ymm1, ymm2/m256
VEX.256.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 51 /r
AVX512VL and AVX512F
16/32/64-bit
vsqrtps instruction.
VSQRTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 51 /r
AVX512F
16/32/64-bit
vsqrtsd instruction.
VSQRTSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 51 /r
AVX512F
16/32/64-bit
vsqrtsd instruction.
VSQRTSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 51 /r
AVX512F
16/32/64-bit
vsqrtsh instruction.
VSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 51 /r
AVX512-FP16
16/32/64-bit
vsqrtsh instruction.
VSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 51 /r
AVX512-FP16
16/32/64-bit
vsqrtss instruction.
VSQRTSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 51 /r
AVX512F
16/32/64-bit
vsqrtss instruction.
VSQRTSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 51 /r
AVX512F
16/32/64-bit
vstmxcsr instruction.
VSTMXCSR m32
VEX.LZ.0F.WIG AE /3
AVX
16/32/64-bit
vsubpd instruction.
VSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubpd instruction.
VSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubpd instruction.
VSUBPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 5C /r
AVX512F
16/32/64-bit
vsubpd instruction.
VSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubpd instruction.
VSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubpd instruction.
VSUBPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 5C /r
AVX512F
16/32/64-bit
vsubph instruction.
VSUBPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsubph instruction.
VSUBPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsubph instruction.
VSUBPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 5C /r
AVX512-FP16
16/32/64-bit
vsubph instruction.
VSUBPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsubph instruction.
VSUBPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5C /r
AVX512VL and AVX512-FP16
16/32/64-bit
vsubph instruction.
VSUBPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 5C /r
AVX512-FP16
16/32/64-bit
vsubps instruction.
VSUBPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubps instruction.
VSUBPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubps instruction.
VSUBPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 5C /r
AVX512F
16/32/64-bit
vsubps instruction.
VSUBPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubps instruction.
VSUBPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5C /r
AVX512VL and AVX512F
16/32/64-bit
vsubps instruction.
VSUBPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 5C /r
AVX512F
16/32/64-bit
vsubsd instruction.
VSUBSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5C /r
AVX512F
16/32/64-bit
vsubsd instruction.
VSUBSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5C /r
AVX512F
16/32/64-bit
vsubsh instruction.
VSUBSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 5C /r
AVX512-FP16
16/32/64-bit
vsubsh instruction.
VSUBSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 5C /r
AVX512-FP16
16/32/64-bit
vsubss instruction.
VSUBSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 5C /r
AVX512F
16/32/64-bit
vsubss instruction.
VSUBSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 5C /r
AVX512F
16/32/64-bit
vtestpd instruction.
VTESTPD xmm1, xmm2/m128
VEX.128.66.0F38.W0 0F /r
AVX
16/32/64-bit
vtestpd instruction.
VTESTPD ymm1, ymm2/m256
VEX.256.66.0F38.W0 0F /r
AVX
16/32/64-bit
vtestpd instruction.
VTESTPD xmm1, xmm2/m128
VEX.128.66.0F38.W0 0F /r
AVX
16/32/64-bit
vtestpd instruction.
VTESTPD ymm1, ymm2/m256
VEX.256.66.0F38.W0 0F /r
AVX
16/32/64-bit
vtestps instruction.
VTESTPS xmm1, xmm2/m128
VEX.128.66.0F38.W0 0E /r
AVX
16/32/64-bit
vtestps instruction.
VTESTPS ymm1, ymm2/m256
VEX.256.66.0F38.W0 0E /r
AVX
16/32/64-bit
vtestps instruction.
VTESTPS xmm1, xmm2/m128
VEX.128.66.0F38.W0 0E /r
AVX
16/32/64-bit
vtestps instruction.
VTESTPS ymm1, ymm2/m256
VEX.256.66.0F38.W0 0E /r
AVX
16/32/64-bit
vucomisd instruction.
VUCOMISD xmm1, xmm2/m64
VEX.LIG.66.0F.WIG 2E /r
AVX
16/32/64-bit
VUCOMISD xmm1, xmm2/m64{sae}
EVEX.LIG.66.0F.W1 2E /r
AVX512F
16/32/64-bit
vucomisd instruction.
VUCOMISD xmm1, xmm2/m64
VEX.LIG.66.0F.WIG 2E /r
AVX
16/32/64-bit
VUCOMISD xmm1, xmm2/m64{sae}
EVEX.LIG.66.0F.W1 2E /r
AVX512F
16/32/64-bit
vucomish instruction.
VUCOMISH xmm1, xmm2/m16{sae}
EVEX.LIG.MAP5.W0 2E /r
AVX512-FP16
16/32/64-bit
vucomish instruction.
VUCOMISH xmm1, xmm2/m16{sae}
EVEX.LIG.MAP5.W0 2E /r
AVX512-FP16
16/32/64-bit
vucomiss instruction.
VUCOMISS xmm1, xmm2/m32
VEX.LIG.0F.WIG 2E /r
AVX
16/32/64-bit
VUCOMISS xmm1, xmm2/m32{sae}
EVEX.LIG.0F.W0 2E /r
AVX512F
16/32/64-bit
vucomiss instruction.
VUCOMISS xmm1, xmm2/m32
VEX.LIG.0F.WIG 2E /r
AVX
16/32/64-bit
VUCOMISS xmm1, xmm2/m32{sae}
EVEX.LIG.0F.W0 2E /r
AVX512F
16/32/64-bit
vunpckhpd instruction.
VUNPCKHPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhpd instruction.
VUNPCKHPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhpd instruction.
VUNPCKHPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 15 /r
AVX512F
16/32/64-bit
vunpckhpd instruction.
VUNPCKHPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhpd instruction.
VUNPCKHPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhpd instruction.
VUNPCKHPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 15 /r
AVX512F
16/32/64-bit
vunpckhps instruction.
VUNPCKHPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhps instruction.
VUNPCKHPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhps instruction.
VUNPCKHPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 15 /r
AVX512F
16/32/64-bit
vunpckhps instruction.
VUNPCKHPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhps instruction.
VUNPCKHPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
vunpckhps instruction.
VUNPCKHPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 15 /r
AVX512F
16/32/64-bit
vunpcklpd instruction.
VUNPCKLPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklpd instruction.
VUNPCKLPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklpd instruction.
VUNPCKLPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 14 /r
AVX512F
16/32/64-bit
vunpcklpd instruction.
VUNPCKLPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklpd instruction.
VUNPCKLPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklpd instruction.
VUNPCKLPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 14 /r
AVX512F
16/32/64-bit
vunpcklps instruction.
VUNPCKLPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklps instruction.
VUNPCKLPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklps instruction.
VUNPCKLPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 14 /r
AVX512F
16/32/64-bit
vunpcklps instruction.
VUNPCKLPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklps instruction.
VUNPCKLPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
vunpcklps instruction.
VUNPCKLPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 14 /r
AVX512F
16/32/64-bit
vxorpd instruction.
VXORPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorpd instruction.
VXORPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorpd instruction.
VXORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 57 /r
AVX512DQ
16/32/64-bit
vxorpd instruction.
VXORPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorpd instruction.
VXORPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorpd instruction.
VXORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 57 /r
AVX512DQ
16/32/64-bit
vxorps instruction.
VXORPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorps instruction.
VXORPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorps instruction.
VXORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 57 /r
AVX512DQ
16/32/64-bit
vxorps instruction.
VXORPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorps instruction.
VXORPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
vxorps instruction.
VXORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 57 /r
AVX512DQ
16/32/64-bit
vzeroall instruction.
VZEROALL
VEX.256.0F.WIG 77
AVX
16/32/64-bit
vzeroupper instruction.
VZEROUPPER
VEX.128.0F.WIG 77
AVX
16/32/64-bit
wait instruction.
WAIT
9B
8086+
16/32/64-bit
wbinvd instruction.
WBINVD
0F 09
486+
16/32/64-bit
wbnoinvd instruction.
WBNOINVD
F3 0F 09
WBNOINVD
16/32/64-bit
wrfsbase instruction.
WRFSBASE r32
F3 0F AE /2
FSGSBASE
64-bit
wrfsbase instruction.
WRFSBASE r64
F3 o64 0F AE /2
FSGSBASE
64-bit
wrgsbase instruction.
WRGSBASE r32
F3 0F AE /3
FSGSBASE
64-bit
wrgsbase instruction.
WRGSBASE r64
F3 o64 0F AE /3
FSGSBASE
64-bit
wrmsr instruction.
WRMSR
0F 30
MSR
16/32/64-bit
wrmsrlist instruction.
WRMSRLIST
F3 0F 01 C6
MSRLIST
64-bit
wrmsrns instruction.
WRMSRNS
NP 0F 01 C6
WRMSRNS
16/32/64-bit
wrpkru instruction.
WRPKRU
NP 0F 01 EF
PKU
16/32/64-bit
wrshr instruction.
WRSHR r/m32
0F 37 /0
Cyrix 6x86MX, M II, III
16/32-bit
wrshr instruction.
WRSHR r/m32
0F 37 /0
Cyrix 6x86MX, M II, III
16/32-bit
wrssd instruction.
WRSSD m32, r32
NP 0F 38 F6 /r
CET_SS
16/32/64-bit
wrssq instruction.
WRSSQ m64, r64
NP o64 0F 38 F6 /r
CET_SS
64-bit
wrudbg instruction.
WRUDBG
0F 0F
UDBG
16/32/64-bit
wrussd instruction.
WRUSSD m32, r32
66 0F 38 F5 /r
CET_SS
16/32/64-bit
wrussq instruction.
WRUSSQ m64, r64
66 o64 0F 38 F5 /r
CET_SS
64-bit
xabort instruction.
XABORT imm8
C6 F8 ib
RTM
16/32/64-bit
xabort instruction.
XABORT imm8
C6 F8 ib
RTM
16/32/64-bit
xadd instruction.
XADD r/m8, r8
0F C0 /r
486+
16/32/64-bit
xadd instruction.
XADD r/m8, r8
0F C0 /r
486+
16/32/64-bit
xadd instruction.
XADD r/m16, r16
o16 0F C1 /r
486+
16/32/64-bit
xadd instruction.
XADD r/m16, r16
o16 0F C1 /r
486+
16/32/64-bit
xadd instruction.
XADD r/m32, r32
o32 0F C1 /r
486+
16/32/64-bit
xadd instruction.
XADD r/m32, r32
o32 0F C1 /r
486+
16/32/64-bit
xadd instruction.
XADD r/m64, r64
o64 0F C1 /r
X64
64-bit
xadd instruction.
XADD r/m64, r64
o64 0F C1 /r
X64
64-bit
xbegin instruction.
XBEGIN rel16
o16 C7 F8 cw
RTM
16/32/64-bit
XBEGIN rel32
o32 C7 F8 cd
RTM
16/32/64-bit
xbegin instruction.
XBEGIN rel16
o16 C7 F8 cw
RTM
16/32/64-bit
XBEGIN rel32
o32 C7 F8 cd
RTM
16/32/64-bit
xbts instruction.
XBTS r16, r/m16
o16 0F A6 /r
386 A0
16/32-bit
xbts instruction.
XBTS r32, r/m32
o32 0F A6 /r
386 A0
16/32-bit
xbts instruction.
XBTS r16, r/m16
o16 0F A6 /r
386 A0
16/32-bit
xbts instruction.
XBTS r32, r/m32
o32 0F A6 /r
386 A0
16/32-bit
xchg instruction.
XCHG r/m8, r8
86 /r
8086+
16/32/64-bit
xchg instruction.
XCHG r/m8, r8
86 /r
8086+
16/32/64-bit
xchg instruction.
XCHG r16, AX
o16 90+rw
8086+
16/32/64-bit
XCHG r/m16, r16
o16 87 /r
8086+
16/32/64-bit
xchg instruction.
XCHG r/m16, r16
o16 87 /r
8086+
16/32/64-bit
xchg instruction.
XCHG r32, EAX
o32 90+rd
386+
16/32/64-bit
XCHG r/m32, r32
o32 87 /r
386+
16/32/64-bit
xchg instruction.
XCHG r/m32, r32
o32 87 /r
386+
16/32/64-bit
xchg instruction.
XCHG r64, RAX
o64 90+ro
X64
64-bit
XCHG r/m64, r64
o64 87 /r
X64
64-bit
xchg instruction.
XCHG r/m64, r64
o64 87 /r
X64
64-bit
xcryptcbc instruction.
XCRYPTCBC
a64 F3 0F A7 D0
PADLOCK_ACE
64-bit
XCRYPTCBC
a32 F3 0F A7 D0
PADLOCK_ACE
16/32/64-bit
XCRYPTCBC
a16 F3 0F A7 D0
PADLOCK_ACE
16/32-bit
xcryptcfb instruction.
XCRYPTCFB
a64 F3 0F A7 E0
PADLOCK_ACE
64-bit
XCRYPTCFB
a32 F3 0F A7 E0
PADLOCK_ACE
16/32/64-bit
XCRYPTCFB
a16 F3 0F A7 E0
PADLOCK_ACE
16/32-bit
xcryptctr instruction.
XCRYPTCTR
a64 F3 0F A7 D8
PADLOCK_ACE
64-bit
XCRYPTCTR
a32 F3 0F A7 D8
PADLOCK_ACE
16/32/64-bit
XCRYPTCTR
a16 F3 0F A7 D8
PADLOCK_ACE
16/32-bit
xcryptecb instruction.
XCRYPTECB
a64 F3 0F A7 C8
PADLOCK_ACE
64-bit
XCRYPTECB
a32 F3 0F A7 C8
PADLOCK_ACE
16/32/64-bit
XCRYPTECB
a16 F3 0F A7 C8
PADLOCK_ACE
16/32-bit
xcryptofb instruction.
XCRYPTOFB
a64 F3 0F A7 E8
PADLOCK_ACE
64-bit
XCRYPTOFB
a32 F3 0F A7 E8
PADLOCK_ACE
16/32/64-bit
XCRYPTOFB
a16 F3 0F A7 E8
PADLOCK_ACE
16/32-bit
xend instruction.
XEND
NP 0F 01 D5
RTM
16/32/64-bit
xgetbv instruction.
XGETBV
NP 0F 01 D0
XSAVE
16/32/64-bit
xor instruction.
XOR r/m8, r8
30 /r
8086+
16/32/64-bit
xor instruction.
XOR r/m8, r8
30 /r
8086+
16/32/64-bit
xor instruction.
XOR r/m16, r16
o16 31 /r
8086+
16/32/64-bit
xor instruction.
XOR r/m16, r16
o16 31 /r
8086+
16/32/64-bit
xor instruction.
XOR r/m32, r32
o32 31 /r
386+
16/32/64-bit
xor instruction.
XOR r/m32, r32
o32 31 /r
386+
16/32/64-bit
xor instruction.
XOR r/m64, r64
o64 31 /r
X64
64-bit
xor instruction.
XOR r/m64, r64
o64 31 /r
X64
64-bit
xor instruction.
XOR r8, r/m8
32 /r
8086+
16/32/64-bit
xor instruction.
XOR r16, r/m16
o16 33 /r
8086+
16/32/64-bit
xor instruction.
XOR r32, r/m32
o32 33 /r
386+
16/32/64-bit
xor instruction.
XOR r64, r/m64
o64 33 /r
X64
64-bit
xor instruction.
XOR AL, imm8
34 ib
8086+
16/32/64-bit
XOR r/m8, imm8
80 /6 ib
8086+
16/32/64-bit
xor instruction.
XOR AX, imm16
o16 35 iw
8086+
16/32/64-bit
XOR r/m16, imm16
o16 81 /6 iw
8086+
16/32/64-bit
XOR r/m16, imm8
o16 83 /6 ib
8086+
16/32/64-bit
xor instruction.
XOR EAX, imm32
o32 35 id
386+
16/32/64-bit
XOR r/m32, imm32
o32 81 /6 id
386+
16/32/64-bit
XOR r/m32, imm8
o32 83 /6 ib
386+
16/32/64-bit
xor instruction.
XOR RAX, imm32
o64 35 id
X64
64-bit
XOR r/m64, imm32
o64 81 /6 id
X64
64-bit
XOR r/m64, imm8
o64 83 /6 ib
X64
64-bit
xor instruction.
XOR r/m64, imm32
o64 81 /6 id
X64
64-bit
XOR r/m64, imm8
o64 83 /6 ib
X64
64-bit
XOR r/m32, imm32
o32 81 /6 id
386+
16/32/64-bit
XOR r/m32, imm8
o32 83 /6 ib
386+
16/32/64-bit
XOR r/m16, imm16
o16 81 /6 iw
8086+
16/32/64-bit
XOR r/m16, imm8
o16 83 /6 ib
8086+
16/32/64-bit
XOR r/m8, imm8
80 /6 ib
8086+
16/32/64-bit
xor instruction.
XOR AL, imm8
34 ib
8086+
16/32/64-bit
XOR r/m8, imm8
80 /6 ib
8086+
16/32/64-bit
xor instruction.
XOR AX, imm16
o16 35 iw
8086+
16/32/64-bit
XOR r/m16, imm16
o16 81 /6 iw
8086+
16/32/64-bit
XOR r/m16, imm8
o16 83 /6 ib
8086+
16/32/64-bit
xor instruction.
XOR EAX, imm32
o32 35 id
386+
16/32/64-bit
XOR r/m32, imm32
o32 81 /6 id
386+
16/32/64-bit
XOR r/m32, imm8
o32 83 /6 ib
386+
16/32/64-bit
xor instruction.
XOR r/m32, imm32
o32 81 /6 id
386+
16/32/64-bit
XOR r/m32, imm8
o32 83 /6 ib
386+
16/32/64-bit
XOR r/m16, imm16
o16 81 /6 iw
8086+
16/32/64-bit
XOR r/m16, imm8
o16 83 /6 ib
8086+
16/32/64-bit
XOR r/m8, imm8
80 /6 ib
8086+
16/32/64-bit
xorpd instruction.
XORPD xmm1, xmm2/m128
66 0F 57 /r
SSE2
16/32/64-bit
xorpd instruction.
XORPD xmm1, xmm2/m128
66 0F 57 /r
SSE2
16/32/64-bit
xorps instruction.
XORPS xmm1, xmm2/m128
NP 0F 57 /r
SSE
16/32/64-bit
xorps instruction.
XORPS xmm1, xmm2/m128
NP 0F 57 /r
SSE
16/32/64-bit
xresldtrk instruction.
XRESLDTRK
F2 0F 01 E9
TSXLDTRK
16/32/64-bit
xrstor instruction.
XRSTOR mem
NP 0F AE /5
XSAVE
16/32/64-bit
xrstor64 instruction.
XRSTOR64 mem
NP o64 0F AE /5
XSAVE
64-bit
xrstors instruction.
XRSTORS mem
NP 0F C7 /3
XSAVES
16/32/64-bit
xrstors64 instruction.
XRSTORS64 mem
NP o64 0F C7 /3
XSAVES
64-bit
xsave instruction.
XSAVE mem
NP 0F AE /4
XSAVE
16/32/64-bit
xsave64 instruction.
XSAVE64 mem
NP o64 0F AE /4
XSAVE
64-bit
xsavec instruction.
XSAVEC mem
NP 0F C7 /4
XSAVEC
16/32/64-bit
xsavec64 instruction.
XSAVEC64 mem
NP o64 0F C7 /4
XSAVEC
64-bit
xsaveopt instruction.
XSAVEOPT mem
NP 0F AE /6
XSAVEOPT
16/32/64-bit
xsaveopt64 instruction.
XSAVEOPT64 mem
NP o64 0F AE /6
XSAVEOPT
64-bit
xsaves instruction.
XSAVES mem
NP 0F C7 /5
XSAVES
16/32/64-bit
xsaves64 instruction.
XSAVES64 mem
NP o64 0F C7 /5
XSAVES
64-bit
xsetbv instruction.
XSETBV
NP 0F 01 D1
XSAVE
16/32/64-bit
xsha1 instruction.
XSHA1
a64 F3 0F A6 C8
PADLOCK_PHE
64-bit
XSHA1
a32 F3 0F A6 C8
PADLOCK_PHE
16/32/64-bit
XSHA1
a16 F3 0F A6 C8
PADLOCK_PHE
16/32-bit
xsha256 instruction.
XSHA256
a64 F3 0F A6 D0
PADLOCK_PHE
64-bit
XSHA256
a32 F3 0F A6 D0
PADLOCK_PHE
16/32/64-bit
XSHA256
a16 F3 0F A6 D0
PADLOCK_PHE
16/32-bit
xsha512 instruction.
XSHA512
a64 F3 0F A6 E0
PADLOCK_PHE
64-bit
XSHA512
a32 F3 0F A6 E0
PADLOCK_PHE
16/32/64-bit
XSHA512
a16 F3 0F A6 E0
PADLOCK_PHE
16/32-bit
xsha512_alt instruction.
XSHA512_ALT
a64 F3 0F A6 D8
PADLOCK_PHE
64-bit
XSHA512_ALT
a32 F3 0F A6 D8
PADLOCK_PHE
16/32/64-bit
XSHA512_ALT
a16 F3 0F A6 D8
PADLOCK_PHE
16/32-bit
xstore instruction.
XSTORE
a64 0F A7 C0
PADLOCK_RNG
64-bit
XSTORE
a32 0F A7 C0
PADLOCK_RNG
16/32/64-bit
XSTORE
a16 0F A7 C0
PADLOCK_RNG
16/32-bit
xstore_alt instruction.
XSTORE_ALT
a64 F3 0F A7 F8
PADLOCK_RNG
64-bit
XSTORE_ALT
a32 F3 0F A7 F8
PADLOCK_RNG
16/32/64-bit
XSTORE_ALT
a16 F3 0F A7 F8
PADLOCK_RNG
16/32-bit
xsusldtrk instruction.
XSUSLDTRK
F2 0F 01 E8
TSXLDTRK
16/32/64-bit
xtest instruction.
XTEST
NP 0F 01 D6
HLE or RTM
16/32/64-bit
zero_bytes instruction.
A zero-sized instruction. Can be used as a label.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type byte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a db asm directive with the type sbyte.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type ushort.
Creates a dw asm directive with the type short.
Creates a dw asm directive with the type short.
Creates a dw asm directive with the type short.
Creates a dw asm directive with the type short.
Creates a dw asm directive with the type short.
Creates a dw asm directive with the type short.
Creates a dw asm directive with the type short.
Creates a dw asm directive with the type short.
Creates a dd asm directive with the type uint.
Creates a dd asm directive with the type uint.
Creates a dd asm directive with the type uint.
Creates a dd asm directive with the type uint.
Creates a dd asm directive with the type int.
Creates a dd asm directive with the type int.
Creates a dd asm directive with the type int.
Creates a dd asm directive with the type int.
Creates a dd asm directive with the type float.
Creates a dd asm directive with the type float.
Creates a dd asm directive with the type float.
Creates a dd asm directive with the type float.
Creates a dq asm directive with the type ulong.
Creates a dq asm directive with the type ulong.
Creates a dq asm directive with the type long.
Creates a dq asm directive with the type long.
Creates a dq asm directive with the type double.
Creates a dq asm directive with the type double.
Defines an assembly memory operand used with .
Creates a new instance.
Size of the operand.
Segment register.
Base register.
Index register.
Scale of the index.
Displacement.
Flags attached to this operand.
Gets the size of the operand.
Gets the segment register.
Gets the register used as a base.
Gets the register used as an index.
Gets the scale applied to the index register.
Gets the displacement.
Gets the mask associated with this operand.
Gets a boolean indicating if this memory operand is a broadcast.
Gets a boolean indicating if this memory operand is a memory access using displacement only (no base and index registers are used).
Apply mask Register K1.
Apply mask Register K2.
Apply mask Register K3.
Apply mask Register K4.
Apply mask Register K5.
Apply mask Register K6.
Apply mask Register K7.
Adds a 16-bit memory operand with an new base or index.
The base or index.
The memory operand.
Adds a 32-bit memory operand with an new base or index.
The base or index.
The memory operand.
Adds a 64-bit memory operand with an new base or index.
The base or index.
The memory operand.
Adds a displacement to a memory operand.
The memory operand.
displacement.
Subtracts a displacement from a memory operand.
The memory operand.
displacement.
Gets a memory operand for the specified bitness.
The bitness
Equality operator for .
Left operand
Right operand
true if equal; otherwise false
Inequality operator for .
Left operand
Right operand
true if not equal; otherwise false
Memory operand factory.
Creates a new instance.
Size of this memory operand.
Creates a new instance.
Size of this memory operand.
Segment register
Flags
Size of this memory operand.
Segment register.
Gets the mask associated with this operand.
Use the ES register with this memory operand.
Use the CS register with this memory operand.
Use the CS register with this memory operand.
Use the DS register with this memory operand.
Use the FS register with this memory operand.
Use the GS register with this memory operand.
Specify the content of the memory operand (Base + Index * Scale + Displacement).
Size of this memory operand.
Specify a long offset displacement.
Offset of this memory operand.
Specify a ulong offset displacement.
Offset of this memory operand.
Specify a memory operand with a label.
Specify a base register used with this memory operand (Base + Index * Scale + Displacement)
Size of this memory operand.
Specify a base register used with this memory operand (Base + Index * Scale + Displacement)
Size of this memory operand.
Specify a base register used with this memory operand (Base + Index * Scale + Displacement)
Size of this memory operand.
Assembler operand flags.
No flags.
Broadcast.
Zeroing mask.
Suppress all exceptions (.sae).
Round to nearest (.rn_sae).
Round to down (.rd_sae).
Round to up (.ru_sae).
Round towards zero (.rz_sae).
RoundingControl mask.
Mask register K1.
Mask register K2.
Mask register K3.
Mask register K4.
Mask register K5.
Mask register K6.
Mask register K7.
Mask for K registers.
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegister8
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegister16
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to a displacement and returns a memory operand.
The base register
The displacement
Subtracts a displacement from a register (base) and returns a memory operand.
The base register
The displacement
Multiplies an index register by a scale and returns a memory operand.
The index register
The scale (1, 2, 4 or 8)
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Creates a new instance.
A register
The mask
Apply mask Register K1.
Apply mask Register K2.
Apply mask Register K3.
Apply mask Register K4.
Apply mask Register K5.
Apply mask Register K6.
Apply mask Register K7.
Apply mask Zeroing.
Suppress all exceptions
Round to nearest (even)
Round down (toward -inf)
Round up (toward +inf)
Round toward zero (truncate)
Converts a to a .
AssemblerRegister32
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to a displacement and returns a memory operand.
The base register
The displacement
Subtracts a displacement from a register (base) and returns a memory operand.
The base register
The displacement
Multiplies an index register by a scale and returns a memory operand.
The index register
The scale (1, 2, 4 or 8)
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Creates a new instance.
A register
The mask
Apply mask Register K1.
Apply mask Register K2.
Apply mask Register K3.
Apply mask Register K4.
Apply mask Register K5.
Apply mask Register K6.
Apply mask Register K7.
Apply mask Zeroing.
Suppress all exceptions
Round to nearest (even)
Round down (toward -inf)
Round up (toward +inf)
Round toward zero (truncate)
Converts a to a .
AssemblerRegister64
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to another register (index) and returns a memory operand.
The base register.
The index register
Adds a register (base) to a displacement and returns a memory operand.
The base register
The displacement
Subtracts a displacement from a register (base) and returns a memory operand.
The base register
The displacement
Multiplies an index register by a scale and returns a memory operand.
The index register
The scale (1, 2, 4 or 8)
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterSegment
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterCR
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterDR
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterTR
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterST
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterMM
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Creates a new instance.
A register
The mask
Apply mask Register K1.
Apply mask Register K2.
Apply mask Register K3.
Apply mask Register K4.
Apply mask Register K5.
Apply mask Register K6.
Apply mask Register K7.
Apply mask Zeroing.
Suppress all exceptions
Round to nearest (even)
Round down (toward -inf)
Round up (toward +inf)
Round toward zero (truncate)
Converts a to a .
AssemblerRegisterXMM
Adds a register (index) to a displacement and returns a memory operand.
The index register
The displacement
Subtracts a displacement from a register (index) and returns a memory operand.
The index register
The displacement
Multiplies an index register by a scale and returns a memory operand.
The index register
The scale (1, 2, 4 or 8)
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Creates a new instance.
A register
The mask
Apply mask Register K1.
Apply mask Register K2.
Apply mask Register K3.
Apply mask Register K4.
Apply mask Register K5.
Apply mask Register K6.
Apply mask Register K7.
Apply mask Zeroing.
Suppress all exceptions
Round to nearest (even)
Round down (toward -inf)
Round up (toward +inf)
Round toward zero (truncate)
Converts a to a .
AssemblerRegisterYMM
Adds a register (index) to a displacement and returns a memory operand.
The index register
The displacement
Subtracts a displacement from a register (index) and returns a memory operand.
The index register
The displacement
Multiplies an index register by a scale and returns a memory operand.
The index register
The scale (1, 2, 4 or 8)
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Creates a new instance.
A register
The mask
Apply mask Register K1.
Apply mask Register K2.
Apply mask Register K3.
Apply mask Register K4.
Apply mask Register K5.
Apply mask Register K6.
Apply mask Register K7.
Apply mask Zeroing.
Suppress all exceptions
Round to nearest (even)
Round down (toward -inf)
Round up (toward +inf)
Round toward zero (truncate)
Converts a to a .
AssemblerRegisterZMM
Adds a register (index) to a displacement and returns a memory operand.
The index register
The displacement
Subtracts a displacement from a register (index) and returns a memory operand.
The index register
The displacement
Multiplies an index register by a scale and returns a memory operand.
The index register
The scale (1, 2, 4 or 8)
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterTMM
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Creates a new instance.
A register
The mask
Apply mask Register K1.
Apply mask Register K2.
Apply mask Register K3.
Apply mask Register K4.
Apply mask Register K5.
Apply mask Register K6.
Apply mask Register K7.
Apply mask Zeroing.
Converts a to a .
AssemblerRegisterK
Equality operator for
Register
Register
Inequality operator for
Register
Register
An assembler register used with .
Creates a new instance.
A Register
The register value.
Converts a to a .
AssemblerRegisterBND
Equality operator for
Register
Register
Inequality operator for
Register
Register
Registers used for .
Gets a memory operand with no size hint
Gets a memory operand with a BYTE PTR size hint
Gets a memory operand with a WORD PTR size hint
Gets a memory operand with a DWORD PTR size hint
Gets a memory operand with a QWORD PTR size hint
Gets a memory operand with an MMWORD PTR size hint
Gets a memory operand with a TBYTE PTR size hint
Gets a memory operand with a TWORD PTR size hint
Gets a memory operand with an FWORD PTR size hint
Gets a memory operand with an OWORD PTR size hint
Gets a memory operand with an XMMWORD PTR size hint
Gets a memory operand with a YMMWORD PTR size hint
Gets a memory operand with a ZMMWORD PTR size hint
Gets a broadcast memory operand with no size hint
Gets a broadcast memory operand with a WORD BCST size hint
Gets a broadcast memory operand with a DWORD BCST size hint
Gets a broadcast memory operand with a QWORD BCST size hint
Result of .
The associated block encoder result.
Gets the RIP of the specified label.
A label.
Result index
RIP of the label.
A label that can be created by .
Name of this label.
Id of this label.
Gets the instruction index associated with this label. This is setup after calling .
true if this label is empty and was not created by .
Equality operator for
Label
Label
Inequality operator for
Label
Label
Relocation kind
64-bit offset. Only used if it's 64-bit code.
Relocation info
Address
Relocation kind
Constructor
Relocation kind
Address
Contains a list of instructions that should be encoded by
Code writer
All instructions
Base IP of all encoded instructions
Constructor
Code writer
Instructions
Base IP of all encoded instructions
result if it was successful
Base IP of all encoded instructions
If option was enabled:
All s
If option was enabled:
Offsets of the instructions relative to the base IP. If the instruction was rewritten to a new instruction
(eg. JE TARGET_TOO_FAR_AWAY -> JNE SHORT SKIP ; JMP QWORD PTR [MEM]), the value is stored in that array element.
If option was enabled:
Offsets of all constants in the new encoded instructions. If the instruction was rewritten,
the 'default' value is stored in the corresponding array element.
options
No option is set
By default, branches get updated if the target is too far away, eg. Jcc SHORT -> Jcc NEAR or if 64-bit mode, Jcc + JMP [RIP+mem]. If this option is enabled, no branches are fixed.
The should return s
The should return new instruction offsets
The should return
Encodes instructions. It can be used to move instructions from one location to another location.
Encodes instructions. Any number of branches can be part of this block.
You can use this function to move instructions from one location to another location.
If the target of a branch is too far away, it'll be rewritten to a longer branch.
You can disable this by passing in .
If the block has any RIP-relative memory operands, make sure the data isn't too
far away from the new location of the encoded instructions. Every OS should have
some API to allocate memory close (+/-2GB) to the original code location.
16, 32 or 64
All instructions
Updated with an error message if the method failed
Result if this method returns
Encoder options
Encodes instructions. Any number of branches can be part of this block.
You can use this function to move instructions from one location to another location.
If the target of a branch is too far away, it'll be rewritten to a longer branch.
You can disable this by passing in .
If the block has any RIP-relative memory operands, make sure the data isn't too
far away from the new location of the encoded instructions. Every OS should have
some API to allocate memory close (+/-2GB) to the original code location.
16, 32 or 64
All instructions
Updated with an error message if the method failed
Result if this method returns
Encoder options
Call near instruction
Initializes the target address and tries to optimize the instruction
Returns if the instruction was updated to a shorter instruction, if nothing changed
Instruction with a memory operand that is RIP/EIP relative
Jcc instruction
Jmp instruction
Simple branch instruction that only has one code value, eg. loopcc, jrcxz
Simple instruction that doesn't need fixing, i.e., it's not IP relative (no branch instruction, no IP relative memory operand)
Xbegin instruction
A that reads data from a byte array
Current position
Number of bytes that can be read
Checks if it's possible to read another byte
Constructor
Hex bytes encoded in a string
Constructor
Data
Constructor
Data
Start index
Number of bytes
Constructor
Data
Reads the next byte or returns less than 0 if there are no more bytes
x86 instruction code
It's an invalid instruction, eg. it's a new unknown instruction, garbage or there's not enough bytes to decode the instruction etc.
A db/.byte asm directive that can store 1-16 bytes
A dw/.word asm directive that can store 1-8 words
A dd/.int asm directive that can store 1-4 dwords
A dq/.quad asm directive that can store 1-2 qwords
ADD r/m8, r8
00 /r
8086+
16/32/64-bit
ADD r/m16, r16
o16 01 /r
8086+
16/32/64-bit
ADD r/m32, r32
o32 01 /r
386+
16/32/64-bit
ADD r/m64, r64
o64 01 /r
X64
64-bit
ADD r8, r/m8
02 /r
8086+
16/32/64-bit
ADD r16, r/m16
o16 03 /r
8086+
16/32/64-bit
ADD r32, r/m32
o32 03 /r
386+
16/32/64-bit
ADD r64, r/m64
o64 03 /r
X64
64-bit
ADD AL, imm8
04 ib
8086+
16/32/64-bit
ADD AX, imm16
o16 05 iw
8086+
16/32/64-bit
ADD EAX, imm32
o32 05 id
386+
16/32/64-bit
ADD RAX, imm32
o64 05 id
X64
64-bit
PUSH ES
o16 06
8086+
16/32-bit
PUSH ES
o32 06
386+
16/32-bit
POP ES
o16 07
8086+
16/32-bit
POP ES
o32 07
386+
16/32-bit
OR r/m8, r8
08 /r
8086+
16/32/64-bit
OR r/m16, r16
o16 09 /r
8086+
16/32/64-bit
OR r/m32, r32
o32 09 /r
386+
16/32/64-bit
OR r/m64, r64
o64 09 /r
X64
64-bit
OR r8, r/m8
0A /r
8086+
16/32/64-bit
OR r16, r/m16
o16 0B /r
8086+
16/32/64-bit
OR r32, r/m32
o32 0B /r
386+
16/32/64-bit
OR r64, r/m64
o64 0B /r
X64
64-bit
OR AL, imm8
0C ib
8086+
16/32/64-bit
OR AX, imm16
o16 0D iw
8086+
16/32/64-bit
OR EAX, imm32
o32 0D id
386+
16/32/64-bit
OR RAX, imm32
o64 0D id
X64
64-bit
PUSH CS
o16 0E
8086+
16/32-bit
PUSH CS
o32 0E
386+
16/32-bit
POP CS
o16 0F
8086
16-bit
ADC r/m8, r8
10 /r
8086+
16/32/64-bit
ADC r/m16, r16
o16 11 /r
8086+
16/32/64-bit
ADC r/m32, r32
o32 11 /r
386+
16/32/64-bit
ADC r/m64, r64
o64 11 /r
X64
64-bit
ADC r8, r/m8
12 /r
8086+
16/32/64-bit
ADC r16, r/m16
o16 13 /r
8086+
16/32/64-bit
ADC r32, r/m32
o32 13 /r
386+
16/32/64-bit
ADC r64, r/m64
o64 13 /r
X64
64-bit
ADC AL, imm8
14 ib
8086+
16/32/64-bit
ADC AX, imm16
o16 15 iw
8086+
16/32/64-bit
ADC EAX, imm32
o32 15 id
386+
16/32/64-bit
ADC RAX, imm32
o64 15 id
X64
64-bit
PUSH SS
o16 16
8086+
16/32-bit
PUSH SS
o32 16
386+
16/32-bit
POP SS
o16 17
8086+
16/32-bit
POP SS
o32 17
386+
16/32-bit
SBB r/m8, r8
18 /r
8086+
16/32/64-bit
SBB r/m16, r16
o16 19 /r
8086+
16/32/64-bit
SBB r/m32, r32
o32 19 /r
386+
16/32/64-bit
SBB r/m64, r64
o64 19 /r
X64
64-bit
SBB r8, r/m8
1A /r
8086+
16/32/64-bit
SBB r16, r/m16
o16 1B /r
8086+
16/32/64-bit
SBB r32, r/m32
o32 1B /r
386+
16/32/64-bit
SBB r64, r/m64
o64 1B /r
X64
64-bit
SBB AL, imm8
1C ib
8086+
16/32/64-bit
SBB AX, imm16
o16 1D iw
8086+
16/32/64-bit
SBB EAX, imm32
o32 1D id
386+
16/32/64-bit
SBB RAX, imm32
o64 1D id
X64
64-bit
PUSH DS
o16 1E
8086+
16/32-bit
PUSH DS
o32 1E
386+
16/32-bit
POP DS
o16 1F
8086+
16/32-bit
POP DS
o32 1F
386+
16/32-bit
AND r/m8, r8
20 /r
8086+
16/32/64-bit
AND r/m16, r16
o16 21 /r
8086+
16/32/64-bit
AND r/m32, r32
o32 21 /r
386+
16/32/64-bit
AND r/m64, r64
o64 21 /r
X64
64-bit
AND r8, r/m8
22 /r
8086+
16/32/64-bit
AND r16, r/m16
o16 23 /r
8086+
16/32/64-bit
AND r32, r/m32
o32 23 /r
386+
16/32/64-bit
AND r64, r/m64
o64 23 /r
X64
64-bit
AND AL, imm8
24 ib
8086+
16/32/64-bit
AND AX, imm16
o16 25 iw
8086+
16/32/64-bit
AND EAX, imm32
o32 25 id
386+
16/32/64-bit
AND RAX, imm32
o64 25 id
X64
64-bit
DAA
27
8086+
16/32-bit
SUB r/m8, r8
28 /r
8086+
16/32/64-bit
SUB r/m16, r16
o16 29 /r
8086+
16/32/64-bit
SUB r/m32, r32
o32 29 /r
386+
16/32/64-bit
SUB r/m64, r64
o64 29 /r
X64
64-bit
SUB r8, r/m8
2A /r
8086+
16/32/64-bit
SUB r16, r/m16
o16 2B /r
8086+
16/32/64-bit
SUB r32, r/m32
o32 2B /r
386+
16/32/64-bit
SUB r64, r/m64
o64 2B /r
X64
64-bit
SUB AL, imm8
2C ib
8086+
16/32/64-bit
SUB AX, imm16
o16 2D iw
8086+
16/32/64-bit
SUB EAX, imm32
o32 2D id
386+
16/32/64-bit
SUB RAX, imm32
o64 2D id
X64
64-bit
DAS
2F
8086+
16/32-bit
XOR r/m8, r8
30 /r
8086+
16/32/64-bit
XOR r/m16, r16
o16 31 /r
8086+
16/32/64-bit
XOR r/m32, r32
o32 31 /r
386+
16/32/64-bit
XOR r/m64, r64
o64 31 /r
X64
64-bit
XOR r8, r/m8
32 /r
8086+
16/32/64-bit
XOR r16, r/m16
o16 33 /r
8086+
16/32/64-bit
XOR r32, r/m32
o32 33 /r
386+
16/32/64-bit
XOR r64, r/m64
o64 33 /r
X64
64-bit
XOR AL, imm8
34 ib
8086+
16/32/64-bit
XOR AX, imm16
o16 35 iw
8086+
16/32/64-bit
XOR EAX, imm32
o32 35 id
386+
16/32/64-bit
XOR RAX, imm32
o64 35 id
X64
64-bit
AAA
37
8086+
16/32-bit
CMP r/m8, r8
38 /r
8086+
16/32/64-bit
CMP r/m16, r16
o16 39 /r
8086+
16/32/64-bit
CMP r/m32, r32
o32 39 /r
386+
16/32/64-bit
CMP r/m64, r64
o64 39 /r
X64
64-bit
CMP r8, r/m8
3A /r
8086+
16/32/64-bit
CMP r16, r/m16
o16 3B /r
8086+
16/32/64-bit
CMP r32, r/m32
o32 3B /r
386+
16/32/64-bit
CMP r64, r/m64
o64 3B /r
X64
64-bit
CMP AL, imm8
3C ib
8086+
16/32/64-bit
CMP AX, imm16
o16 3D iw
8086+
16/32/64-bit
CMP EAX, imm32
o32 3D id
386+
16/32/64-bit
CMP RAX, imm32
o64 3D id
X64
64-bit
AAS
3F
8086+
16/32-bit
INC r16
o16 40+rw
8086+
16/32-bit
INC r32
o32 40+rd
386+
16/32-bit
DEC r16
o16 48+rw
8086+
16/32-bit
DEC r32
o32 48+rd
386+
16/32-bit
PUSH r16
o16 50+rw
8086+
16/32/64-bit
PUSH r32
o32 50+rd
386+
16/32-bit
PUSH r64
o64 50+ro
X64
64-bit
POP r16
o16 58+rw
8086+
16/32/64-bit
POP r32
o32 58+rd
386+
16/32-bit
POP r64
o64 58+ro
X64
64-bit
PUSHA
o16 60
186+
16/32-bit
PUSHAD
o32 60
386+
16/32-bit
POPA
o16 61
186+
16/32-bit
POPAD
o32 61
386+
16/32-bit
BOUND r16, m16&16
o16 62 /r
186+
16/32-bit
BOUND r32, m32&32
o32 62 /r
386+
16/32-bit
ARPL r/m16, r16
o16 63 /r
286+
16/32-bit
ARPL r32/m16, r32
o32 63 /r
386+
16/32-bit
MOVSXD r16, r/m16
o16 63 /r
X64
64-bit
MOVSXD r32, r/m32
o32 63 /r
X64
64-bit
MOVSXD r64, r/m32
o64 63 /r
X64
64-bit
PUSH imm16
o16 68 iw
186+
16/32/64-bit
PUSH imm32
o32 68 id
386+
16/32-bit
PUSH imm32
o64 68 id
X64
64-bit
IMUL r16, r/m16, imm16
o16 69 /r iw
186+
16/32/64-bit
IMUL r32, r/m32, imm32
o32 69 /r id
386+
16/32/64-bit
IMUL r64, r/m64, imm32
o64 69 /r id
X64
64-bit
PUSH imm8
o16 6A ib
186+
16/32/64-bit
PUSH imm8
o32 6A ib
386+
16/32-bit
PUSH imm8
o64 6A ib
X64
64-bit
IMUL r16, r/m16, imm8
o16 6B /r ib
186+
16/32/64-bit
IMUL r32, r/m32, imm8
o32 6B /r ib
386+
16/32/64-bit
IMUL r64, r/m64, imm8
o64 6B /r ib
X64
64-bit
INSB
6C
186+
16/32/64-bit
INSW
o16 6D
186+
16/32/64-bit
INSD
o32 6D
386+
16/32/64-bit
OUTSB
6E
186+
16/32/64-bit
OUTSW
o16 6F
186+
16/32/64-bit
OUTSD
o32 6F
386+
16/32/64-bit
JO rel8
o16 70 cb
8086+
16/32/64-bit
JO rel8
o32 70 cb
386+
16/32-bit
JO rel8
o64 70 cb
X64
64-bit
JNO rel8
o16 71 cb
8086+
16/32/64-bit
JNO rel8
o32 71 cb
386+
16/32-bit
JNO rel8
o64 71 cb
X64
64-bit
JB rel8
o16 72 cb
8086+
16/32/64-bit
JB rel8
o32 72 cb
386+
16/32-bit
JB rel8
o64 72 cb
X64
64-bit
JAE rel8
o16 73 cb
8086+
16/32/64-bit
JAE rel8
o32 73 cb
386+
16/32-bit
JAE rel8
o64 73 cb
X64
64-bit
JE rel8
o16 74 cb
8086+
16/32/64-bit
JE rel8
o32 74 cb
386+
16/32-bit
JE rel8
o64 74 cb
X64
64-bit
JNE rel8
o16 75 cb
8086+
16/32/64-bit
JNE rel8
o32 75 cb
386+
16/32-bit
JNE rel8
o64 75 cb
X64
64-bit
JBE rel8
o16 76 cb
8086+
16/32/64-bit
JBE rel8
o32 76 cb
386+
16/32-bit
JBE rel8
o64 76 cb
X64
64-bit
JA rel8
o16 77 cb
8086+
16/32/64-bit
JA rel8
o32 77 cb
386+
16/32-bit
JA rel8
o64 77 cb
X64
64-bit
JS rel8
o16 78 cb
8086+
16/32/64-bit
JS rel8
o32 78 cb
386+
16/32-bit
JS rel8
o64 78 cb
X64
64-bit
JNS rel8
o16 79 cb
8086+
16/32/64-bit
JNS rel8
o32 79 cb
386+
16/32-bit
JNS rel8
o64 79 cb
X64
64-bit
JP rel8
o16 7A cb
8086+
16/32/64-bit
JP rel8
o32 7A cb
386+
16/32-bit
JP rel8
o64 7A cb
X64
64-bit
JNP rel8
o16 7B cb
8086+
16/32/64-bit
JNP rel8
o32 7B cb
386+
16/32-bit
JNP rel8
o64 7B cb
X64
64-bit
JL rel8
o16 7C cb
8086+
16/32/64-bit
JL rel8
o32 7C cb
386+
16/32-bit
JL rel8
o64 7C cb
X64
64-bit
JGE rel8
o16 7D cb
8086+
16/32/64-bit
JGE rel8
o32 7D cb
386+
16/32-bit
JGE rel8
o64 7D cb
X64
64-bit
JLE rel8
o16 7E cb
8086+
16/32/64-bit
JLE rel8
o32 7E cb
386+
16/32-bit
JLE rel8
o64 7E cb
X64
64-bit
JG rel8
o16 7F cb
8086+
16/32/64-bit
JG rel8
o32 7F cb
386+
16/32-bit
JG rel8
o64 7F cb
X64
64-bit
ADD r/m8, imm8
80 /0 ib
8086+
16/32/64-bit
OR r/m8, imm8
80 /1 ib
8086+
16/32/64-bit
ADC r/m8, imm8
80 /2 ib
8086+
16/32/64-bit
SBB r/m8, imm8
80 /3 ib
8086+
16/32/64-bit
AND r/m8, imm8
80 /4 ib
8086+
16/32/64-bit
SUB r/m8, imm8
80 /5 ib
8086+
16/32/64-bit
XOR r/m8, imm8
80 /6 ib
8086+
16/32/64-bit
CMP r/m8, imm8
80 /7 ib
8086+
16/32/64-bit
ADD r/m16, imm16
o16 81 /0 iw
8086+
16/32/64-bit
ADD r/m32, imm32
o32 81 /0 id
386+
16/32/64-bit
ADD r/m64, imm32
o64 81 /0 id
X64
64-bit
OR r/m16, imm16
o16 81 /1 iw
8086+
16/32/64-bit
OR r/m32, imm32
o32 81 /1 id
386+
16/32/64-bit
OR r/m64, imm32
o64 81 /1 id
X64
64-bit
ADC r/m16, imm16
o16 81 /2 iw
8086+
16/32/64-bit
ADC r/m32, imm32
o32 81 /2 id
386+
16/32/64-bit
ADC r/m64, imm32
o64 81 /2 id
X64
64-bit
SBB r/m16, imm16
o16 81 /3 iw
8086+
16/32/64-bit
SBB r/m32, imm32
o32 81 /3 id
386+
16/32/64-bit
SBB r/m64, imm32
o64 81 /3 id
X64
64-bit
AND r/m16, imm16
o16 81 /4 iw
8086+
16/32/64-bit
AND r/m32, imm32
o32 81 /4 id
386+
16/32/64-bit
AND r/m64, imm32
o64 81 /4 id
X64
64-bit
SUB r/m16, imm16
o16 81 /5 iw
8086+
16/32/64-bit
SUB r/m32, imm32
o32 81 /5 id
386+
16/32/64-bit
SUB r/m64, imm32
o64 81 /5 id
X64
64-bit
XOR r/m16, imm16
o16 81 /6 iw
8086+
16/32/64-bit
XOR r/m32, imm32
o32 81 /6 id
386+
16/32/64-bit
XOR r/m64, imm32
o64 81 /6 id
X64
64-bit
CMP r/m16, imm16
o16 81 /7 iw
8086+
16/32/64-bit
CMP r/m32, imm32
o32 81 /7 id
386+
16/32/64-bit
CMP r/m64, imm32
o64 81 /7 id
X64
64-bit
ADD r/m8, imm8
82 /0 ib
8086+
16/32-bit
OR r/m8, imm8
82 /1 ib
8086+
16/32-bit
ADC r/m8, imm8
82 /2 ib
8086+
16/32-bit
SBB r/m8, imm8
82 /3 ib
8086+
16/32-bit
AND r/m8, imm8
82 /4 ib
8086+
16/32-bit
SUB r/m8, imm8
82 /5 ib
8086+
16/32-bit
XOR r/m8, imm8
82 /6 ib
8086+
16/32-bit
CMP r/m8, imm8
82 /7 ib
8086+
16/32-bit
ADD r/m16, imm8
o16 83 /0 ib
8086+
16/32/64-bit
ADD r/m32, imm8
o32 83 /0 ib
386+
16/32/64-bit
ADD r/m64, imm8
o64 83 /0 ib
X64
64-bit
OR r/m16, imm8
o16 83 /1 ib
8086+
16/32/64-bit
OR r/m32, imm8
o32 83 /1 ib
386+
16/32/64-bit
OR r/m64, imm8
o64 83 /1 ib
X64
64-bit
ADC r/m16, imm8
o16 83 /2 ib
8086+
16/32/64-bit
ADC r/m32, imm8
o32 83 /2 ib
386+
16/32/64-bit
ADC r/m64, imm8
o64 83 /2 ib
X64
64-bit
SBB r/m16, imm8
o16 83 /3 ib
8086+
16/32/64-bit
SBB r/m32, imm8
o32 83 /3 ib
386+
16/32/64-bit
SBB r/m64, imm8
o64 83 /3 ib
X64
64-bit
AND r/m16, imm8
o16 83 /4 ib
8086+
16/32/64-bit
AND r/m32, imm8
o32 83 /4 ib
386+
16/32/64-bit
AND r/m64, imm8
o64 83 /4 ib
X64
64-bit
SUB r/m16, imm8
o16 83 /5 ib
8086+
16/32/64-bit
SUB r/m32, imm8
o32 83 /5 ib
386+
16/32/64-bit
SUB r/m64, imm8
o64 83 /5 ib
X64
64-bit
XOR r/m16, imm8
o16 83 /6 ib
8086+
16/32/64-bit
XOR r/m32, imm8
o32 83 /6 ib
386+
16/32/64-bit
XOR r/m64, imm8
o64 83 /6 ib
X64
64-bit
CMP r/m16, imm8
o16 83 /7 ib
8086+
16/32/64-bit
CMP r/m32, imm8
o32 83 /7 ib
386+
16/32/64-bit
CMP r/m64, imm8
o64 83 /7 ib
X64
64-bit
TEST r/m8, r8
84 /r
8086+
16/32/64-bit
TEST r/m16, r16
o16 85 /r
8086+
16/32/64-bit
TEST r/m32, r32
o32 85 /r
386+
16/32/64-bit
TEST r/m64, r64
o64 85 /r
X64
64-bit
XCHG r/m8, r8
86 /r
8086+
16/32/64-bit
XCHG r/m16, r16
o16 87 /r
8086+
16/32/64-bit
XCHG r/m32, r32
o32 87 /r
386+
16/32/64-bit
XCHG r/m64, r64
o64 87 /r
X64
64-bit
MOV r/m8, r8
88 /r
8086+
16/32/64-bit
MOV r/m16, r16
o16 89 /r
8086+
16/32/64-bit
MOV r/m32, r32
o32 89 /r
386+
16/32/64-bit
MOV r/m64, r64
o64 89 /r
X64
64-bit
MOV r8, r/m8
8A /r
8086+
16/32/64-bit
MOV r16, r/m16
o16 8B /r
8086+
16/32/64-bit
MOV r32, r/m32
o32 8B /r
386+
16/32/64-bit
MOV r64, r/m64
o64 8B /r
X64
64-bit
MOV r/m16, Sreg
o16 8C /r
8086+
16/32/64-bit
MOV r32/m16, Sreg
o32 8C /r
386+
16/32/64-bit
MOV r64/m16, Sreg
o64 8C /r
X64
64-bit
LEA r16, m
o16 8D /r
8086+
16/32/64-bit
LEA r32, m
o32 8D /r
386+
16/32/64-bit
LEA r64, m
o64 8D /r
X64
64-bit
MOV Sreg, r/m16
o16 8E /r
8086+
16/32/64-bit
MOV Sreg, r32/m16
o32 8E /r
386+
16/32/64-bit
MOV Sreg, r64/m16
o64 8E /r
X64
64-bit
POP r/m16
o16 8F /0
8086+
16/32/64-bit
POP r/m32
o32 8F /0
386+
16/32-bit
POP r/m64
o64 8F /0
X64
64-bit
NOP
o16 90
8086+
16/32/64-bit
NOP
o32 90
8086+
16/32/64-bit
NOP
o64 90
8086+
64-bit
XCHG r16, AX
o16 90+rw
8086+
16/32/64-bit
XCHG r32, EAX
o32 90+rd
386+
16/32/64-bit
XCHG r64, RAX
o64 90+ro
X64
64-bit
PAUSE
F3 90
Pentium 4 or later
16/32/64-bit
CBW
o16 98
8086+
16/32/64-bit
CWDE
o32 98
386+
16/32/64-bit
CDQE
o64 98
X64
64-bit
CWD
o16 99
8086+
16/32/64-bit
CDQ
o32 99
386+
16/32/64-bit
CQO
o64 99
X64
64-bit
CALL ptr16:16
o16 9A cd
8086+
16/32-bit
CALL ptr16:32
o32 9A cp
386+
16/32-bit
WAIT
9B
8086+
16/32/64-bit
PUSHF
o16 9C
8086+
16/32/64-bit
PUSHFD
o32 9C
386+
16/32-bit
PUSHFQ
o64 9C
X64
64-bit
POPF
o16 9D
8086+
16/32/64-bit
POPFD
o32 9D
386+
16/32-bit
POPFQ
o64 9D
X64
64-bit
SAHF
9E
8086+
16/32/64-bit
LAHF
9F
8086+
16/32/64-bit
MOV AL, moffs8
A0 mo
8086+
16/32/64-bit
MOV AX, moffs16
o16 A1 mo
8086+
16/32/64-bit
MOV EAX, moffs32
o32 A1 mo
386+
16/32/64-bit
MOV RAX, moffs64
o64 A1 mo
X64
64-bit
MOV moffs8, AL
A2 mo
8086+
16/32/64-bit
MOV moffs16, AX
o16 A3 mo
8086+
16/32/64-bit
MOV moffs32, EAX
o32 A3 mo
386+
16/32/64-bit
MOV moffs64, RAX
o64 A3 mo
X64
64-bit
MOVSB
A4
8086+
16/32/64-bit
MOVSW
o16 A5
8086+
16/32/64-bit
MOVSD
o32 A5
386+
16/32/64-bit
MOVSQ
o64 A5
X64
64-bit
CMPSB
A6
8086+
16/32/64-bit
CMPSW
o16 A7
8086+
16/32/64-bit
CMPSD
o32 A7
386+
16/32/64-bit
CMPSQ
o64 A7
X64
64-bit
TEST AL, imm8
A8 ib
8086+
16/32/64-bit
TEST AX, imm16
o16 A9 iw
8086+
16/32/64-bit
TEST EAX, imm32
o32 A9 id
386+
16/32/64-bit
TEST RAX, imm32
o64 A9 id
X64
64-bit
STOSB
AA
8086+
16/32/64-bit
STOSW
o16 AB
8086+
16/32/64-bit
STOSD
o32 AB
386+
16/32/64-bit
STOSQ
o64 AB
X64
64-bit
LODSB
AC
8086+
16/32/64-bit
LODSW
o16 AD
8086+
16/32/64-bit
LODSD
o32 AD
386+
16/32/64-bit
LODSQ
o64 AD
X64
64-bit
SCASB
AE
8086+
16/32/64-bit
SCASW
o16 AF
8086+
16/32/64-bit
SCASD
o32 AF
386+
16/32/64-bit
SCASQ
o64 AF
X64
64-bit
MOV r8, imm8
B0+rb ib
8086+
16/32/64-bit
MOV r16, imm16
o16 B8+rw iw
8086+
16/32/64-bit
MOV r32, imm32
o32 B8+rd id
386+
16/32/64-bit
MOV r64, imm64
o64 B8+ro io
X64
64-bit
ROL r/m8, imm8
C0 /0 ib
186+
16/32/64-bit
ROR r/m8, imm8
C0 /1 ib
186+
16/32/64-bit
RCL r/m8, imm8
C0 /2 ib
186+
16/32/64-bit
RCR r/m8, imm8
C0 /3 ib
186+
16/32/64-bit
SHL r/m8, imm8
C0 /4 ib
186+
16/32/64-bit
SHR r/m8, imm8
C0 /5 ib
186+
16/32/64-bit
SAL r/m8, imm8
C0 /6 ib
186+
16/32/64-bit
SAR r/m8, imm8
C0 /7 ib
186+
16/32/64-bit
ROL r/m16, imm8
o16 C1 /0 ib
186+
16/32/64-bit
ROL r/m32, imm8
o32 C1 /0 ib
386+
16/32/64-bit
ROL r/m64, imm8
o64 C1 /0 ib
X64
64-bit
ROR r/m16, imm8
o16 C1 /1 ib
186+
16/32/64-bit
ROR r/m32, imm8
o32 C1 /1 ib
386+
16/32/64-bit
ROR r/m64, imm8
o64 C1 /1 ib
X64
64-bit
RCL r/m16, imm8
o16 C1 /2 ib
186+
16/32/64-bit
RCL r/m32, imm8
o32 C1 /2 ib
386+
16/32/64-bit
RCL r/m64, imm8
o64 C1 /2 ib
X64
64-bit
RCR r/m16, imm8
o16 C1 /3 ib
186+
16/32/64-bit
RCR r/m32, imm8
o32 C1 /3 ib
386+
16/32/64-bit
RCR r/m64, imm8
o64 C1 /3 ib
X64
64-bit
SHL r/m16, imm8
o16 C1 /4 ib
186+
16/32/64-bit
SHL r/m32, imm8
o32 C1 /4 ib
386+
16/32/64-bit
SHL r/m64, imm8
o64 C1 /4 ib
X64
64-bit
SHR r/m16, imm8
o16 C1 /5 ib
186+
16/32/64-bit
SHR r/m32, imm8
o32 C1 /5 ib
386+
16/32/64-bit
SHR r/m64, imm8
o64 C1 /5 ib
X64
64-bit
SAL r/m16, imm8
o16 C1 /6 ib
186+
16/32/64-bit
SAL r/m32, imm8
o32 C1 /6 ib
386+
16/32/64-bit
SAL r/m64, imm8
o64 C1 /6 ib
X64
64-bit
SAR r/m16, imm8
o16 C1 /7 ib
186+
16/32/64-bit
SAR r/m32, imm8
o32 C1 /7 ib
386+
16/32/64-bit
SAR r/m64, imm8
o64 C1 /7 ib
X64
64-bit
RET imm16
o16 C2 iw
8086+
16/32/64-bit
RET imm16
o32 C2 iw
386+
16/32-bit
RET imm16
o64 C2 iw
X64
64-bit
RET
o16 C3
8086+
16/32/64-bit
RET
o32 C3
386+
16/32-bit
RET
o64 C3
X64
64-bit
LES r16, m16:16
o16 C4 /r
8086+
16/32-bit
LES r32, m16:32
o32 C4 /r
386+
16/32-bit
LDS r16, m16:16
o16 C5 /r
8086+
16/32-bit
LDS r32, m16:32
o32 C5 /r
386+
16/32-bit
MOV r/m8, imm8
C6 /0 ib
8086+
16/32/64-bit
XABORT imm8
C6 F8 ib
RTM
16/32/64-bit
MOV r/m16, imm16
o16 C7 /0 iw
8086+
16/32/64-bit
MOV r/m32, imm32
o32 C7 /0 id
386+
16/32/64-bit
MOV r/m64, imm32
o64 C7 /0 id
X64
64-bit
XBEGIN rel16
o16 C7 F8 cw
RTM
16/32/64-bit
XBEGIN rel32
o32 C7 F8 cd
RTM
16/32/64-bit
ENTER imm16, imm8
o16 C8 iw ib
186+
16/32/64-bit
ENTER imm16, imm8
o32 C8 iw ib
386+
16/32-bit
ENTER imm16, imm8
o64 C8 iw ib
X64
64-bit
LEAVE
o16 C9
186+
16/32/64-bit
LEAVE
o32 C9
386+
16/32-bit
LEAVE
o64 C9
X64
64-bit
RETF imm16
o16 CA iw
8086+
16/32/64-bit
RETF imm16
o32 CA iw
386+
16/32/64-bit
RETF imm16
o64 CA iw
X64
64-bit
RETF
o16 CB
8086+
16/32/64-bit
RETF
o32 CB
386+
16/32/64-bit
RETF
o64 CB
X64
64-bit
INT3
CC
8086+
16/32/64-bit
INT imm8
CD ib
8086+
16/32/64-bit
INTO
CE
8086+
16/32-bit
IRET
o16 CF
8086+
16/32/64-bit
IRETD
o32 CF
386+
16/32/64-bit
IRETQ
o64 CF
X64
64-bit
ROL r/m8, 1
D0 /0
8086+
16/32/64-bit
ROR r/m8, 1
D0 /1
8086+
16/32/64-bit
RCL r/m8, 1
D0 /2
8086+
16/32/64-bit
RCR r/m8, 1
D0 /3
8086+
16/32/64-bit
SHL r/m8, 1
D0 /4
8086+
16/32/64-bit
SHR r/m8, 1
D0 /5
8086+
16/32/64-bit
SAL r/m8, 1
D0 /6
8086+
16/32/64-bit
SAR r/m8, 1
D0 /7
8086+
16/32/64-bit
ROL r/m16, 1
o16 D1 /0
8086+
16/32/64-bit
ROL r/m32, 1
o32 D1 /0
386+
16/32/64-bit
ROL r/m64, 1
o64 D1 /0
X64
64-bit
ROR r/m16, 1
o16 D1 /1
8086+
16/32/64-bit
ROR r/m32, 1
o32 D1 /1
386+
16/32/64-bit
ROR r/m64, 1
o64 D1 /1
X64
64-bit
RCL r/m16, 1
o16 D1 /2
8086+
16/32/64-bit
RCL r/m32, 1
o32 D1 /2
386+
16/32/64-bit
RCL r/m64, 1
o64 D1 /2
X64
64-bit
RCR r/m16, 1
o16 D1 /3
8086+
16/32/64-bit
RCR r/m32, 1
o32 D1 /3
386+
16/32/64-bit
RCR r/m64, 1
o64 D1 /3
X64
64-bit
SHL r/m16, 1
o16 D1 /4
8086+
16/32/64-bit
SHL r/m32, 1
o32 D1 /4
386+
16/32/64-bit
SHL r/m64, 1
o64 D1 /4
X64
64-bit
SHR r/m16, 1
o16 D1 /5
8086+
16/32/64-bit
SHR r/m32, 1
o32 D1 /5
386+
16/32/64-bit
SHR r/m64, 1
o64 D1 /5
X64
64-bit
SAL r/m16, 1
o16 D1 /6
8086+
16/32/64-bit
SAL r/m32, 1
o32 D1 /6
386+
16/32/64-bit
SAL r/m64, 1
o64 D1 /6
X64
64-bit
SAR r/m16, 1
o16 D1 /7
8086+
16/32/64-bit
SAR r/m32, 1
o32 D1 /7
386+
16/32/64-bit
SAR r/m64, 1
o64 D1 /7
X64
64-bit
ROL r/m8, CL
D2 /0
8086+
16/32/64-bit
ROR r/m8, CL
D2 /1
8086+
16/32/64-bit
RCL r/m8, CL
D2 /2
8086+
16/32/64-bit
RCR r/m8, CL
D2 /3
8086+
16/32/64-bit
SHL r/m8, CL
D2 /4
8086+
16/32/64-bit
SHR r/m8, CL
D2 /5
8086+
16/32/64-bit
SAL r/m8, CL
D2 /6
8086+
16/32/64-bit
SAR r/m8, CL
D2 /7
8086+
16/32/64-bit
ROL r/m16, CL
o16 D3 /0
8086+
16/32/64-bit
ROL r/m32, CL
o32 D3 /0
386+
16/32/64-bit
ROL r/m64, CL
o64 D3 /0
X64
64-bit
ROR r/m16, CL
o16 D3 /1
8086+
16/32/64-bit
ROR r/m32, CL
o32 D3 /1
386+
16/32/64-bit
ROR r/m64, CL
o64 D3 /1
X64
64-bit
RCL r/m16, CL
o16 D3 /2
8086+
16/32/64-bit
RCL r/m32, CL
o32 D3 /2
386+
16/32/64-bit
RCL r/m64, CL
o64 D3 /2
X64
64-bit
RCR r/m16, CL
o16 D3 /3
8086+
16/32/64-bit
RCR r/m32, CL
o32 D3 /3
386+
16/32/64-bit
RCR r/m64, CL
o64 D3 /3
X64
64-bit
SHL r/m16, CL
o16 D3 /4
8086+
16/32/64-bit
SHL r/m32, CL
o32 D3 /4
386+
16/32/64-bit
SHL r/m64, CL
o64 D3 /4
X64
64-bit
SHR r/m16, CL
o16 D3 /5
8086+
16/32/64-bit
SHR r/m32, CL
o32 D3 /5
386+
16/32/64-bit
SHR r/m64, CL
o64 D3 /5
X64
64-bit
SAL r/m16, CL
o16 D3 /6
8086+
16/32/64-bit
SAL r/m32, CL
o32 D3 /6
386+
16/32/64-bit
SAL r/m64, CL
o64 D3 /6
X64
64-bit
SAR r/m16, CL
o16 D3 /7
8086+
16/32/64-bit
SAR r/m32, CL
o32 D3 /7
386+
16/32/64-bit
SAR r/m64, CL
o64 D3 /7
X64
64-bit
AAM imm8
D4 ib
8086+
16/32-bit
AAD imm8
D5 ib
8086+
16/32-bit
SALC
D6
8086+
16/32-bit
XLATB
D7
8086+
16/32/64-bit
FADD m32fp
D8 /0
8087+
16/32/64-bit
FMUL m32fp
D8 /1
8087+
16/32/64-bit
FCOM m32fp
D8 /2
8087+
16/32/64-bit
FCOMP m32fp
D8 /3
8087+
16/32/64-bit
FSUB m32fp
D8 /4
8087+
16/32/64-bit
FSUBR m32fp
D8 /5
8087+
16/32/64-bit
FDIV m32fp
D8 /6
8087+
16/32/64-bit
FDIVR m32fp
D8 /7
8087+
16/32/64-bit
FADD ST(0), ST(i)
D8 C0+i
8087+
16/32/64-bit
FMUL ST(0), ST(i)
D8 C8+i
8087+
16/32/64-bit
FCOM ST(i)
D8 D0+i
8087+
16/32/64-bit
FCOMP ST(i)
D8 D8+i
8087+
16/32/64-bit
FSUB ST(0), ST(i)
D8 E0+i
8087+
16/32/64-bit
FSUBR ST(0), ST(i)
D8 E8+i
8087+
16/32/64-bit
FDIV ST(0), ST(i)
D8 F0+i
8087+
16/32/64-bit
FDIVR ST(0), ST(i)
D8 F8+i
8087+
16/32/64-bit
FLD m32fp
D9 /0
8087+
16/32/64-bit
FST m32fp
D9 /2
8087+
16/32/64-bit
FSTP m32fp
D9 /3
8087+
16/32/64-bit
FLDENV m14byte
o16 D9 /4
8087+
16/32/64-bit
FLDENV m28byte
o32 D9 /4
387+
16/32/64-bit
FLDCW m2byte
D9 /5
8087+
16/32/64-bit
FNSTENV m14byte
o16 D9 /6
8087+
16/32/64-bit
FSTENV m14byte
9B o16 D9 /6
8087+
16/32/64-bit
FNSTENV m28byte
o32 D9 /6
387+
16/32/64-bit
FSTENV m28byte
9B o32 D9 /6
387+
16/32/64-bit
FNSTCW m2byte
D9 /7
8087+
16/32/64-bit
FSTCW m2byte
9B D9 /7
8087+
16/32/64-bit
FLD ST(i)
D9 C0+i
8087+
16/32/64-bit
FXCH ST(i)
D9 C8+i
8087+
16/32/64-bit
FNOP
D9 D0
8087+
16/32/64-bit
FSTPNCE ST(i)
D9 D8+i
8087+
16/32/64-bit
FCHS
D9 E0
8087+
16/32/64-bit
FABS
D9 E1
8087+
16/32/64-bit
FTST
D9 E4
8087+
16/32/64-bit
FXAM
D9 E5
8087+
16/32/64-bit
FLD1
D9 E8
8087+
16/32/64-bit
FLDL2T
D9 E9
8087+
16/32/64-bit
FLDL2E
D9 EA
8087+
16/32/64-bit
FLDPI
D9 EB
8087+
16/32/64-bit
FLDLG2
D9 EC
8087+
16/32/64-bit
FLDLN2
D9 ED
8087+
16/32/64-bit
FLDZ
D9 EE
8087+
16/32/64-bit
F2XM1
D9 F0
8087+
16/32/64-bit
FYL2X
D9 F1
8087+
16/32/64-bit
FPTAN
D9 F2
8087+
16/32/64-bit
FPATAN
D9 F3
8087+
16/32/64-bit
FXTRACT
D9 F4
8087+
16/32/64-bit
FPREM1
D9 F5
387+
16/32/64-bit
FDECSTP
D9 F6
8087+
16/32/64-bit
FINCSTP
D9 F7
8087+
16/32/64-bit
FPREM
D9 F8
8087+
16/32/64-bit
FYL2XP1
D9 F9
8087+
16/32/64-bit
FSQRT
D9 FA
8087+
16/32/64-bit
FSINCOS
D9 FB
387+
16/32/64-bit
FRNDINT
D9 FC
8087+
16/32/64-bit
FSCALE
D9 FD
8087+
16/32/64-bit
FSIN
D9 FE
387+
16/32/64-bit
FCOS
D9 FF
387+
16/32/64-bit
FIADD m32int
DA /0
8087+
16/32/64-bit
FIMUL m32int
DA /1
8087+
16/32/64-bit
FICOM m32int
DA /2
8087+
16/32/64-bit
FICOMP m32int
DA /3
8087+
16/32/64-bit
FISUB m32int
DA /4
8087+
16/32/64-bit
FISUBR m32int
DA /5
8087+
16/32/64-bit
FIDIV m32int
DA /6
8087+
16/32/64-bit
FIDIVR m32int
DA /7
8087+
16/32/64-bit
FCMOVB ST(0), ST(i)
DA C0+i
8087+ and CMOV
16/32/64-bit
FCMOVE ST(0), ST(i)
DA C8+i
8087+ and CMOV
16/32/64-bit
FCMOVBE ST(0), ST(i)
DA D0+i
8087+ and CMOV
16/32/64-bit
FCMOVU ST(0), ST(i)
DA D8+i
8087+ and CMOV
16/32/64-bit
FUCOMPP
DA E9
387+
16/32/64-bit
FILD m32int
DB /0
8087+
16/32/64-bit
FISTTP m32int
DB /1
8087+ and SSE3
16/32/64-bit
FIST m32int
DB /2
8087+
16/32/64-bit
FISTP m32int
DB /3
8087+
16/32/64-bit
FLD m80fp
DB /5
8087+
16/32/64-bit
FSTP m80fp
DB /7
8087+
16/32/64-bit
FCMOVNB ST(0), ST(i)
DB C0+i
8087+ and CMOV
16/32/64-bit
FCMOVNE ST(0), ST(i)
DB C8+i
8087+ and CMOV
16/32/64-bit
FCMOVNBE ST(0), ST(i)
DB D0+i
8087+ and CMOV
16/32/64-bit
FCMOVNU ST(0), ST(i)
DB D8+i
8087+ and CMOV
16/32/64-bit
FNENI
DB E0
8087+
16/32/64-bit
FENI
9B DB E0
8087+
16/32/64-bit
FNDISI
DB E1
8087+
16/32/64-bit
FDISI
9B DB E1
8087+
16/32/64-bit
FNCLEX
DB E2
8087+
16/32/64-bit
FCLEX
9B DB E2
8087+
16/32/64-bit
FNINIT
DB E3
8087+
16/32/64-bit
FINIT
9B DB E3
8087+
16/32/64-bit
FNSETPM
DB E4
287+
16/32/64-bit
FSETPM
9B DB E4
287+
16/32/64-bit
FRSTPM
DB E5
287 XL
16/32-bit
FUCOMI ST, ST(i)
DB E8+i
8087+ and CMOV
16/32/64-bit
FCOMI ST, ST(i)
DB F0+i
8087+ and CMOV
16/32/64-bit
FADD m64fp
DC /0
8087+
16/32/64-bit
FMUL m64fp
DC /1
8087+
16/32/64-bit
FCOM m64fp
DC /2
8087+
16/32/64-bit
FCOMP m64fp
DC /3
8087+
16/32/64-bit
FSUB m64fp
DC /4
8087+
16/32/64-bit
FSUBR m64fp
DC /5
8087+
16/32/64-bit
FDIV m64fp
DC /6
8087+
16/32/64-bit
FDIVR m64fp
DC /7
8087+
16/32/64-bit
FADD ST(i), ST(0)
DC C0+i
8087+
16/32/64-bit
FMUL ST(i), ST(0)
DC C8+i
8087+
16/32/64-bit
FCOM ST(i)
DC D0+i
8087+
16/32/64-bit
FCOMP ST(i)
DC D8+i
8087+
16/32/64-bit
FSUBR ST(i), ST(0)
DC E0+i
8087+
16/32/64-bit
FSUB ST(i), ST(0)
DC E8+i
8087+
16/32/64-bit
FDIVR ST(i), ST(0)
DC F0+i
8087+
16/32/64-bit
FDIV ST(i), ST(0)
DC F8+i
8087+
16/32/64-bit
FLD m64fp
DD /0
8087+
16/32/64-bit
FISTTP m64int
DD /1
8087+ and SSE3
16/32/64-bit
FST m64fp
DD /2
8087+
16/32/64-bit
FSTP m64fp
DD /3
8087+
16/32/64-bit
FRSTOR m94byte
o16 DD /4
8087+
16/32/64-bit
FRSTOR m108byte
o32 DD /4
387+
16/32/64-bit
FNSAVE m94byte
o16 DD /6
8087+
16/32/64-bit
FSAVE m94byte
9B o16 DD /6
8087+
16/32/64-bit
FNSAVE m108byte
o32 DD /6
387+
16/32/64-bit
FSAVE m108byte
9B o32 DD /6
387+
16/32/64-bit
FNSTSW m2byte
DD /7
8087+
16/32/64-bit
FSTSW m2byte
9B DD /7
8087+
16/32/64-bit
FFREE ST(i)
DD C0+i
8087+
16/32/64-bit
FXCH ST(i)
DD C8+i
8087+
16/32/64-bit
FST ST(i)
DD D0+i
8087+
16/32/64-bit
FSTP ST(i)
DD D8+i
8087+
16/32/64-bit
FUCOM ST(i)
DD E0+i
8087+
16/32/64-bit
FUCOMP ST(i)
DD E8+i
8087+
16/32/64-bit
FIADD m16int
DE /0
8087+
16/32/64-bit
FIMUL m16int
DE /1
8087+
16/32/64-bit
FICOM m16int
DE /2
8087+
16/32/64-bit
FICOMP m16int
DE /3
8087+
16/32/64-bit
FISUB m16int
DE /4
8087+
16/32/64-bit
FISUBR m16int
DE /5
8087+
16/32/64-bit
FIDIV m16int
DE /6
8087+
16/32/64-bit
FIDIVR m16int
DE /7
8087+
16/32/64-bit
FADDP ST(i), ST(0)
DE C0+i
8087+
16/32/64-bit
FMULP ST(i), ST(0)
DE C8+i
8087+
16/32/64-bit
FCOMP ST(i)
DE D0+i
8087+
16/32/64-bit
FCOMPP
DE D9
8087+
16/32/64-bit
FSUBRP ST(i), ST(0)
DE E0+i
8087+
16/32/64-bit
FSUBP ST(i), ST(0)
DE E8+i
8087+
16/32/64-bit
FDIVRP ST(i), ST(0)
DE F0+i
8087+
16/32/64-bit
FDIVP ST(i), ST(0)
DE F8+i
8087+
16/32/64-bit
FILD m16int
DF /0
8087+
16/32/64-bit
FISTTP m16int
DF /1
8087+ and SSE3
16/32/64-bit
FIST m16int
DF /2
8087+
16/32/64-bit
FISTP m16int
DF /3
8087+
16/32/64-bit
FBLD m80bcd
DF /4
8087+
16/32/64-bit
FILD m64int
DF /5
8087+
16/32/64-bit
FBSTP m80bcd
DF /6
8087+
16/32/64-bit
FISTP m64int
DF /7
8087+
16/32/64-bit
FFREEP ST(i)
DF C0+i
8087+
16/32/64-bit
FXCH ST(i)
DF C8+i
8087+
16/32/64-bit
FSTP ST(i)
DF D0+i
8087+
16/32/64-bit
FSTP ST(i)
DF D8+i
8087+
16/32/64-bit
FNSTSW AX
DF E0
287+
16/32/64-bit
FSTSW AX
9B DF E0
287+
16/32/64-bit
FSTDW AX
9B DF E1
387 SL
16/32-bit
FSTSG AX
9B DF E2
387 SL
16/32-bit
FUCOMIP ST, ST(i)
DF E8+i
8087+ and CMOV
16/32/64-bit
FCOMIP ST, ST(i)
DF F0+i
8087+ and CMOV
16/32/64-bit
LOOPNE rel8
a16 o16 E0 cb
8086+
16/32-bit
LOOPNE rel8
a16 o32 E0 cb
386+
16/32-bit
LOOPNE rel8
a32 o16 E0 cb
386+
16/32/64-bit
LOOPNE rel8
a32 o32 E0 cb
386+
16/32-bit
LOOPNE rel8
a32 o64 E0 cb
X64
64-bit
LOOPNE rel8
a64 o16 E0 cb
X64
64-bit
LOOPNE rel8
a64 o64 E0 cb
X64
64-bit
LOOPE rel8
a16 o16 E1 cb
8086+
16/32-bit
LOOPE rel8
a16 o32 E1 cb
386+
16/32-bit
LOOPE rel8
a32 o16 E1 cb
386+
16/32/64-bit
LOOPE rel8
a32 o32 E1 cb
386+
16/32-bit
LOOPE rel8
a32 o64 E1 cb
X64
64-bit
LOOPE rel8
a64 o16 E1 cb
X64
64-bit
LOOPE rel8
a64 o64 E1 cb
X64
64-bit
LOOP rel8
a16 o16 E2 cb
8086+
16/32-bit
LOOP rel8
a16 o32 E2 cb
386+
16/32-bit
LOOP rel8
a32 o16 E2 cb
386+
16/32/64-bit
LOOP rel8
a32 o32 E2 cb
386+
16/32-bit
LOOP rel8
a32 o64 E2 cb
X64
64-bit
LOOP rel8
a64 o16 E2 cb
X64
64-bit
LOOP rel8
a64 o64 E2 cb
X64
64-bit
JCXZ rel8
a16 o16 E3 cb
8086+
16/32-bit
JCXZ rel8
a16 o32 E3 cb
386+
16/32-bit
JECXZ rel8
a32 o16 E3 cb
386+
16/32/64-bit
JECXZ rel8
a32 o32 E3 cb
386+
16/32-bit
JECXZ rel8
a32 o64 E3 cb
X64
64-bit
JRCXZ rel8
a64 o16 E3 cb
X64
64-bit
JRCXZ rel8
a64 o64 E3 cb
X64
64-bit
IN AL, imm8
E4 ib
8086+
16/32/64-bit
IN AX, imm8
o16 E5 ib
8086+
16/32/64-bit
IN EAX, imm8
o32 E5 ib
386+
16/32/64-bit
OUT imm8, AL
E6 ib
8086+
16/32/64-bit
OUT imm8, AX
o16 E7 ib
8086+
16/32/64-bit
OUT imm8, EAX
o32 E7 ib
386+
16/32/64-bit
CALL rel16
o16 E8 cw
8086+
16/32/64-bit
CALL rel32
o32 E8 cd
386+
16/32-bit
CALL rel32
o64 E8 cd
X64
64-bit
JMP rel16
o16 E9 cw
8086+
16/32/64-bit
JMP rel32
o32 E9 cd
386+
16/32-bit
JMP rel32
o64 E9 cd
X64
64-bit
JMP ptr16:16
o16 EA cd
8086+
16/32-bit
JMP ptr16:32
o32 EA cp
386+
16/32-bit
JMP rel8
o16 EB cb
8086+
16/32/64-bit
JMP rel8
o32 EB cb
386+
16/32-bit
JMP rel8
o64 EB cb
X64
64-bit
IN AL, DX
EC
8086+
16/32/64-bit
IN AX, DX
o16 ED
8086+
16/32/64-bit
IN EAX, DX
o32 ED
386+
16/32/64-bit
OUT DX, AL
EE
8086+
16/32/64-bit
OUT DX, AX
o16 EF
8086+
16/32/64-bit
OUT DX, EAX
o32 EF
386+
16/32/64-bit
INT1
F1
386+
16/32/64-bit
HLT
F4
8086+
16/32/64-bit
CMC
F5
8086+
16/32/64-bit
TEST r/m8, imm8
F6 /0 ib
8086+
16/32/64-bit
TEST r/m8, imm8
F6 /1 ib
8086+
16/32/64-bit
NOT r/m8
F6 /2
8086+
16/32/64-bit
NEG r/m8
F6 /3
8086+
16/32/64-bit
MUL r/m8
F6 /4
8086+
16/32/64-bit
IMUL r/m8
F6 /5
8086+
16/32/64-bit
DIV r/m8
F6 /6
8086+
16/32/64-bit
IDIV r/m8
F6 /7
8086+
16/32/64-bit
TEST r/m16, imm16
o16 F7 /0 iw
8086+
16/32/64-bit
TEST r/m32, imm32
o32 F7 /0 id
386+
16/32/64-bit
TEST r/m64, imm32
o64 F7 /0 id
X64
64-bit
TEST r/m16, imm16
o16 F7 /1 iw
8086+
16/32/64-bit
TEST r/m32, imm32
o32 F7 /1 id
386+
16/32/64-bit
TEST r/m64, imm32
o64 F7 /1 id
X64
64-bit
NOT r/m16
o16 F7 /2
8086+
16/32/64-bit
NOT r/m32
o32 F7 /2
386+
16/32/64-bit
NOT r/m64
o64 F7 /2
X64
64-bit
NEG r/m16
o16 F7 /3
8086+
16/32/64-bit
NEG r/m32
o32 F7 /3
386+
16/32/64-bit
NEG r/m64
o64 F7 /3
X64
64-bit
MUL r/m16
o16 F7 /4
8086+
16/32/64-bit
MUL r/m32
o32 F7 /4
386+
16/32/64-bit
MUL r/m64
o64 F7 /4
X64
64-bit
IMUL r/m16
o16 F7 /5
8086+
16/32/64-bit
IMUL r/m32
o32 F7 /5
386+
16/32/64-bit
IMUL r/m64
o64 F7 /5
X64
64-bit
DIV r/m16
o16 F7 /6
8086+
16/32/64-bit
DIV r/m32
o32 F7 /6
386+
16/32/64-bit
DIV r/m64
o64 F7 /6
X64
64-bit
IDIV r/m16
o16 F7 /7
8086+
16/32/64-bit
IDIV r/m32
o32 F7 /7
386+
16/32/64-bit
IDIV r/m64
o64 F7 /7
X64
64-bit
CLC
F8
8086+
16/32/64-bit
STC
F9
8086+
16/32/64-bit
CLI
FA
8086+
16/32/64-bit
STI
FB
8086+
16/32/64-bit
CLD
FC
8086+
16/32/64-bit
STD
FD
8086+
16/32/64-bit
INC r/m8
FE /0
8086+
16/32/64-bit
DEC r/m8
FE /1
8086+
16/32/64-bit
INC r/m16
o16 FF /0
8086+
16/32/64-bit
INC r/m32
o32 FF /0
386+
16/32/64-bit
INC r/m64
o64 FF /0
X64
64-bit
DEC r/m16
o16 FF /1
8086+
16/32/64-bit
DEC r/m32
o32 FF /1
386+
16/32/64-bit
DEC r/m64
o64 FF /1
X64
64-bit
CALL r/m16
o16 FF /2
8086+
16/32/64-bit
CALL r/m32
o32 FF /2
386+
16/32-bit
CALL r/m64
o64 FF /2
X64
64-bit
CALL m16:16
o16 FF /3
8086+
16/32/64-bit
CALL m16:32
o32 FF /3
386+
16/32/64-bit
CALL m16:64
o64 FF /3
X64
64-bit
JMP r/m16
o16 FF /4
8086+
16/32/64-bit
JMP r/m32
o32 FF /4
386+
16/32-bit
JMP r/m64
o64 FF /4
X64
64-bit
JMP m16:16
o16 FF /5
8086+
16/32/64-bit
JMP m16:32
o32 FF /5
386+
16/32/64-bit
JMP m16:64
o64 FF /5
X64
64-bit
PUSH r/m16
o16 FF /6
8086+
16/32/64-bit
PUSH r/m32
o32 FF /6
386+
16/32-bit
PUSH r/m64
o64 FF /6
X64
64-bit
SLDT r/m16
o16 0F 00 /0
286+
16/32/64-bit
SLDT r32/m16
o32 0F 00 /0
386+
16/32/64-bit
SLDT r64/m16
o64 0F 00 /0
X64
64-bit
STR r/m16
o16 0F 00 /1
286+
16/32/64-bit
STR r32/m16
o32 0F 00 /1
386+
16/32/64-bit
STR r64/m16
o64 0F 00 /1
X64
64-bit
LLDT r/m16
o16 0F 00 /2
286+
16/32/64-bit
LLDT r32/m16
o32 0F 00 /2
386+
16/32/64-bit
LLDT r64/m16
o64 0F 00 /2
X64
64-bit
LTR r/m16
o16 0F 00 /3
286+
16/32/64-bit
LTR r32/m16
o32 0F 00 /3
386+
16/32/64-bit
LTR r64/m16
o64 0F 00 /3
X64
64-bit
VERR r/m16
o16 0F 00 /4
286+
16/32/64-bit
VERR r32/m16
o32 0F 00 /4
386+
16/32/64-bit
VERR r64/m16
o64 0F 00 /4
X64
64-bit
VERW r/m16
o16 0F 00 /5
286+
16/32/64-bit
VERW r32/m16
o32 0F 00 /5
386+
16/32/64-bit
VERW r64/m16
o64 0F 00 /5
X64
64-bit
JMPE r/m16
o16 0F 00 /6
IA-64
16/32-bit
JMPE r/m32
o32 0F 00 /6
IA-64
16/32-bit
SGDT m
o16 0F 01 /0
286+
16/32-bit
SGDT m
o32 0F 01 /0
386+
16/32-bit
SGDT m
0F 01 /0
X64
64-bit
SIDT m
o16 0F 01 /1
286+
16/32-bit
SIDT m
o32 0F 01 /1
386+
16/32-bit
SIDT m
0F 01 /1
X64
64-bit
LGDT m16&32
o16 0F 01 /2
286+
16/32-bit
LGDT m16&32
o32 0F 01 /2
386+
16/32-bit
LGDT m16&64
0F 01 /2
X64
64-bit
LIDT m16&32
o16 0F 01 /3
286+
16/32-bit
LIDT m16&32
o32 0F 01 /3
386+
16/32-bit
LIDT m16&64
0F 01 /3
X64
64-bit
SMSW r/m16
o16 0F 01 /4
286+
16/32/64-bit
SMSW r32/m16
o32 0F 01 /4
386+
16/32/64-bit
SMSW r64/m16
o64 0F 01 /4
X64
64-bit
RSTORSSP m64
F3 0F 01 /5
CET_SS
16/32/64-bit
LMSW r/m16
o16 0F 01 /6
286+
16/32/64-bit
LMSW r32/m16
o32 0F 01 /6
386+
16/32/64-bit
LMSW r64/m16
o64 0F 01 /6
X64
64-bit
INVLPG m
0F 01 /7
486+
16/32/64-bit
ENCLV
NP 0F 01 C0
OSS
16/32/64-bit
VMCALL
NP 0F 01 C1
VMX
16/32/64-bit
VMLAUNCH
NP 0F 01 C2
VMX
16/32/64-bit
VMRESUME
NP 0F 01 C3
VMX
16/32/64-bit
VMXOFF
NP 0F 01 C4
VMX
16/32/64-bit
PCONFIG
NP 0F 01 C5
PCONFIG
16/32/64-bit
MONITOR
a16 NP 0F 01 C8
MONITOR
16/32-bit
MONITOR
a32 NP 0F 01 C8
MONITOR
16/32/64-bit
MONITOR
a64 NP 0F 01 C8
MONITOR
64-bit
MWAIT
NP 0F 01 C9
MONITOR
16/32/64-bit
CLAC
NP 0F 01 CA
SMAP
16/32/64-bit
STAC
NP 0F 01 CB
SMAP
16/32/64-bit
ENCLS
NP 0F 01 CF
SGX1
16/32/64-bit
XGETBV
NP 0F 01 D0
XSAVE
16/32/64-bit
XSETBV
NP 0F 01 D1
XSAVE
16/32/64-bit
VMFUNC
NP 0F 01 D4
VMX
16/32/64-bit
XEND
NP 0F 01 D5
RTM
16/32/64-bit
XTEST
NP 0F 01 D6
HLE or RTM
16/32/64-bit
ENCLU
NP 0F 01 D7
SGX1
16/32/64-bit
VMRUN
a16 0F 01 D8
SVM
16/32-bit
VMRUN
a32 0F 01 D8
SVM
16/32/64-bit
VMRUN
a64 0F 01 D8
SVM
64-bit
VMMCALL
0F 01 D9
SVM
16/32/64-bit
VMLOAD
a16 0F 01 DA
SVM
16/32-bit
VMLOAD
a32 0F 01 DA
SVM
16/32/64-bit
VMLOAD
a64 0F 01 DA
SVM
64-bit
VMSAVE
a16 0F 01 DB
SVM
16/32-bit
VMSAVE
a32 0F 01 DB
SVM
16/32/64-bit
VMSAVE
a64 0F 01 DB
SVM
64-bit
STGI
0F 01 DC
SKINIT or SVM
16/32/64-bit
CLGI
0F 01 DD
SVM
16/32/64-bit
SKINIT
0F 01 DE
SKINIT or SVM
16/32/64-bit
INVLPGA
a16 0F 01 DF
SVM
16/32-bit
INVLPGA
a32 0F 01 DF
SVM
16/32/64-bit
INVLPGA
a64 0F 01 DF
SVM
64-bit
SETSSBSY
F3 0F 01 E8
CET_SS
16/32/64-bit
SAVEPREVSSP
F3 0F 01 EA
CET_SS
16/32/64-bit
RDPKRU
NP 0F 01 EE
PKU
16/32/64-bit
WRPKRU
NP 0F 01 EF
PKU
16/32/64-bit
SWAPGS
0F 01 F8
X64
64-bit
RDTSCP
0F 01 F9
RDTSCP
16/32/64-bit
MONITORX
a16 NP 0F 01 FA
MONITORX
16/32-bit
MONITORX
a32 NP 0F 01 FA
MONITORX
16/32/64-bit
MONITORX
a64 NP 0F 01 FA
MONITORX
64-bit
MCOMMIT
F3 0F 01 FA
MCOMMIT
16/32/64-bit
MWAITX
NP 0F 01 FB
MONITORX
16/32/64-bit
CLZERO
a16 0F 01 FC
CLZERO
16/32-bit
CLZERO
a32 0F 01 FC
CLZERO
16/32/64-bit
CLZERO
a64 0F 01 FC
CLZERO
64-bit
RDPRU
NP 0F 01 FD
RDPRU
16/32/64-bit
LAR r16, r/m16
o16 0F 02 /r
286+
16/32/64-bit
LAR r32, r32/m16
o32 0F 02 /r
386+
16/32/64-bit
LAR r64, r64/m16
o64 0F 02 /r
X64
64-bit
LSL r16, r/m16
o16 0F 03 /r
286+
16/32/64-bit
LSL r32, r32/m16
o32 0F 03 /r
386+
16/32/64-bit
LSL r64, r64/m16
o64 0F 03 /r
X64
64-bit
STOREALL
0F 04
286
16/32-bit
LOADALL
0F 05
286
16/32-bit
SYSCALL
0F 05
SYSCALL
16/32/64-bit
CLTS
0F 06
286+
16/32/64-bit
LOADALL
0F 07
386
16/32-bit
SYSRET
0F 07
SYSCALL
16/32/64-bit
SYSRETQ
o64 0F 07
SYSCALL
64-bit
INVD
0F 08
486+
16/32/64-bit
WBINVD
0F 09
486+
16/32/64-bit
WBNOINVD
F3 0F 09
WBNOINVD
16/32/64-bit
CL1INVMB
0F 0A
CL1INVMB
16/32-bit
UD2
0F 0B
286+
16/32/64-bit
RESERVEDNOP r/m16, r16
o16 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 0D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
PREFETCH m8
0F 0D /0
PREFETCHW
16/32/64-bit
PREFETCHW m8
0F 0D /1
PREFETCHW
16/32/64-bit
PREFETCHWT1 m8
0F 0D /2
PREFETCHWT1
16/32/64-bit
FEMMS
0F 0E
3DNOW
16/32/64-bit
UMOV r/m8, r8
0F 10 /r
386/486
16/32-bit
UMOV r/m16, r16
o16 0F 11 /r
386/486
16/32-bit
UMOV r/m32, r32
o32 0F 11 /r
386/486
16/32-bit
UMOV r8, r/m8
0F 12 /r
386/486
16/32-bit
UMOV r16, r/m16
o16 0F 13 /r
386/486
16/32-bit
UMOV r32, r/m32
o32 0F 13 /r
386/486
16/32-bit
MOVUPS xmm1, xmm2/m128
NP 0F 10 /r
SSE
16/32/64-bit
VMOVUPS xmm1, xmm2/m128
VEX.128.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPS ymm1, ymm2/m256
VEX.256.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.0F.W0 10 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.0F.W0 10 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.0F.W0 10 /r
AVX512F
16/32/64-bit
MOVUPD xmm1, xmm2/m128
66 0F 10 /r
SSE2
16/32/64-bit
VMOVUPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVUPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 10 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 10 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 10 /r
AVX512F
16/32/64-bit
MOVSS xmm1, xmm2/m32
F3 0F 10 /r
SSE
16/32/64-bit
VMOVSS xmm1, xmm2, xmm3
VEX.LIG.F3.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSS xmm1, m32
VEX.LIG.F3.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSS xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F3.0F.W0 10 /r
AVX512F
16/32/64-bit
VMOVSS xmm1 {k1}{z}, m32
EVEX.LIG.F3.0F.W0 10 /r
AVX512F
16/32/64-bit
MOVSD xmm1, xmm2/m64
F2 0F 10 /r
SSE2
16/32/64-bit
VMOVSD xmm1, xmm2, xmm3
VEX.LIG.F2.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSD xmm1, m64
VEX.LIG.F2.0F.WIG 10 /r
AVX
16/32/64-bit
VMOVSD xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F2.0F.W1 10 /r
AVX512F
16/32/64-bit
VMOVSD xmm1 {k1}{z}, m64
EVEX.LIG.F2.0F.W1 10 /r
AVX512F
16/32/64-bit
MOVUPS xmm2/m128, xmm1
NP 0F 11 /r
SSE
16/32/64-bit
VMOVUPS xmm2/m128, xmm1
VEX.128.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPS ymm2/m256, ymm1
VEX.256.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPS xmm2/m128 {k1}{z}, xmm1
EVEX.128.0F.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPS ymm2/m256 {k1}{z}, ymm1
EVEX.256.0F.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPS zmm2/m512 {k1}{z}, zmm1
EVEX.512.0F.W0 11 /r
AVX512F
16/32/64-bit
MOVUPD xmm2/m128, xmm1
66 0F 11 /r
SSE2
16/32/64-bit
VMOVUPD xmm2/m128, xmm1
VEX.128.66.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPD ymm2/m256, ymm1
VEX.256.66.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVUPD xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W1 11 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPD ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W1 11 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVUPD zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W1 11 /r
AVX512F
16/32/64-bit
MOVSS xmm2/m32, xmm1
F3 0F 11 /r
SSE
16/32/64-bit
VMOVSS xmm1, xmm2, xmm3
VEX.LIG.F3.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVSS m32, xmm1
VEX.LIG.F3.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVSS xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F3.0F.W0 11 /r
AVX512F
16/32/64-bit
VMOVSS m32 {k1}, xmm1
EVEX.LIG.F3.0F.W0 11 /r
AVX512F
16/32/64-bit
MOVSD xmm1/m64, xmm2
F2 0F 11 /r
SSE2
16/32/64-bit
VMOVSD xmm1, xmm2, xmm3
VEX.LIG.F2.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVSD m64, xmm1
VEX.LIG.F2.0F.WIG 11 /r
AVX
16/32/64-bit
VMOVSD xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F2.0F.W1 11 /r
AVX512F
16/32/64-bit
VMOVSD m64 {k1}, xmm1
EVEX.LIG.F2.0F.W1 11 /r
AVX512F
16/32/64-bit
MOVHLPS xmm1, xmm2
NP 0F 12 /r
SSE
16/32/64-bit
MOVLPS xmm1, m64
NP 0F 12 /r
SSE
16/32/64-bit
VMOVHLPS xmm1, xmm2, xmm3
VEX.128.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVLPS xmm2, xmm1, m64
VEX.128.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVHLPS xmm1, xmm2, xmm3
EVEX.128.0F.W0 12 /r
AVX512F
16/32/64-bit
VMOVLPS xmm2, xmm1, m64
EVEX.128.0F.W0 12 /r
AVX512F
16/32/64-bit
MOVLPD xmm1, m64
66 0F 12 /r
SSE2
16/32/64-bit
VMOVLPD xmm2, xmm1, m64
VEX.128.66.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVLPD xmm2, xmm1, m64
EVEX.128.66.0F.W1 12 /r
AVX512F
16/32/64-bit
MOVSLDUP xmm1, xmm2/m128
F3 0F 12 /r
SSE3
16/32/64-bit
VMOVSLDUP xmm1, xmm2/m128
VEX.128.F3.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVSLDUP ymm1, ymm2/m256
VEX.256.F3.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVSLDUP xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVSLDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVSLDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 12 /r
AVX512F
16/32/64-bit
MOVDDUP xmm1, xmm2/m64
F2 0F 12 /r
SSE3
16/32/64-bit
VMOVDDUP xmm1, xmm2/m64
VEX.128.F2.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVDDUP ymm1, ymm2/m256
VEX.256.F2.0F.WIG 12 /r
AVX
16/32/64-bit
VMOVDDUP xmm1 {k1}{z}, xmm2/m64
EVEX.128.F2.0F.W1 12 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W1 12 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W1 12 /r
AVX512F
16/32/64-bit
MOVLPS m64, xmm1
NP 0F 13 /r
SSE
16/32/64-bit
VMOVLPS m64, xmm1
VEX.128.0F.WIG 13 /r
AVX
16/32/64-bit
VMOVLPS m64, xmm1
EVEX.128.0F.W0 13 /r
AVX512F
16/32/64-bit
MOVLPD m64, xmm1
66 0F 13 /r
SSE2
16/32/64-bit
VMOVLPD m64, xmm1
VEX.128.66.0F.WIG 13 /r
AVX
16/32/64-bit
VMOVLPD m64, xmm1
EVEX.128.66.0F.W1 13 /r
AVX512F
16/32/64-bit
UNPCKLPS xmm1, xmm2/m128
NP 0F 14 /r
SSE
16/32/64-bit
VUNPCKLPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKLPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKLPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 14 /r
AVX512F
16/32/64-bit
UNPCKLPD xmm1, xmm2/m128
66 0F 14 /r
SSE2
16/32/64-bit
VUNPCKLPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 14 /r
AVX
16/32/64-bit
VUNPCKLPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKLPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKLPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 14 /r
AVX512F
16/32/64-bit
UNPCKHPS xmm1, xmm2/m128
NP 0F 15 /r
SSE
16/32/64-bit
VUNPCKHPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKHPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKHPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 15 /r
AVX512F
16/32/64-bit
UNPCKHPD xmm1, xmm2/m128
66 0F 15 /r
SSE2
16/32/64-bit
VUNPCKHPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 15 /r
AVX
16/32/64-bit
VUNPCKHPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKHPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
VUNPCKHPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 15 /r
AVX512F
16/32/64-bit
MOVLHPS xmm1, xmm2
NP 0F 16 /r
SSE
16/32/64-bit
VMOVLHPS xmm1, xmm2, xmm3
VEX.128.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVLHPS xmm1, xmm2, xmm3
EVEX.128.0F.W0 16 /r
AVX512F
16/32/64-bit
MOVHPS xmm1, m64
NP 0F 16 /r
SSE
16/32/64-bit
VMOVHPS xmm2, xmm1, m64
VEX.128.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVHPS xmm2, xmm1, m64
EVEX.128.0F.W0 16 /r
AVX512F
16/32/64-bit
MOVHPD xmm1, m64
66 0F 16 /r
SSE2
16/32/64-bit
VMOVHPD xmm2, xmm1, m64
VEX.128.66.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVHPD xmm2, xmm1, m64
EVEX.128.66.0F.W1 16 /r
AVX512F
16/32/64-bit
MOVSHDUP xmm1, xmm2/m128
F3 0F 16 /r
SSE3
16/32/64-bit
VMOVSHDUP xmm1, xmm2/m128
VEX.128.F3.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVSHDUP ymm1, ymm2/m256
VEX.256.F3.0F.WIG 16 /r
AVX
16/32/64-bit
VMOVSHDUP xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVSHDUP ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVSHDUP zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 16 /r
AVX512F
16/32/64-bit
MOVHPS m64, xmm1
NP 0F 17 /r
SSE
16/32/64-bit
VMOVHPS m64, xmm1
VEX.128.0F.WIG 17 /r
AVX
16/32/64-bit
VMOVHPS m64, xmm1
EVEX.128.0F.W0 17 /r
AVX512F
16/32/64-bit
MOVHPD m64, xmm1
66 0F 17 /r
SSE2
16/32/64-bit
VMOVHPD m64, xmm1
VEX.128.66.0F.WIG 17 /r
AVX
16/32/64-bit
VMOVHPD m64, xmm1
EVEX.128.66.0F.W1 17 /r
AVX512F
16/32/64-bit
RESERVEDNOP r/m16, r16
o16 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 18 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
RESERVEDNOP r/m16, r16
o16 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 19 /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
RESERVEDNOP r/m16, r16
o16 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 1A /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
RESERVEDNOP r/m16, r16
o16 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 1B /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
RESERVEDNOP r/m16, r16
o16 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 1C /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
RESERVEDNOP r/m16, r16
o16 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 1D /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
RESERVEDNOP r/m16, r16
o16 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 1E /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
RESERVEDNOP r/m16, r16
o16 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m32, r32
o32 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
RESERVEDNOP r/m64, r64
o64 0F 1F /r
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
PREFETCHNTA m8
0F 18 /0
SSE
16/32/64-bit
PREFETCHT0 m8
0F 18 /1
SSE
16/32/64-bit
PREFETCHT1 m8
0F 18 /2
SSE
16/32/64-bit
PREFETCHT2 m8
0F 18 /3
SSE
16/32/64-bit
BNDLDX bnd, mib
NP 0F 1A /r
MPX
16/32/64-bit
BNDMOV bnd1, bnd2/m64
66 0F 1A /r
MPX
16/32-bit
BNDMOV bnd1, bnd2/m128
66 0F 1A /r
MPX
64-bit
BNDCL bnd, r/m32
F3 0F 1A /r
MPX
16/32-bit
BNDCL bnd, r/m64
F3 0F 1A /r
MPX
64-bit
BNDCU bnd, r/m32
F2 0F 1A /r
MPX
16/32-bit
BNDCU bnd, r/m64
F2 0F 1A /r
MPX
64-bit
BNDSTX mib, bnd
NP 0F 1B /r
MPX
16/32/64-bit
BNDMOV bnd1/m64, bnd2
66 0F 1B /r
MPX
16/32-bit
BNDMOV bnd1/m128, bnd2
66 0F 1B /r
MPX
64-bit
BNDMK bnd, m32
F3 0F 1B /r
MPX
16/32-bit
BNDMK bnd, m64
F3 0F 1B /r
MPX
64-bit
BNDCN bnd, r/m32
F2 0F 1B /r
MPX
16/32-bit
BNDCN bnd, r/m64
F2 0F 1B /r
MPX
64-bit
CLDEMOTE m8
NP 0F 1C /0
CLDEMOTE
16/32/64-bit
RDSSPD r32
F3 0F 1E /1
CET_SS
16/32/64-bit
RDSSPQ r64
F3 o64 0F 1E /1
CET_SS
64-bit
ENDBR64
F3 0F 1E FA
CET_IBT
16/32/64-bit
ENDBR32
F3 0F 1E FB
CET_IBT
16/32/64-bit
NOP r/m16
o16 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
NOP r/m32
o32 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
16/32/64-bit
NOP r/m64
o64 0F 1F /0
CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
64-bit
MOV r32, cr
0F 20 /r
386+
16/32-bit
MOV r64, cr
0F 20 /r
X64
64-bit
MOV r32, dr
0F 21 /r
386+
16/32-bit
MOV r64, dr
0F 21 /r
X64
64-bit
MOV cr, r32
0F 22 /r
386+
16/32-bit
MOV cr, r64
0F 22 /r
X64
64-bit
MOV dr, r32
0F 23 /r
386+
16/32-bit
MOV dr, r64
0F 23 /r
X64
64-bit
MOV r32, tr
0F 24 /r
386/486/Cyrix/Geode
16/32-bit
MOV tr, r32
0F 26 /r
386/486/Cyrix/Geode
16/32-bit
MOVAPS xmm1, xmm2/m128
NP 0F 28 /r
SSE
16/32/64-bit
VMOVAPS xmm1, xmm2/m128
VEX.128.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPS ymm1, ymm2/m256
VEX.256.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.0F.W0 28 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.0F.W0 28 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.0F.W0 28 /r
AVX512F
16/32/64-bit
MOVAPD xmm1, xmm2/m128
66 0F 28 /r
SSE2
16/32/64-bit
VMOVAPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 28 /r
AVX
16/32/64-bit
VMOVAPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 28 /r
AVX512F
16/32/64-bit
MOVAPS xmm2/m128, xmm1
NP 0F 29 /r
SSE
16/32/64-bit
VMOVAPS xmm2/m128, xmm1
VEX.128.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPS ymm2/m256, ymm1
VEX.256.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPS xmm2/m128 {k1}{z}, xmm1
EVEX.128.0F.W0 29 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPS ymm2/m256 {k1}{z}, ymm1
EVEX.256.0F.W0 29 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPS zmm2/m512 {k1}{z}, zmm1
EVEX.512.0F.W0 29 /r
AVX512F
16/32/64-bit
MOVAPD xmm2/m128, xmm1
66 0F 29 /r
SSE2
16/32/64-bit
VMOVAPD xmm2/m128, xmm1
VEX.128.66.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPD ymm2/m256, ymm1
VEX.256.66.0F.WIG 29 /r
AVX
16/32/64-bit
VMOVAPD xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPD ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVAPD zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W1 29 /r
AVX512F
16/32/64-bit
CVTPI2PS xmm, mm/m64
NP 0F 2A /r
SSE
16/32/64-bit
CVTPI2PD xmm, mm/m64
66 0F 2A /r
SSE2
16/32/64-bit
CVTSI2SS xmm1, r/m32
F3 0F 2A /r
SSE
16/32/64-bit
CVTSI2SS xmm1, r/m64
F3 o64 0F 2A /r
SSE
64-bit
VCVTSI2SS xmm1, xmm2, r/m32
VEX.LIG.F3.0F.W0 2A /r
AVX
16/32/64-bit
VCVTSI2SS xmm1, xmm2, r/m64
VEX.LIG.F3.0F.W1 2A /r
AVX
64-bit
VCVTSI2SS xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.0F.W0 2A /r
AVX512F
16/32/64-bit
VCVTSI2SS xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.0F.W1 2A /r
AVX512F
64-bit
CVTSI2SD xmm1, r/m32
F2 0F 2A /r
SSE2
16/32/64-bit
CVTSI2SD xmm1, r/m64
F2 o64 0F 2A /r
SSE2
64-bit
VCVTSI2SD xmm1, xmm2, r/m32
VEX.LIG.F2.0F.W0 2A /r
AVX
16/32/64-bit
VCVTSI2SD xmm1, xmm2, r/m64
VEX.LIG.F2.0F.W1 2A /r
AVX
64-bit
VCVTSI2SD xmm1, xmm2, r/m32{er}
EVEX.LIG.F2.0F.W0 2A /r
AVX512F
16/32/64-bit
VCVTSI2SD xmm1, xmm2, r/m64{er}
EVEX.LIG.F2.0F.W1 2A /r
AVX512F
64-bit
MOVNTPS m128, xmm1
NP 0F 2B /r
SSE
16/32/64-bit
VMOVNTPS m128, xmm1
VEX.128.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPS m256, ymm1
VEX.256.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPS m128, xmm1
EVEX.128.0F.W0 2B /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTPS m256, ymm1
EVEX.256.0F.W0 2B /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTPS m512, zmm1
EVEX.512.0F.W0 2B /r
AVX512F
16/32/64-bit
MOVNTPD m128, xmm1
66 0F 2B /r
SSE2
16/32/64-bit
VMOVNTPD m128, xmm1
VEX.128.66.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPD m256, ymm1
VEX.256.66.0F.WIG 2B /r
AVX
16/32/64-bit
VMOVNTPD m128, xmm1
EVEX.128.66.0F.W1 2B /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTPD m256, ymm1
EVEX.256.66.0F.W1 2B /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTPD m512, zmm1
EVEX.512.66.0F.W1 2B /r
AVX512F
16/32/64-bit
MOVNTSS m32, xmm1
F3 0F 2B /r
SSE4A
16/32/64-bit
MOVNTSD m64, xmm1
F2 0F 2B /r
SSE4A
16/32/64-bit
CVTTPS2PI mm, xmm/m64
NP 0F 2C /r
SSE
16/32/64-bit
CVTTPD2PI mm, xmm/m128
66 0F 2C /r
SSE2
16/32/64-bit
CVTTSS2SI r32, xmm1/m32
F3 0F 2C /r
SSE
16/32/64-bit
CVTTSS2SI r64, xmm1/m32
F3 o64 0F 2C /r
SSE
64-bit
VCVTTSS2SI r32, xmm1/m32
VEX.LIG.F3.0F.W0 2C /r
AVX
16/32/64-bit
VCVTTSS2SI r64, xmm1/m32
VEX.LIG.F3.0F.W1 2C /r
AVX
64-bit
VCVTTSS2SI r32, xmm1/m32{sae}
EVEX.LIG.F3.0F.W0 2C /r
AVX512F
16/32/64-bit
VCVTTSS2SI r64, xmm1/m32{sae}
EVEX.LIG.F3.0F.W1 2C /r
AVX512F
64-bit
CVTTSD2SI r32, xmm1/m64
F2 0F 2C /r
SSE2
16/32/64-bit
CVTTSD2SI r64, xmm1/m64
F2 o64 0F 2C /r
SSE2
64-bit
VCVTTSD2SI r32, xmm1/m64
VEX.LIG.F2.0F.W0 2C /r
AVX
16/32/64-bit
VCVTTSD2SI r64, xmm1/m64
VEX.LIG.F2.0F.W1 2C /r
AVX
64-bit
VCVTTSD2SI r32, xmm1/m64{sae}
EVEX.LIG.F2.0F.W0 2C /r
AVX512F
16/32/64-bit
VCVTTSD2SI r64, xmm1/m64{sae}
EVEX.LIG.F2.0F.W1 2C /r
AVX512F
64-bit
CVTPS2PI mm, xmm/m64
NP 0F 2D /r
SSE
16/32/64-bit
CVTPD2PI mm, xmm/m128
66 0F 2D /r
SSE2
16/32/64-bit
CVTSS2SI r32, xmm1/m32
F3 0F 2D /r
SSE
16/32/64-bit
CVTSS2SI r64, xmm1/m32
F3 o64 0F 2D /r
SSE
64-bit
VCVTSS2SI r32, xmm1/m32
VEX.LIG.F3.0F.W0 2D /r
AVX
16/32/64-bit
VCVTSS2SI r64, xmm1/m32
VEX.LIG.F3.0F.W1 2D /r
AVX
64-bit
VCVTSS2SI r32, xmm1/m32{er}
EVEX.LIG.F3.0F.W0 2D /r
AVX512F
16/32/64-bit
VCVTSS2SI r64, xmm1/m32{er}
EVEX.LIG.F3.0F.W1 2D /r
AVX512F
64-bit
CVTSD2SI r32, xmm1/m64
F2 0F 2D /r
SSE2
16/32/64-bit
CVTSD2SI r64, xmm1/m64
F2 o64 0F 2D /r
SSE2
64-bit
VCVTSD2SI r32, xmm1/m64
VEX.LIG.F2.0F.W0 2D /r
AVX
16/32/64-bit
VCVTSD2SI r64, xmm1/m64
VEX.LIG.F2.0F.W1 2D /r
AVX
64-bit
VCVTSD2SI r32, xmm1/m64{er}
EVEX.LIG.F2.0F.W0 2D /r
AVX512F
16/32/64-bit
VCVTSD2SI r64, xmm1/m64{er}
EVEX.LIG.F2.0F.W1 2D /r
AVX512F
64-bit
UCOMISS xmm1, xmm2/m32
NP 0F 2E /r
SSE
16/32/64-bit
VUCOMISS xmm1, xmm2/m32
VEX.LIG.0F.WIG 2E /r
AVX
16/32/64-bit
VUCOMISS xmm1, xmm2/m32{sae}
EVEX.LIG.0F.W0 2E /r
AVX512F
16/32/64-bit
UCOMISD xmm1, xmm2/m64
66 0F 2E /r
SSE2
16/32/64-bit
VUCOMISD xmm1, xmm2/m64
VEX.LIG.66.0F.WIG 2E /r
AVX
16/32/64-bit
VUCOMISD xmm1, xmm2/m64{sae}
EVEX.LIG.66.0F.W1 2E /r
AVX512F
16/32/64-bit
COMISS xmm1, xmm2/m32
NP 0F 2F /r
SSE
16/32/64-bit
COMISD xmm1, xmm2/m64
66 0F 2F /r
SSE2
16/32/64-bit
VCOMISS xmm1, xmm2/m32
VEX.LIG.0F.WIG 2F /r
AVX
16/32/64-bit
VCOMISD xmm1, xmm2/m64
VEX.LIG.66.0F.WIG 2F /r
AVX
16/32/64-bit
VCOMISS xmm1, xmm2/m32{sae}
EVEX.LIG.0F.W0 2F /r
AVX512F
16/32/64-bit
VCOMISD xmm1, xmm2/m64{sae}
EVEX.LIG.66.0F.W1 2F /r
AVX512F
16/32/64-bit
WRMSR
0F 30
MSR
16/32/64-bit
RDTSC
0F 31
TSC
16/32/64-bit
RDMSR
0F 32
MSR
16/32/64-bit
RDPMC
0F 33
Pentium MMX or later, or Pentium Pro or later
16/32/64-bit
SYSENTER
0F 34
SEP
16/32/64-bit
SYSEXIT
0F 35
SEP
16/32/64-bit
SYSEXITQ
o64 0F 35
SEP
64-bit
GETSEC
NP 0F 37
SMX
16/32/64-bit
CMOVO r16, r/m16
o16 0F 40 /r
CMOV
16/32/64-bit
CMOVO r32, r/m32
o32 0F 40 /r
CMOV
16/32/64-bit
CMOVO r64, r/m64
o64 0F 40 /r
CMOV
64-bit
CMOVNO r16, r/m16
o16 0F 41 /r
CMOV
16/32/64-bit
CMOVNO r32, r/m32
o32 0F 41 /r
CMOV
16/32/64-bit
CMOVNO r64, r/m64
o64 0F 41 /r
CMOV
64-bit
CMOVB r16, r/m16
o16 0F 42 /r
CMOV
16/32/64-bit
CMOVB r32, r/m32
o32 0F 42 /r
CMOV
16/32/64-bit
CMOVB r64, r/m64
o64 0F 42 /r
CMOV
64-bit
CMOVAE r16, r/m16
o16 0F 43 /r
CMOV
16/32/64-bit
CMOVAE r32, r/m32
o32 0F 43 /r
CMOV
16/32/64-bit
CMOVAE r64, r/m64
o64 0F 43 /r
CMOV
64-bit
CMOVE r16, r/m16
o16 0F 44 /r
CMOV
16/32/64-bit
CMOVE r32, r/m32
o32 0F 44 /r
CMOV
16/32/64-bit
CMOVE r64, r/m64
o64 0F 44 /r
CMOV
64-bit
CMOVNE r16, r/m16
o16 0F 45 /r
CMOV
16/32/64-bit
CMOVNE r32, r/m32
o32 0F 45 /r
CMOV
16/32/64-bit
CMOVNE r64, r/m64
o64 0F 45 /r
CMOV
64-bit
CMOVBE r16, r/m16
o16 0F 46 /r
CMOV
16/32/64-bit
CMOVBE r32, r/m32
o32 0F 46 /r
CMOV
16/32/64-bit
CMOVBE r64, r/m64
o64 0F 46 /r
CMOV
64-bit
CMOVA r16, r/m16
o16 0F 47 /r
CMOV
16/32/64-bit
CMOVA r32, r/m32
o32 0F 47 /r
CMOV
16/32/64-bit
CMOVA r64, r/m64
o64 0F 47 /r
CMOV
64-bit
CMOVS r16, r/m16
o16 0F 48 /r
CMOV
16/32/64-bit
CMOVS r32, r/m32
o32 0F 48 /r
CMOV
16/32/64-bit
CMOVS r64, r/m64
o64 0F 48 /r
CMOV
64-bit
CMOVNS r16, r/m16
o16 0F 49 /r
CMOV
16/32/64-bit
CMOVNS r32, r/m32
o32 0F 49 /r
CMOV
16/32/64-bit
CMOVNS r64, r/m64
o64 0F 49 /r
CMOV
64-bit
CMOVP r16, r/m16
o16 0F 4A /r
CMOV
16/32/64-bit
CMOVP r32, r/m32
o32 0F 4A /r
CMOV
16/32/64-bit
CMOVP r64, r/m64
o64 0F 4A /r
CMOV
64-bit
CMOVNP r16, r/m16
o16 0F 4B /r
CMOV
16/32/64-bit
CMOVNP r32, r/m32
o32 0F 4B /r
CMOV
16/32/64-bit
CMOVNP r64, r/m64
o64 0F 4B /r
CMOV
64-bit
CMOVL r16, r/m16
o16 0F 4C /r
CMOV
16/32/64-bit
CMOVL r32, r/m32
o32 0F 4C /r
CMOV
16/32/64-bit
CMOVL r64, r/m64
o64 0F 4C /r
CMOV
64-bit
CMOVGE r16, r/m16
o16 0F 4D /r
CMOV
16/32/64-bit
CMOVGE r32, r/m32
o32 0F 4D /r
CMOV
16/32/64-bit
CMOVGE r64, r/m64
o64 0F 4D /r
CMOV
64-bit
CMOVLE r16, r/m16
o16 0F 4E /r
CMOV
16/32/64-bit
CMOVLE r32, r/m32
o32 0F 4E /r
CMOV
16/32/64-bit
CMOVLE r64, r/m64
o64 0F 4E /r
CMOV
64-bit
CMOVG r16, r/m16
o16 0F 4F /r
CMOV
16/32/64-bit
CMOVG r32, r/m32
o32 0F 4F /r
CMOV
16/32/64-bit
CMOVG r64, r/m64
o64 0F 4F /r
CMOV
64-bit
KANDW k1, k2, k3
VEX.L1.0F.W0 41 /r
AVX512F
16/32/64-bit
KANDQ k1, k2, k3
VEX.L1.0F.W1 41 /r
AVX512BW
16/32/64-bit
KANDB k1, k2, k3
VEX.L1.66.0F.W0 41 /r
AVX512DQ
16/32/64-bit
KANDD k1, k2, k3
VEX.L1.66.0F.W1 41 /r
AVX512BW
16/32/64-bit
KANDNW k1, k2, k3
VEX.L1.0F.W0 42 /r
AVX512F
16/32/64-bit
KANDNQ k1, k2, k3
VEX.L1.0F.W1 42 /r
AVX512BW
16/32/64-bit
KANDNB k1, k2, k3
VEX.L1.66.0F.W0 42 /r
AVX512DQ
16/32/64-bit
KANDND k1, k2, k3
VEX.L1.66.0F.W1 42 /r
AVX512BW
16/32/64-bit
KNOTW k1, k2
VEX.L0.0F.W0 44 /r
AVX512F
16/32/64-bit
KNOTQ k1, k2
VEX.L0.0F.W1 44 /r
AVX512BW
16/32/64-bit
KNOTB k1, k2
VEX.L0.66.0F.W0 44 /r
AVX512DQ
16/32/64-bit
KNOTD k1, k2
VEX.L0.66.0F.W1 44 /r
AVX512BW
16/32/64-bit
KORW k1, k2, k3
VEX.L1.0F.W0 45 /r
AVX512F
16/32/64-bit
KORQ k1, k2, k3
VEX.L1.0F.W1 45 /r
AVX512BW
16/32/64-bit
KORB k1, k2, k3
VEX.L1.66.0F.W0 45 /r
AVX512DQ
16/32/64-bit
KORD k1, k2, k3
VEX.L1.66.0F.W1 45 /r
AVX512BW
16/32/64-bit
KXNORW k1, k2, k3
VEX.L1.0F.W0 46 /r
AVX512F
16/32/64-bit
KXNORQ k1, k2, k3
VEX.L1.0F.W1 46 /r
AVX512BW
16/32/64-bit
KXNORB k1, k2, k3
VEX.L1.66.0F.W0 46 /r
AVX512DQ
16/32/64-bit
KXNORD k1, k2, k3
VEX.L1.66.0F.W1 46 /r
AVX512BW
16/32/64-bit
KXORW k1, k2, k3
VEX.L1.0F.W0 47 /r
AVX512F
16/32/64-bit
KXORQ k1, k2, k3
VEX.L1.0F.W1 47 /r
AVX512BW
16/32/64-bit
KXORB k1, k2, k3
VEX.L1.66.0F.W0 47 /r
AVX512DQ
16/32/64-bit
KXORD k1, k2, k3
VEX.L1.66.0F.W1 47 /r
AVX512BW
16/32/64-bit
KADDW k1, k2, k3
VEX.L1.0F.W0 4A /r
AVX512DQ
16/32/64-bit
KADDQ k1, k2, k3
VEX.L1.0F.W1 4A /r
AVX512BW
16/32/64-bit
KADDB k1, k2, k3
VEX.L1.66.0F.W0 4A /r
AVX512DQ
16/32/64-bit
KADDD k1, k2, k3
VEX.L1.66.0F.W1 4A /r
AVX512BW
16/32/64-bit
KUNPCKWD k1, k2, k3
VEX.L1.0F.W0 4B /r
AVX512BW
16/32/64-bit
KUNPCKDQ k1, k2, k3
VEX.L1.0F.W1 4B /r
AVX512BW
16/32/64-bit
KUNPCKBW k1, k2, k3
VEX.L1.66.0F.W0 4B /r
AVX512F
16/32/64-bit
MOVMSKPS r32, xmm
NP 0F 50 /r
SSE
16/32/64-bit
MOVMSKPS r64, xmm
NP o64 0F 50 /r
SSE
64-bit
VMOVMSKPS r32, xmm2
VEX.128.0F.W0 50 /r
AVX
16/32/64-bit
VMOVMSKPS r64, xmm2
VEX.128.0F.W1 50 /r
AVX
64-bit
VMOVMSKPS r32, ymm2
VEX.256.0F.W0 50 /r
AVX
16/32/64-bit
VMOVMSKPS r64, ymm2
VEX.256.0F.W1 50 /r
AVX
64-bit
MOVMSKPD r32, xmm
66 0F 50 /r
SSE2
16/32/64-bit
MOVMSKPD r64, xmm
66 o64 0F 50 /r
SSE2
64-bit
VMOVMSKPD r32, xmm2
VEX.128.66.0F.W0 50 /r
AVX
16/32/64-bit
VMOVMSKPD r64, xmm2
VEX.128.66.0F.W1 50 /r
AVX
64-bit
VMOVMSKPD r32, ymm2
VEX.256.66.0F.W0 50 /r
AVX
16/32/64-bit
VMOVMSKPD r64, ymm2
VEX.256.66.0F.W1 50 /r
AVX
64-bit
SQRTPS xmm1, xmm2/m128
NP 0F 51 /r
SSE
16/32/64-bit
VSQRTPS xmm1, xmm2/m128
VEX.128.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPS ymm1, ymm2/m256
VEX.256.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 51 /r
AVX512VL and AVX512F
16/32/64-bit
VSQRTPS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 51 /r
AVX512VL and AVX512F
16/32/64-bit
VSQRTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 51 /r
AVX512F
16/32/64-bit
SQRTPD xmm1, xmm2/m128
66 0F 51 /r
SSE2
16/32/64-bit
VSQRTPD xmm1, xmm2/m128
VEX.128.66.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPD ymm1, ymm2/m256
VEX.256.66.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTPD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 51 /r
AVX512VL and AVX512F
16/32/64-bit
VSQRTPD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 51 /r
AVX512VL and AVX512F
16/32/64-bit
VSQRTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 51 /r
AVX512F
16/32/64-bit
SQRTSS xmm1, xmm2/m32
F3 0F 51 /r
SSE
16/32/64-bit
VSQRTSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 51 /r
AVX512F
16/32/64-bit
SQRTSD xmm1, xmm2/m64
F2 0F 51 /r
SSE2
16/32/64-bit
VSQRTSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 51 /r
AVX
16/32/64-bit
VSQRTSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 51 /r
AVX512F
16/32/64-bit
RSQRTPS xmm1, xmm2/m128
NP 0F 52 /r
SSE
16/32/64-bit
VRSQRTPS xmm1, xmm2/m128
VEX.128.0F.WIG 52 /r
AVX
16/32/64-bit
VRSQRTPS ymm1, ymm2/m256
VEX.256.0F.WIG 52 /r
AVX
16/32/64-bit
RSQRTSS xmm1, xmm2/m32
F3 0F 52 /r
SSE
16/32/64-bit
VRSQRTSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 52 /r
AVX
16/32/64-bit
RCPPS xmm1, xmm2/m128
NP 0F 53 /r
SSE
16/32/64-bit
VRCPPS xmm1, xmm2/m128
VEX.128.0F.WIG 53 /r
AVX
16/32/64-bit
VRCPPS ymm1, ymm2/m256
VEX.256.0F.WIG 53 /r
AVX
16/32/64-bit
RCPSS xmm1, xmm2/m32
F3 0F 53 /r
SSE
16/32/64-bit
VRCPSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 53 /r
AVX
16/32/64-bit
ANDPS xmm1, xmm2/m128
NP 0F 54 /r
SSE
16/32/64-bit
VANDPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 54 /r
AVX512DQ
16/32/64-bit
ANDPD xmm1, xmm2/m128
66 0F 54 /r
SSE2
16/32/64-bit
VANDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 54 /r
AVX
16/32/64-bit
VANDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 54 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 54 /r
AVX512DQ
16/32/64-bit
ANDNPS xmm1, xmm2/m128
NP 0F 55 /r
SSE
16/32/64-bit
VANDNPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDNPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDNPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 55 /r
AVX512DQ
16/32/64-bit
ANDNPD xmm1, xmm2/m128
66 0F 55 /r
SSE2
16/32/64-bit
VANDNPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 55 /r
AVX
16/32/64-bit
VANDNPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDNPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 55 /r
AVX512VL and AVX512DQ
16/32/64-bit
VANDNPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 55 /r
AVX512DQ
16/32/64-bit
ORPS xmm1, xmm2/m128
NP 0F 56 /r
SSE
16/32/64-bit
VORPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 56 /r
AVX
16/32/64-bit
VORPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 56 /r
AVX
16/32/64-bit
VORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
VORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
VORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 56 /r
AVX512DQ
16/32/64-bit
ORPD xmm1, xmm2/m128
66 0F 56 /r
SSE2
16/32/64-bit
VORPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 56 /r
AVX
16/32/64-bit
VORPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 56 /r
AVX
16/32/64-bit
VORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
VORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 56 /r
AVX512VL and AVX512DQ
16/32/64-bit
VORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 56 /r
AVX512DQ
16/32/64-bit
XORPS xmm1, xmm2/m128
NP 0F 57 /r
SSE
16/32/64-bit
VXORPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
VXORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
VXORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.0F.W0 57 /r
AVX512DQ
16/32/64-bit
XORPD xmm1, xmm2/m128
66 0F 57 /r
SSE2
16/32/64-bit
VXORPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 57 /r
AVX
16/32/64-bit
VXORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
VXORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 57 /r
AVX512VL and AVX512DQ
16/32/64-bit
VXORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 57 /r
AVX512DQ
16/32/64-bit
ADDPS xmm1, xmm2/m128
NP 0F 58 /r
SSE
16/32/64-bit
VADDPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
VADDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
VADDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 58 /r
AVX512F
16/32/64-bit
ADDPD xmm1, xmm2/m128
66 0F 58 /r
SSE2
16/32/64-bit
VADDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 58 /r
AVX
16/32/64-bit
VADDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 58 /r
AVX512VL and AVX512F
16/32/64-bit
VADDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 58 /r
AVX512VL and AVX512F
16/32/64-bit
VADDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 58 /r
AVX512F
16/32/64-bit
ADDSS xmm1, xmm2/m32
F3 0F 58 /r
SSE
16/32/64-bit
VADDSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 58 /r
AVX
16/32/64-bit
VADDSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 58 /r
AVX512F
16/32/64-bit
ADDSD xmm1, xmm2/m64
F2 0F 58 /r
SSE2
16/32/64-bit
VADDSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 58 /r
AVX
16/32/64-bit
VADDSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 58 /r
AVX512F
16/32/64-bit
MULPS xmm1, xmm2/m128
NP 0F 59 /r
SSE
16/32/64-bit
VMULPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 59 /r
AVX512VL and AVX512F
16/32/64-bit
VMULPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 59 /r
AVX512VL and AVX512F
16/32/64-bit
VMULPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 59 /r
AVX512F
16/32/64-bit
MULPD xmm1, xmm2/m128
66 0F 59 /r
SSE2
16/32/64-bit
VMULPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 59 /r
AVX
16/32/64-bit
VMULPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
VMULPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
VMULPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 59 /r
AVX512F
16/32/64-bit
MULSS xmm1, xmm2/m32
F3 0F 59 /r
SSE
16/32/64-bit
VMULSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 59 /r
AVX
16/32/64-bit
VMULSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 59 /r
AVX512F
16/32/64-bit
MULSD xmm1, xmm2/m64
F2 0F 59 /r
SSE2
16/32/64-bit
VMULSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 59 /r
AVX
16/32/64-bit
VMULSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 59 /r
AVX512F
16/32/64-bit
CVTPS2PD xmm1, xmm2/m64
NP 0F 5A /r
SSE2
16/32/64-bit
VCVTPS2PD xmm1, xmm2/m64
VEX.128.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPS2PD ymm1, xmm2/m128
VEX.256.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPS2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.0F.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.0F.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.0F.W0 5A /r
AVX512F
16/32/64-bit
CVTPD2PS xmm1, xmm2/m128
66 0F 5A /r
SSE2
16/32/64-bit
VCVTPD2PS xmm1, xmm2/m128
VEX.128.66.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPD2PS xmm1, ymm2/m256
VEX.256.66.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTPD2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 5A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 5A /r
AVX512F
16/32/64-bit
CVTSS2SD xmm1, xmm2/m32
F3 0F 5A /r
SSE2
16/32/64-bit
VCVTSS2SD xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTSS2SD xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5A /r
AVX512F
16/32/64-bit
CVTSD2SS xmm1, xmm2/m64
F2 0F 5A /r
SSE2
16/32/64-bit
VCVTSD2SS xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5A /r
AVX
16/32/64-bit
VCVTSD2SS xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5A /r
AVX512F
16/32/64-bit
CVTDQ2PS xmm1, xmm2/m128
NP 0F 5B /r
SSE2
16/32/64-bit
VCVTDQ2PS xmm1, xmm2/m128
VEX.128.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTDQ2PS ymm1, ymm2/m256
VEX.256.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
VCVTDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
VCVTDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 5B /r
AVX512F
16/32/64-bit
VCVTQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 5B /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.0F.W1 5B /r
AVX512DQ
16/32/64-bit
CVTPS2DQ xmm1, xmm2/m128
66 0F 5B /r
SSE2
16/32/64-bit
VCVTPS2DQ xmm1, xmm2/m128
VEX.128.66.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTPS2DQ ymm1, ymm2/m256
VEX.256.66.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.66.0F.W0 5B /r
AVX512F
16/32/64-bit
CVTTPS2DQ xmm1, xmm2/m128
F3 0F 5B /r
SSE2
16/32/64-bit
VCVTTPS2DQ xmm1, xmm2/m128
VEX.128.F3.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTTPS2DQ ymm1, ymm2/m256
VEX.256.F3.0F.WIG 5B /r
AVX
16/32/64-bit
VCVTTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F3.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F3.0F.W0 5B /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.F3.0F.W0 5B /r
AVX512F
16/32/64-bit
SUBPS xmm1, xmm2/m128
NP 0F 5C /r
SSE
16/32/64-bit
VSUBPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5C /r
AVX512VL and AVX512F
16/32/64-bit
VSUBPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5C /r
AVX512VL and AVX512F
16/32/64-bit
VSUBPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 5C /r
AVX512F
16/32/64-bit
SUBPD xmm1, xmm2/m128
66 0F 5C /r
SSE2
16/32/64-bit
VSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5C /r
AVX512VL and AVX512F
16/32/64-bit
VSUBPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5C /r
AVX512VL and AVX512F
16/32/64-bit
VSUBPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 5C /r
AVX512F
16/32/64-bit
SUBSS xmm1, xmm2/m32
F3 0F 5C /r
SSE
16/32/64-bit
VSUBSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 5C /r
AVX512F
16/32/64-bit
SUBSD xmm1, xmm2/m64
F2 0F 5C /r
SSE2
16/32/64-bit
VSUBSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5C /r
AVX
16/32/64-bit
VSUBSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5C /r
AVX512F
16/32/64-bit
MINPS xmm1, xmm2/m128
NP 0F 5D /r
SSE
16/32/64-bit
VMINPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5D /r
AVX512VL and AVX512F
16/32/64-bit
VMINPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5D /r
AVX512VL and AVX512F
16/32/64-bit
VMINPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}
EVEX.512.0F.W0 5D /r
AVX512F
16/32/64-bit
MINPD xmm1, xmm2/m128
66 0F 5D /r
SSE2
16/32/64-bit
VMINPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5D /r
AVX
16/32/64-bit
VMINPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5D /r
AVX512VL and AVX512F
16/32/64-bit
VMINPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5D /r
AVX512VL and AVX512F
16/32/64-bit
VMINPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}
EVEX.512.66.0F.W1 5D /r
AVX512F
16/32/64-bit
MINSS xmm1, xmm2/m32
F3 0F 5D /r
SSE
16/32/64-bit
VMINSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5D /r
AVX
16/32/64-bit
VMINSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5D /r
AVX512F
16/32/64-bit
MINSD xmm1, xmm2/m64
F2 0F 5D /r
SSE2
16/32/64-bit
VMINSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5D /r
AVX
16/32/64-bit
VMINSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.F2.0F.W1 5D /r
AVX512F
16/32/64-bit
DIVPS xmm1, xmm2/m128
NP 0F 5E /r
SSE
16/32/64-bit
VDIVPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5E /r
AVX512VL and AVX512F
16/32/64-bit
VDIVPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5E /r
AVX512VL and AVX512F
16/32/64-bit
VDIVPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.0F.W0 5E /r
AVX512F
16/32/64-bit
DIVPD xmm1, xmm2/m128
66 0F 5E /r
SSE2
16/32/64-bit
VDIVPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5E /r
AVX512VL and AVX512F
16/32/64-bit
VDIVPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5E /r
AVX512VL and AVX512F
16/32/64-bit
VDIVPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F.W1 5E /r
AVX512F
16/32/64-bit
DIVSS xmm1, xmm2/m32
F3 0F 5E /r
SSE
16/32/64-bit
VDIVSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.0F.W0 5E /r
AVX512F
16/32/64-bit
DIVSD xmm1, xmm2/m64
F2 0F 5E /r
SSE2
16/32/64-bit
VDIVSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5E /r
AVX
16/32/64-bit
VDIVSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.0F.W1 5E /r
AVX512F
16/32/64-bit
MAXPS xmm1, xmm2/m128
NP 0F 5F /r
SSE
16/32/64-bit
VMAXPS xmm1, xmm2, xmm3/m128
VEX.128.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPS ymm1, ymm2, ymm3/m256
VEX.256.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.0F.W0 5F /r
AVX512VL and AVX512F
16/32/64-bit
VMAXPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.0F.W0 5F /r
AVX512VL and AVX512F
16/32/64-bit
VMAXPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}
EVEX.512.0F.W0 5F /r
AVX512F
16/32/64-bit
MAXPD xmm1, xmm2/m128
66 0F 5F /r
SSE2
16/32/64-bit
VMAXPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 5F /r
AVX512VL and AVX512F
16/32/64-bit
VMAXPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 5F /r
AVX512VL and AVX512F
16/32/64-bit
VMAXPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}
EVEX.512.66.0F.W1 5F /r
AVX512F
16/32/64-bit
MAXSS xmm1, xmm2/m32
F3 0F 5F /r
SSE
16/32/64-bit
VMAXSS xmm1, xmm2, xmm3/m32
VEX.LIG.F3.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.F3.0F.W0 5F /r
AVX512F
16/32/64-bit
MAXSD xmm1, xmm2/m64
F2 0F 5F /r
SSE2
16/32/64-bit
VMAXSD xmm1, xmm2, xmm3/m64
VEX.LIG.F2.0F.WIG 5F /r
AVX
16/32/64-bit
VMAXSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.F2.0F.W1 5F /r
AVX512F
16/32/64-bit
PUNPCKLBW mm, mm/m32
NP 0F 60 /r
MMX
16/32/64-bit
PUNPCKLBW xmm1, xmm2/m128
66 0F 60 /r
SSE2
16/32/64-bit
VPUNPCKLBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 60 /r
AVX
16/32/64-bit
VPUNPCKLBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 60 /r
AVX2
16/32/64-bit
VPUNPCKLBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 60 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKLBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 60 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKLBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 60 /r
AVX512BW
16/32/64-bit
PUNPCKLWD mm, mm/m32
NP 0F 61 /r
MMX
16/32/64-bit
PUNPCKLWD xmm1, xmm2/m128
66 0F 61 /r
SSE2
16/32/64-bit
VPUNPCKLWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 61 /r
AVX
16/32/64-bit
VPUNPCKLWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 61 /r
AVX2
16/32/64-bit
VPUNPCKLWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 61 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKLWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 61 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKLWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 61 /r
AVX512BW
16/32/64-bit
PUNPCKLDQ mm, mm/m32
NP 0F 62 /r
MMX
16/32/64-bit
PUNPCKLDQ xmm1, xmm2/m128
66 0F 62 /r
SSE2
16/32/64-bit
VPUNPCKLDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 62 /r
AVX
16/32/64-bit
VPUNPCKLDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 62 /r
AVX2
16/32/64-bit
VPUNPCKLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 62 /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 62 /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 62 /r
AVX512F
16/32/64-bit
PACKSSWB mm1, mm2/m64
NP 0F 63 /r
MMX
16/32/64-bit
PACKSSWB xmm1, xmm2/m128
66 0F 63 /r
SSE2
16/32/64-bit
VPACKSSWB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 63 /r
AVX
16/32/64-bit
VPACKSSWB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 63 /r
AVX2
16/32/64-bit
VPACKSSWB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 63 /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKSSWB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 63 /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKSSWB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 63 /r
AVX512BW
16/32/64-bit
PCMPGTB mm, mm/m64
NP 0F 64 /r
MMX
16/32/64-bit
PCMPGTB xmm1, xmm2/m128
66 0F 64 /r
SSE2
16/32/64-bit
VPCMPGTB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 64 /r
AVX
16/32/64-bit
VPCMPGTB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 64 /r
AVX2
16/32/64-bit
VPCMPGTB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 64 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPGTB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 64 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPGTB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 64 /r
AVX512BW
16/32/64-bit
PCMPGTW mm, mm/m64
NP 0F 65 /r
MMX
16/32/64-bit
PCMPGTW xmm1, xmm2/m128
66 0F 65 /r
SSE2
16/32/64-bit
VPCMPGTW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 65 /r
AVX
16/32/64-bit
VPCMPGTW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 65 /r
AVX2
16/32/64-bit
VPCMPGTW k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 65 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPGTW k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 65 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPGTW k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 65 /r
AVX512BW
16/32/64-bit
PCMPGTD mm, mm/m64
NP 0F 66 /r
MMX
16/32/64-bit
PCMPGTD xmm1, xmm2/m128
66 0F 66 /r
SSE2
16/32/64-bit
VPCMPGTD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 66 /r
AVX
16/32/64-bit
VPCMPGTD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 66 /r
AVX2
16/32/64-bit
VPCMPGTD k1 {k2}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 66 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPGTD k1 {k2}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 66 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPGTD k1 {k2}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 66 /r
AVX512F
16/32/64-bit
PACKUSWB mm, mm/m64
NP 0F 67 /r
MMX
16/32/64-bit
PACKUSWB xmm1, xmm2/m128
66 0F 67 /r
SSE2
16/32/64-bit
VPACKUSWB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 67 /r
AVX
16/32/64-bit
VPACKUSWB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 67 /r
AVX2
16/32/64-bit
VPACKUSWB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 67 /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKUSWB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 67 /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKUSWB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 67 /r
AVX512BW
16/32/64-bit
PUNPCKHBW mm, mm/m64
NP 0F 68 /r
MMX
16/32/64-bit
PUNPCKHBW xmm1, xmm2/m128
66 0F 68 /r
SSE2
16/32/64-bit
VPUNPCKHBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 68 /r
AVX
16/32/64-bit
VPUNPCKHBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 68 /r
AVX2
16/32/64-bit
VPUNPCKHBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 68 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKHBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 68 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKHBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 68 /r
AVX512BW
16/32/64-bit
PUNPCKHWD mm, mm/m64
NP 0F 69 /r
MMX
16/32/64-bit
PUNPCKHWD xmm1, xmm2/m128
66 0F 69 /r
SSE2
16/32/64-bit
VPUNPCKHWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 69 /r
AVX
16/32/64-bit
VPUNPCKHWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 69 /r
AVX2
16/32/64-bit
VPUNPCKHWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 69 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKHWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 69 /r
AVX512VL and AVX512BW
16/32/64-bit
VPUNPCKHWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 69 /r
AVX512BW
16/32/64-bit
PUNPCKHDQ mm, mm/m64
NP 0F 6A /r
MMX
16/32/64-bit
PUNPCKHDQ xmm1, xmm2/m128
66 0F 6A /r
SSE2
16/32/64-bit
VPUNPCKHDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6A /r
AVX
16/32/64-bit
VPUNPCKHDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6A /r
AVX2
16/32/64-bit
VPUNPCKHDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 6A /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKHDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 6A /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKHDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 6A /r
AVX512F
16/32/64-bit
PACKSSDW mm1, mm2/m64
NP 0F 6B /r
MMX
16/32/64-bit
PACKSSDW xmm1, xmm2/m128
66 0F 6B /r
SSE2
16/32/64-bit
VPACKSSDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6B /r
AVX
16/32/64-bit
VPACKSSDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6B /r
AVX2
16/32/64-bit
VPACKSSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 6B /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKSSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 6B /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKSSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 6B /r
AVX512BW
16/32/64-bit
PUNPCKLQDQ xmm1, xmm2/m128
66 0F 6C /r
SSE2
16/32/64-bit
VPUNPCKLQDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6C /r
AVX
16/32/64-bit
VPUNPCKLQDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6C /r
AVX2
16/32/64-bit
VPUNPCKLQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 6C /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKLQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 6C /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKLQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 6C /r
AVX512F
16/32/64-bit
PUNPCKHQDQ xmm1, xmm2/m128
66 0F 6D /r
SSE2
16/32/64-bit
VPUNPCKHQDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 6D /r
AVX
16/32/64-bit
VPUNPCKHQDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 6D /r
AVX2
16/32/64-bit
VPUNPCKHQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 6D /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKHQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 6D /r
AVX512VL and AVX512F
16/32/64-bit
VPUNPCKHQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 6D /r
AVX512F
16/32/64-bit
MOVD mm, r/m32
NP 0F 6E /r
MMX
16/32/64-bit
MOVQ mm, r/m64
NP o64 0F 6E /r
MMX
64-bit
MOVD xmm, r/m32
66 0F 6E /r
SSE2
16/32/64-bit
MOVQ xmm, r/m64
66 o64 0F 6E /r
SSE2
64-bit
VMOVD xmm1, r/m32
VEX.128.66.0F.W0 6E /r
AVX
16/32/64-bit
VMOVQ xmm1, r/m64
VEX.128.66.0F.W1 6E /r
AVX
64-bit
VMOVD xmm1, r/m32
EVEX.128.66.0F.W0 6E /r
AVX512F
16/32/64-bit
VMOVQ xmm1, r/m64
EVEX.128.66.0F.W1 6E /r
AVX512F
64-bit
MOVQ mm, mm/m64
NP 0F 6F /r
MMX
16/32/64-bit
MOVDQA xmm1, xmm2/m128
66 0F 6F /r
SSE2
16/32/64-bit
VMOVDQA xmm1, xmm2/m128
VEX.128.66.0F.WIG 6F /r
AVX
16/32/64-bit
VMOVDQA ymm1, ymm2/m256
VEX.256.66.0F.WIG 6F /r
AVX
16/32/64-bit
VMOVDQA32 xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA32 ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA32 zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W0 6F /r
AVX512F
16/32/64-bit
VMOVDQA64 xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA64 ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA64 zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F.W1 6F /r
AVX512F
16/32/64-bit
MOVDQU xmm1, xmm2/m128
F3 0F 6F /r
SSE2
16/32/64-bit
VMOVDQU xmm1, xmm2/m128
VEX.128.F3.0F.WIG 6F /r
AVX
16/32/64-bit
VMOVDQU ymm1, ymm2/m256
VEX.256.F3.0F.WIG 6F /r
AVX
16/32/64-bit
VMOVDQU32 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU32 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W0 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU32 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W0 6F /r
AVX512F
16/32/64-bit
VMOVDQU64 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F3.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU64 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F3.0F.W1 6F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU64 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F3.0F.W1 6F /r
AVX512F
16/32/64-bit
VMOVDQU8 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F2.0F.W0 6F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU8 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W0 6F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU8 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W0 6F /r
AVX512BW
16/32/64-bit
VMOVDQU16 xmm1 {k1}{z}, xmm2/m128
EVEX.128.F2.0F.W1 6F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU16 ymm1 {k1}{z}, ymm2/m256
EVEX.256.F2.0F.W1 6F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU16 zmm1 {k1}{z}, zmm2/m512
EVEX.512.F2.0F.W1 6F /r
AVX512BW
16/32/64-bit
PSHUFW mm1, mm2/m64, imm8
NP 0F 70 /r ib
SSE
16/32/64-bit
PSHUFD xmm1, xmm2/m128, imm8
66 0F 70 /r ib
SSE2
16/32/64-bit
VPSHUFD xmm1, xmm2/m128, imm8
VEX.128.66.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFD ymm1, ymm2/m256, imm8
VEX.256.66.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPSHUFD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 70 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPSHUFD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 70 /r ib
AVX512F
16/32/64-bit
PSHUFHW xmm1, xmm2/m128, imm8
F3 0F 70 /r ib
SSE2
16/32/64-bit
VPSHUFHW xmm1, xmm2/m128, imm8
VEX.128.F3.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFHW ymm1, ymm2/m256, imm8
VEX.256.F3.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFHW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPSHUFHW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F3.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPSHUFHW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F3.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
PSHUFLW xmm1, xmm2/m128, imm8
F2 0F 70 /r ib
SSE2
16/32/64-bit
VPSHUFLW xmm1, xmm2/m128, imm8
VEX.128.F2.0F.WIG 70 /r ib
AVX
16/32/64-bit
VPSHUFLW ymm1, ymm2/m256, imm8
VEX.256.F2.0F.WIG 70 /r ib
AVX2
16/32/64-bit
VPSHUFLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPSHUFLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.F2.0F.WIG 70 /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPSHUFLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.F2.0F.WIG 70 /r ib
AVX512BW
16/32/64-bit
PSRLW mm, imm8
NP 0F 71 /2 ib
MMX
16/32/64-bit
PSRLW xmm1, imm8
66 0F 71 /2 ib
SSE2
16/32/64-bit
VPSRLW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /2 ib
AVX
16/32/64-bit
VPSRLW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /2 ib
AVX2
16/32/64-bit
VPSRLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /2 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /2 ib
AVX512BW
16/32/64-bit
PSRAW mm, imm8
NP 0F 71 /4 ib
MMX
16/32/64-bit
PSRAW xmm1, imm8
66 0F 71 /4 ib
SSE2
16/32/64-bit
VPSRAW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /4 ib
AVX
16/32/64-bit
VPSRAW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /4 ib
AVX2
16/32/64-bit
VPSRAW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /4 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /4 ib
AVX512BW
16/32/64-bit
PSLLW mm1, imm8
NP 0F 71 /6 ib
MMX
16/32/64-bit
PSLLW xmm1, imm8
66 0F 71 /6 ib
SSE2
16/32/64-bit
VPSLLW xmm1, xmm2, imm8
VEX.128.66.0F.WIG 71 /6 ib
AVX
16/32/64-bit
VPSLLW ymm1, ymm2, imm8
VEX.256.66.0F.WIG 71 /6 ib
AVX2
16/32/64-bit
VPSLLW xmm1 {k1}{z}, xmm2/m128, imm8
EVEX.128.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW ymm1 {k1}{z}, ymm2/m256, imm8
EVEX.256.66.0F.WIG 71 /6 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW zmm1 {k1}{z}, zmm2/m512, imm8
EVEX.512.66.0F.WIG 71 /6 ib
AVX512BW
16/32/64-bit
VPRORD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
VPRORD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
VPRORD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /0 ib
AVX512F
16/32/64-bit
VPRORQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
VPRORQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /0 ib
AVX512VL and AVX512F
16/32/64-bit
VPRORQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /0 ib
AVX512F
16/32/64-bit
VPROLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
VPROLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
VPROLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /1 ib
AVX512F
16/32/64-bit
VPROLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
VPROLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /1 ib
AVX512VL and AVX512F
16/32/64-bit
VPROLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /1 ib
AVX512F
16/32/64-bit
PSRLD mm, imm8
NP 0F 72 /2 ib
MMX
16/32/64-bit
PSRLD xmm1, imm8
66 0F 72 /2 ib
SSE2
16/32/64-bit
VPSRLD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /2 ib
AVX
16/32/64-bit
VPSRLD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /2 ib
AVX2
16/32/64-bit
VPSRLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /2 ib
AVX512F
16/32/64-bit
PSRAD mm, imm8
NP 0F 72 /4 ib
MMX
16/32/64-bit
PSRAD xmm1, imm8
66 0F 72 /4 ib
SSE2
16/32/64-bit
VPSRAD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /4 ib
AVX
16/32/64-bit
VPSRAD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /4 ib
AVX2
16/32/64-bit
VPSRAD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /4 ib
AVX512F
16/32/64-bit
VPSRAQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 72 /4 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRAQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 72 /4 ib
AVX512F
16/32/64-bit
PSLLD mm, imm8
NP 0F 72 /6 ib
MMX
16/32/64-bit
PSLLD xmm1, imm8
66 0F 72 /6 ib
SSE2
16/32/64-bit
VPSLLD xmm1, xmm2, imm8
VEX.128.66.0F.WIG 72 /6 ib
AVX
16/32/64-bit
VPSLLD ymm1, ymm2, imm8
VEX.256.66.0F.WIG 72 /6 ib
AVX2
16/32/64-bit
VPSLLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F.W0 72 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F.W0 72 /6 ib
AVX512F
16/32/64-bit
PSRLQ mm, imm8
NP 0F 73 /2 ib
MMX
16/32/64-bit
PSRLQ xmm1, imm8
66 0F 73 /2 ib
SSE2
16/32/64-bit
VPSRLQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /2 ib
AVX
16/32/64-bit
VPSRLQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /2 ib
AVX2
16/32/64-bit
VPSRLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /2 ib
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /2 ib
AVX512F
16/32/64-bit
PSRLDQ xmm1, imm8
66 0F 73 /3 ib
SSE2
16/32/64-bit
VPSRLDQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /3 ib
AVX
16/32/64-bit
VPSRLDQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /3 ib
AVX2
16/32/64-bit
VPSRLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /3 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSRLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /3 ib
AVX512BW
16/32/64-bit
PSLLQ mm, imm8
NP 0F 73 /6 ib
MMX
16/32/64-bit
PSLLQ xmm1, imm8
66 0F 73 /6 ib
SSE2
16/32/64-bit
VPSLLQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /6 ib
AVX
16/32/64-bit
VPSLLQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /6 ib
AVX2
16/32/64-bit
VPSLLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F.W1 73 /6 ib
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F.W1 73 /6 ib
AVX512F
16/32/64-bit
PSLLDQ xmm1, imm8
66 0F 73 /7 ib
SSE2
16/32/64-bit
VPSLLDQ xmm1, xmm2, imm8
VEX.128.66.0F.WIG 73 /7 ib
AVX
16/32/64-bit
VPSLLDQ ymm1, ymm2, imm8
VEX.256.66.0F.WIG 73 /7 ib
AVX2
16/32/64-bit
VPSLLDQ xmm1, xmm2/m128, imm8
EVEX.128.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLDQ ymm1, ymm2/m256, imm8
EVEX.256.66.0F.WIG 73 /7 ib
AVX512VL and AVX512BW
16/32/64-bit
VPSLLDQ zmm1, zmm2/m512, imm8
EVEX.512.66.0F.WIG 73 /7 ib
AVX512BW
16/32/64-bit
PCMPEQB mm, mm/m64
NP 0F 74 /r
MMX
16/32/64-bit
PCMPEQB xmm1, xmm2/m128
66 0F 74 /r
SSE2
16/32/64-bit
VPCMPEQB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 74 /r
AVX
16/32/64-bit
VPCMPEQB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 74 /r
AVX2
16/32/64-bit
VPCMPEQB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 74 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPEQB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 74 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPEQB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 74 /r
AVX512BW
16/32/64-bit
PCMPEQW mm, mm/m64
NP 0F 75 /r
MMX
16/32/64-bit
PCMPEQW xmm1, xmm2/m128
66 0F 75 /r
SSE2
16/32/64-bit
VPCMPEQW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 75 /r
AVX
16/32/64-bit
VPCMPEQW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 75 /r
AVX2
16/32/64-bit
VPCMPEQW k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG 75 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPEQW k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG 75 /r
AVX512VL and AVX512BW
16/32/64-bit
VPCMPEQW k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG 75 /r
AVX512BW
16/32/64-bit
PCMPEQD mm, mm/m64
NP 0F 76 /r
MMX
16/32/64-bit
PCMPEQD xmm1, xmm2/m128
66 0F 76 /r
SSE2
16/32/64-bit
VPCMPEQD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 76 /r
AVX
16/32/64-bit
VPCMPEQD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 76 /r
AVX2
16/32/64-bit
VPCMPEQD k1 {k2}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPEQD k1 {k2}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPEQD k1 {k2}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 76 /r
AVX512F
16/32/64-bit
EMMS
NP 0F 77
MMX
16/32/64-bit
VZEROUPPER
VEX.128.0F.WIG 77
AVX
16/32/64-bit
VZEROALL
VEX.256.0F.WIG 77
AVX
16/32/64-bit
VMREAD r/m32, r32
NP 0F 78 /r
VMX
16/32-bit
VMREAD r/m64, r64
NP 0F 78 /r
VMX
64-bit
VCVTTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 78 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 78 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.0F.W0 78 /r
AVX512F
16/32/64-bit
VCVTTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 78 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.0F.W1 78 /r
AVX512F
16/32/64-bit
EXTRQ xmm1, imm8, imm8
66 0F 78 /0 ib ib
SSE4A
16/32/64-bit
VCVTTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.66.0F.W0 78 /r
AVX512DQ
16/32/64-bit
VCVTTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 78 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 78 /r
AVX512DQ
16/32/64-bit
VCVTTSS2USI r32, xmm1/m32{sae}
EVEX.LIG.F3.0F.W0 78 /r
AVX512F
16/32/64-bit
VCVTTSS2USI r64, xmm1/m32{sae}
EVEX.LIG.F3.0F.W1 78 /r
AVX512F
64-bit
INSERTQ xmm1, xmm2, imm8, imm8
F2 0F 78 /r ib ib
SSE4A
16/32/64-bit
VCVTTSD2USI r32, xmm1/m64{sae}
EVEX.LIG.F2.0F.W0 78 /r
AVX512F
16/32/64-bit
VCVTTSD2USI r64, xmm1/m64{sae}
EVEX.LIG.F2.0F.W1 78 /r
AVX512F
64-bit
VMWRITE r32, r/m32
NP 0F 79 /r
VMX
16/32-bit
VMWRITE r64, r/m64
NP 0F 79 /r
VMX
64-bit
VCVTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.0F.W0 79 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.0F.W0 79 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.0F.W0 79 /r
AVX512F
16/32/64-bit
VCVTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.0F.W1 79 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.0F.W1 79 /r
AVX512F
16/32/64-bit
EXTRQ xmm1, xmm2
66 0F 79 /r
SSE4A
16/32/64-bit
VCVTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.66.0F.W0 79 /r
AVX512DQ
16/32/64-bit
VCVTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 79 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 79 /r
AVX512DQ
16/32/64-bit
VCVTSS2USI r32, xmm1/m32{er}
EVEX.LIG.F3.0F.W0 79 /r
AVX512F
16/32/64-bit
VCVTSS2USI r64, xmm1/m32{er}
EVEX.LIG.F3.0F.W1 79 /r
AVX512F
64-bit
INSERTQ xmm1, xmm2
F2 0F 79 /r
SSE4A
16/32/64-bit
VCVTSD2USI r32, xmm1/m64{er}
EVEX.LIG.F2.0F.W0 79 /r
AVX512F
16/32/64-bit
VCVTSD2USI r64, xmm1/m64{er}
EVEX.LIG.F2.0F.W1 79 /r
AVX512F
64-bit
VCVTTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}
EVEX.512.66.0F.W0 7A /r
AVX512DQ
16/32/64-bit
VCVTTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 7A /r
AVX512DQ
16/32/64-bit
VCVTUDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.F3.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTUDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.F3.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTUDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.F3.0F.W0 7A /r
AVX512F
16/32/64-bit
VCVTUQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F3.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTUQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F3.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTUQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F3.0F.W1 7A /r
AVX512DQ
16/32/64-bit
VCVTUDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F2.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTUDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F2.0F.W0 7A /r
AVX512VL and AVX512F
16/32/64-bit
VCVTUDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.F2.0F.W0 7A /r
AVX512F
16/32/64-bit
VCVTUQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTUQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 7A /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTUQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.0F.W1 7A /r
AVX512DQ
16/32/64-bit
VCVTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.66.0F.W0 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.66.0F.W0 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.66.0F.W0 7B /r
AVX512DQ
16/32/64-bit
VCVTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 7B /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.0F.W1 7B /r
AVX512DQ
16/32/64-bit
VCVTUSI2SS xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.0F.W0 7B /r
AVX512F
16/32/64-bit
VCVTUSI2SS xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.0F.W1 7B /r
AVX512F
64-bit
VCVTUSI2SD xmm1, xmm2, r/m32{er}
EVEX.LIG.F2.0F.W0 7B /r
AVX512F
16/32/64-bit
VCVTUSI2SD xmm1, xmm2, r/m64{er}
EVEX.LIG.F2.0F.W1 7B /r
AVX512F
64-bit
HADDPD xmm1, xmm2/m128
66 0F 7C /r
SSE3
16/32/64-bit
VHADDPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 7C /r
AVX
16/32/64-bit
VHADDPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 7C /r
AVX
16/32/64-bit
HADDPS xmm1, xmm2/m128
F2 0F 7C /r
SSE3
16/32/64-bit
VHADDPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG 7C /r
AVX
16/32/64-bit
VHADDPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG 7C /r
AVX
16/32/64-bit
HSUBPD xmm1, xmm2/m128
66 0F 7D /r
SSE3
16/32/64-bit
VHSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG 7D /r
AVX
16/32/64-bit
VHSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG 7D /r
AVX
16/32/64-bit
HSUBPS xmm1, xmm2/m128
F2 0F 7D /r
SSE3
16/32/64-bit
VHSUBPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG 7D /r
AVX
16/32/64-bit
VHSUBPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG 7D /r
AVX
16/32/64-bit
MOVD r/m32, mm
NP 0F 7E /r
MMX
16/32/64-bit
MOVQ r/m64, mm
NP o64 0F 7E /r
MMX
64-bit
MOVD r/m32, xmm
66 0F 7E /r
SSE2
16/32/64-bit
MOVQ r/m64, xmm
66 o64 0F 7E /r
SSE2
64-bit
VMOVD r/m32, xmm1
VEX.128.66.0F.W0 7E /r
AVX
16/32/64-bit
VMOVQ r/m64, xmm1
VEX.128.66.0F.W1 7E /r
AVX
64-bit
VMOVD r/m32, xmm1
EVEX.128.66.0F.W0 7E /r
AVX512F
16/32/64-bit
VMOVQ r/m64, xmm1
EVEX.128.66.0F.W1 7E /r
AVX512F
64-bit
MOVQ xmm1, xmm2/m64
F3 0F 7E /r
SSE2
16/32/64-bit
VMOVQ xmm1, xmm2/m64
VEX.128.F3.0F.WIG 7E /r
AVX
16/32/64-bit
VMOVQ xmm1, xmm2/m64
EVEX.128.F3.0F.W1 7E /r
AVX512F
16/32/64-bit
MOVQ mm/m64, mm
NP 0F 7F /r
MMX
16/32/64-bit
MOVDQA xmm2/m128, xmm1
66 0F 7F /r
SSE2
16/32/64-bit
VMOVDQA xmm2/m128, xmm1
VEX.128.66.0F.WIG 7F /r
AVX
16/32/64-bit
VMOVDQA ymm2/m256, ymm1
VEX.256.66.0F.WIG 7F /r
AVX
16/32/64-bit
VMOVDQA32 xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA32 ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA32 zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W0 7F /r
AVX512F
16/32/64-bit
VMOVDQA64 xmm2/m128 {k1}{z}, xmm1
EVEX.128.66.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA64 ymm2/m256 {k1}{z}, ymm1
EVEX.256.66.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQA64 zmm2/m512 {k1}{z}, zmm1
EVEX.512.66.0F.W1 7F /r
AVX512F
16/32/64-bit
MOVDQU xmm2/m128, xmm1
F3 0F 7F /r
SSE2
16/32/64-bit
VMOVDQU xmm2/m128, xmm1
VEX.128.F3.0F.WIG 7F /r
AVX
16/32/64-bit
VMOVDQU ymm2/m256, ymm1
VEX.256.F3.0F.WIG 7F /r
AVX
16/32/64-bit
VMOVDQU32 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F3.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU32 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F3.0F.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU32 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F3.0F.W0 7F /r
AVX512F
16/32/64-bit
VMOVDQU64 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F3.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU64 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F3.0F.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
VMOVDQU64 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F3.0F.W1 7F /r
AVX512F
16/32/64-bit
VMOVDQU8 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F2.0F.W0 7F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU8 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F2.0F.W0 7F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU8 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F2.0F.W0 7F /r
AVX512BW
16/32/64-bit
VMOVDQU16 xmm2/m128 {k1}{z}, xmm1
EVEX.128.F2.0F.W1 7F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU16 ymm2/m256 {k1}{z}, ymm1
EVEX.256.F2.0F.W1 7F /r
AVX512VL and AVX512BW
16/32/64-bit
VMOVDQU16 zmm2/m512 {k1}{z}, zmm1
EVEX.512.F2.0F.W1 7F /r
AVX512BW
16/32/64-bit
JO rel16
o16 0F 80 cw
386+
16/32/64-bit
JO rel32
o32 0F 80 cd
386+
16/32-bit
JO rel32
o64 0F 80 cd
X64
64-bit
JNO rel16
o16 0F 81 cw
386+
16/32/64-bit
JNO rel32
o32 0F 81 cd
386+
16/32-bit
JNO rel32
o64 0F 81 cd
X64
64-bit
JB rel16
o16 0F 82 cw
386+
16/32/64-bit
JB rel32
o32 0F 82 cd
386+
16/32-bit
JB rel32
o64 0F 82 cd
X64
64-bit
JAE rel16
o16 0F 83 cw
386+
16/32/64-bit
JAE rel32
o32 0F 83 cd
386+
16/32-bit
JAE rel32
o64 0F 83 cd
X64
64-bit
JE rel16
o16 0F 84 cw
386+
16/32/64-bit
JE rel32
o32 0F 84 cd
386+
16/32-bit
JE rel32
o64 0F 84 cd
X64
64-bit
JNE rel16
o16 0F 85 cw
386+
16/32/64-bit
JNE rel32
o32 0F 85 cd
386+
16/32-bit
JNE rel32
o64 0F 85 cd
X64
64-bit
JBE rel16
o16 0F 86 cw
386+
16/32/64-bit
JBE rel32
o32 0F 86 cd
386+
16/32-bit
JBE rel32
o64 0F 86 cd
X64
64-bit
JA rel16
o16 0F 87 cw
386+
16/32/64-bit
JA rel32
o32 0F 87 cd
386+
16/32-bit
JA rel32
o64 0F 87 cd
X64
64-bit
JS rel16
o16 0F 88 cw
386+
16/32/64-bit
JS rel32
o32 0F 88 cd
386+
16/32-bit
JS rel32
o64 0F 88 cd
X64
64-bit
JNS rel16
o16 0F 89 cw
386+
16/32/64-bit
JNS rel32
o32 0F 89 cd
386+
16/32-bit
JNS rel32
o64 0F 89 cd
X64
64-bit
JP rel16
o16 0F 8A cw
386+
16/32/64-bit
JP rel32
o32 0F 8A cd
386+
16/32-bit
JP rel32
o64 0F 8A cd
X64
64-bit
JNP rel16
o16 0F 8B cw
386+
16/32/64-bit
JNP rel32
o32 0F 8B cd
386+
16/32-bit
JNP rel32
o64 0F 8B cd
X64
64-bit
JL rel16
o16 0F 8C cw
386+
16/32/64-bit
JL rel32
o32 0F 8C cd
386+
16/32-bit
JL rel32
o64 0F 8C cd
X64
64-bit
JGE rel16
o16 0F 8D cw
386+
16/32/64-bit
JGE rel32
o32 0F 8D cd
386+
16/32-bit
JGE rel32
o64 0F 8D cd
X64
64-bit
JLE rel16
o16 0F 8E cw
386+
16/32/64-bit
JLE rel32
o32 0F 8E cd
386+
16/32-bit
JLE rel32
o64 0F 8E cd
X64
64-bit
JG rel16
o16 0F 8F cw
386+
16/32/64-bit
JG rel32
o32 0F 8F cd
386+
16/32-bit
JG rel32
o64 0F 8F cd
X64
64-bit
SETO r/m8
0F 90 /r
386+
16/32/64-bit
SETNO r/m8
0F 91 /r
386+
16/32/64-bit
SETB r/m8
0F 92 /r
386+
16/32/64-bit
SETAE r/m8
0F 93 /r
386+
16/32/64-bit
SETE r/m8
0F 94 /r
386+
16/32/64-bit
SETNE r/m8
0F 95 /r
386+
16/32/64-bit
SETBE r/m8
0F 96 /r
386+
16/32/64-bit
SETA r/m8
0F 97 /r
386+
16/32/64-bit
SETS r/m8
0F 98 /r
386+
16/32/64-bit
SETNS r/m8
0F 99 /r
386+
16/32/64-bit
SETP r/m8
0F 9A /r
386+
16/32/64-bit
SETNP r/m8
0F 9B /r
386+
16/32/64-bit
SETL r/m8
0F 9C /r
386+
16/32/64-bit
SETGE r/m8
0F 9D /r
386+
16/32/64-bit
SETLE r/m8
0F 9E /r
386+
16/32/64-bit
SETG r/m8
0F 9F /r
386+
16/32/64-bit
KMOVW k1, k2/m16
VEX.L0.0F.W0 90 /r
AVX512F
16/32/64-bit
KMOVQ k1, k2/m64
VEX.L0.0F.W1 90 /r
AVX512BW
16/32/64-bit
KMOVB k1, k2/m8
VEX.L0.66.0F.W0 90 /r
AVX512DQ
16/32/64-bit
KMOVD k1, k2/m32
VEX.L0.66.0F.W1 90 /r
AVX512BW
16/32/64-bit
KMOVW m16, k1
VEX.L0.0F.W0 91 /r
AVX512F
16/32/64-bit
KMOVQ m64, k1
VEX.L0.0F.W1 91 /r
AVX512BW
16/32/64-bit
KMOVB m8, k1
VEX.L0.66.0F.W0 91 /r
AVX512DQ
16/32/64-bit
KMOVD m32, k1
VEX.L0.66.0F.W1 91 /r
AVX512BW
16/32/64-bit
KMOVW k1, r32
VEX.L0.0F.W0 92 /r
AVX512F
16/32/64-bit
KMOVB k1, r32
VEX.L0.66.0F.W0 92 /r
AVX512DQ
16/32/64-bit
KMOVD k1, r32
VEX.L0.F2.0F.W0 92 /r
AVX512BW
16/32/64-bit
KMOVQ k1, r64
VEX.L0.F2.0F.W1 92 /r
AVX512BW
64-bit
KMOVW r32, k1
VEX.L0.0F.W0 93 /r
AVX512F
16/32/64-bit
KMOVB r32, k1
VEX.L0.66.0F.W0 93 /r
AVX512DQ
16/32/64-bit
KMOVD r32, k1
VEX.L0.F2.0F.W0 93 /r
AVX512BW
16/32/64-bit
KMOVQ r64, k1
VEX.L0.F2.0F.W1 93 /r
AVX512BW
64-bit
KORTESTW k1, k2
VEX.L0.0F.W0 98 /r
AVX512F
16/32/64-bit
KORTESTQ k1, k2
VEX.L0.0F.W1 98 /r
AVX512BW
16/32/64-bit
KORTESTB k1, k2
VEX.L0.66.0F.W0 98 /r
AVX512DQ
16/32/64-bit
KORTESTD k1, k2
VEX.L0.66.0F.W1 98 /r
AVX512BW
16/32/64-bit
KTESTW k1, k2
VEX.L0.0F.W0 99 /r
AVX512DQ
16/32/64-bit
KTESTQ k1, k2
VEX.L0.0F.W1 99 /r
AVX512BW
16/32/64-bit
KTESTB k1, k2
VEX.L0.66.0F.W0 99 /r
AVX512DQ
16/32/64-bit
KTESTD k1, k2
VEX.L0.66.0F.W1 99 /r
AVX512BW
16/32/64-bit
PUSH FS
o16 0F A0
386+
16/32/64-bit
PUSH FS
o32 0F A0
386+
16/32-bit
PUSH FS
o64 0F A0
X64
64-bit
POP FS
o16 0F A1
386+
16/32/64-bit
POP FS
o32 0F A1
386+
16/32-bit
POP FS
o64 0F A1
X64
64-bit
CPUID
0F A2
CPUID
16/32/64-bit
BT r/m16, r16
o16 0F A3 /r
386+
16/32/64-bit
BT r/m32, r32
o32 0F A3 /r
386+
16/32/64-bit
BT r/m64, r64
o64 0F A3 /r
X64
64-bit
SHLD r/m16, r16, imm8
o16 0F A4 /r ib
386+
16/32/64-bit
SHLD r/m32, r32, imm8
o32 0F A4 /r ib
386+
16/32/64-bit
SHLD r/m64, r64, imm8
o64 0F A4 /r ib
X64
64-bit
SHLD r/m16, r16, CL
o16 0F A5 /r
386+
16/32/64-bit
SHLD r/m32, r32, CL
o32 0F A5 /r
386+
16/32/64-bit
SHLD r/m64, r64, CL
o64 0F A5 /r
X64
64-bit
MONTMUL
a16 F3 0F A6 C0
PADLOCK_PMM
16/32-bit
MONTMUL
a32 F3 0F A6 C0
PADLOCK_PMM
16/32/64-bit
MONTMUL
a64 F3 0F A6 C0
PADLOCK_PMM
64-bit
XSHA1
a16 F3 0F A6 C8
PADLOCK_PHE
16/32-bit
XSHA1
a32 F3 0F A6 C8
PADLOCK_PHE
16/32/64-bit
XSHA1
a64 F3 0F A6 C8
PADLOCK_PHE
64-bit
XSHA256
a16 F3 0F A6 D0
PADLOCK_PHE
16/32-bit
XSHA256
a32 F3 0F A6 D0
PADLOCK_PHE
16/32/64-bit
XSHA256
a64 F3 0F A6 D0
PADLOCK_PHE
64-bit
XBTS r16, r/m16
o16 0F A6 /r
386 A0
16/32-bit
XBTS r32, r/m32
o32 0F A6 /r
386 A0
16/32-bit
XSTORE
a16 0F A7 C0
PADLOCK_RNG
16/32-bit
XSTORE
a32 0F A7 C0
PADLOCK_RNG
16/32/64-bit
XSTORE
a64 0F A7 C0
PADLOCK_RNG
64-bit
XCRYPTECB
a16 F3 0F A7 C8
PADLOCK_ACE
16/32-bit
XCRYPTECB
a32 F3 0F A7 C8
PADLOCK_ACE
16/32/64-bit
XCRYPTECB
a64 F3 0F A7 C8
PADLOCK_ACE
64-bit
XCRYPTCBC
a16 F3 0F A7 D0
PADLOCK_ACE
16/32-bit
XCRYPTCBC
a32 F3 0F A7 D0
PADLOCK_ACE
16/32/64-bit
XCRYPTCBC
a64 F3 0F A7 D0
PADLOCK_ACE
64-bit
XCRYPTCTR
a16 F3 0F A7 D8
PADLOCK_ACE
16/32-bit
XCRYPTCTR
a32 F3 0F A7 D8
PADLOCK_ACE
16/32/64-bit
XCRYPTCTR
a64 F3 0F A7 D8
PADLOCK_ACE
64-bit
XCRYPTCFB
a16 F3 0F A7 E0
PADLOCK_ACE
16/32-bit
XCRYPTCFB
a32 F3 0F A7 E0
PADLOCK_ACE
16/32/64-bit
XCRYPTCFB
a64 F3 0F A7 E0
PADLOCK_ACE
64-bit
XCRYPTOFB
a16 F3 0F A7 E8
PADLOCK_ACE
16/32-bit
XCRYPTOFB
a32 F3 0F A7 E8
PADLOCK_ACE
16/32/64-bit
XCRYPTOFB
a64 F3 0F A7 E8
PADLOCK_ACE
64-bit
IBTS r/m16, r16
o16 0F A7 /r
386 A0
16/32-bit
IBTS r/m32, r32
o32 0F A7 /r
386 A0
16/32-bit
CMPXCHG r/m8, r8
0F A6 /r
486 A
16/32-bit
CMPXCHG r/m16, r16
o16 0F A7 /r
486 A
16/32-bit
CMPXCHG r/m32, r32
o32 0F A7 /r
486 A
16/32-bit
PUSH GS
o16 0F A8
386+
16/32/64-bit
PUSH GS
o32 0F A8
386+
16/32-bit
PUSH GS
o64 0F A8
X64
64-bit
POP GS
o16 0F A9
386+
16/32/64-bit
POP GS
o32 0F A9
386+
16/32-bit
POP GS
o64 0F A9
X64
64-bit
RSM
0F AA
386+
16/32/64-bit
BTS r/m16, r16
o16 0F AB /r
386+
16/32/64-bit
BTS r/m32, r32
o32 0F AB /r
386+
16/32/64-bit
BTS r/m64, r64
o64 0F AB /r
X64
64-bit
SHRD r/m16, r16, imm8
o16 0F AC /r ib
386+
16/32/64-bit
SHRD r/m32, r32, imm8
o32 0F AC /r ib
386+
16/32/64-bit
SHRD r/m64, r64, imm8
o64 0F AC /r ib
X64
64-bit
SHRD r/m16, r16, CL
o16 0F AD /r
386+
16/32/64-bit
SHRD r/m32, r32, CL
o32 0F AD /r
386+
16/32/64-bit
SHRD r/m64, r64, CL
o64 0F AD /r
X64
64-bit
FXSAVE m512byte
NP 0F AE /0
FXSR
16/32/64-bit
FXSAVE64 m512byte
NP o64 0F AE /0
FXSR
64-bit
RDFSBASE r32
F3 0F AE /0
FSGSBASE
64-bit
RDFSBASE r64
F3 o64 0F AE /0
FSGSBASE
64-bit
FXRSTOR m512byte
NP 0F AE /1
FXSR
16/32/64-bit
FXRSTOR64 m512byte
NP o64 0F AE /1
FXSR
64-bit
RDGSBASE r32
F3 0F AE /1
FSGSBASE
64-bit
RDGSBASE r64
F3 o64 0F AE /1
FSGSBASE
64-bit
LDMXCSR m32
NP 0F AE /2
SSE
16/32/64-bit
WRFSBASE r32
F3 0F AE /2
FSGSBASE
64-bit
WRFSBASE r64
F3 o64 0F AE /2
FSGSBASE
64-bit
VLDMXCSR m32
VEX.LZ.0F.WIG AE /2
AVX
16/32/64-bit
STMXCSR m32
NP 0F AE /3
SSE
16/32/64-bit
WRGSBASE r32
F3 0F AE /3
FSGSBASE
64-bit
WRGSBASE r64
F3 o64 0F AE /3
FSGSBASE
64-bit
VSTMXCSR m32
VEX.LZ.0F.WIG AE /3
AVX
16/32/64-bit
XSAVE mem
NP 0F AE /4
XSAVE
16/32/64-bit
XSAVE64 mem
NP o64 0F AE /4
XSAVE
64-bit
PTWRITE r/m32
F3 0F AE /4
PTWRITE
16/32/64-bit
PTWRITE r/m64
F3 o64 0F AE /4
PTWRITE
64-bit
XRSTOR mem
NP 0F AE /5
XSAVE
16/32/64-bit
XRSTOR64 mem
NP o64 0F AE /5
XSAVE
64-bit
INCSSPD r32
F3 0F AE /5
CET_SS
16/32/64-bit
INCSSPQ r64
F3 o64 0F AE /5
CET_SS
64-bit
XSAVEOPT mem
NP 0F AE /6
XSAVEOPT
16/32/64-bit
XSAVEOPT64 mem
NP o64 0F AE /6
XSAVEOPT
64-bit
CLWB m8
66 0F AE /6
CLWB
16/32/64-bit
TPAUSE r32, <edx>, <eax>
66 0F AE /6
WAITPKG
16/32/64-bit
TPAUSE r64, <edx>, <eax>
66 o64 0F AE /6
WAITPKG
64-bit
CLRSSBSY m64
F3 0F AE /6
CET_SS
16/32/64-bit
UMONITOR r16
a16 F3 0F AE /6
WAITPKG
16/32-bit
UMONITOR r32
a32 F3 0F AE /6
WAITPKG
16/32/64-bit
UMONITOR r64
a64 F3 0F AE /6
WAITPKG
64-bit
UMWAIT r32, <edx>, <eax>
F2 0F AE /6
WAITPKG
16/32/64-bit
UMWAIT r64, <edx>, <eax>
F2 o64 0F AE /6
WAITPKG
64-bit
CLFLUSH m8
NP 0F AE /7
CLFSH
16/32/64-bit
CLFLUSHOPT m8
66 0F AE /7
CLFLUSHOPT
16/32/64-bit
LFENCE
NP 0F AE E8
SSE2
16/32/64-bit
LFENCE
NP 0F AE E9
SSE2
16/32/64-bit
LFENCE
NP 0F AE EA
SSE2
16/32/64-bit
LFENCE
NP 0F AE EB
SSE2
16/32/64-bit
LFENCE
NP 0F AE EC
SSE2
16/32/64-bit
LFENCE
NP 0F AE ED
SSE2
16/32/64-bit
LFENCE
NP 0F AE EE
SSE2
16/32/64-bit
LFENCE
NP 0F AE EF
SSE2
16/32/64-bit
MFENCE
NP 0F AE F0
SSE2
16/32/64-bit
MFENCE
NP 0F AE F1
SSE2
16/32/64-bit
MFENCE
NP 0F AE F2
SSE2
16/32/64-bit
MFENCE
NP 0F AE F3
SSE2
16/32/64-bit
MFENCE
NP 0F AE F4
SSE2
16/32/64-bit
MFENCE
NP 0F AE F5
SSE2
16/32/64-bit
MFENCE
NP 0F AE F6
SSE2
16/32/64-bit
MFENCE
NP 0F AE F7
SSE2
16/32/64-bit
SFENCE
NP 0F AE F8
SSE
16/32/64-bit
SFENCE
NP 0F AE F9
SSE
16/32/64-bit
SFENCE
NP 0F AE FA
SSE
16/32/64-bit
SFENCE
NP 0F AE FB
SSE
16/32/64-bit
SFENCE
NP 0F AE FC
SSE
16/32/64-bit
SFENCE
NP 0F AE FD
SSE
16/32/64-bit
SFENCE
NP 0F AE FE
SSE
16/32/64-bit
SFENCE
NP 0F AE FF
SSE
16/32/64-bit
PCOMMIT
66 0F AE F8
PCOMMIT
16/32/64-bit
IMUL r16, r/m16
o16 0F AF /r
386+
16/32/64-bit
IMUL r32, r/m32
o32 0F AF /r
386+
16/32/64-bit
IMUL r64, r/m64
o64 0F AF /r
X64
64-bit
CMPXCHG r/m8, r8
0F B0 /r
486+
16/32/64-bit
CMPXCHG r/m16, r16
o16 0F B1 /r
486+
16/32/64-bit
CMPXCHG r/m32, r32
o32 0F B1 /r
486+
16/32/64-bit
CMPXCHG r/m64, r64
o64 0F B1 /r
X64
64-bit
LSS r16, m16:16
o16 0F B2 /r
386+
16/32/64-bit
LSS r32, m16:32
o32 0F B2 /r
386+
16/32/64-bit
LSS r64, m16:64
o64 0F B2 /r
X64
64-bit
BTR r/m16, r16
o16 0F B3 /r
386+
16/32/64-bit
BTR r/m32, r32
o32 0F B3 /r
386+
16/32/64-bit
BTR r/m64, r64
o64 0F B3 /r
X64
64-bit
LFS r16, m16:16
o16 0F B4 /r
386+
16/32/64-bit
LFS r32, m16:32
o32 0F B4 /r
386+
16/32/64-bit
LFS r64, m16:64
o64 0F B4 /r
X64
64-bit
LGS r16, m16:16
o16 0F B5 /r
386+
16/32/64-bit
LGS r32, m16:32
o32 0F B5 /r
386+
16/32/64-bit
LGS r64, m16:64
o64 0F B5 /r
X64
64-bit
MOVZX r16, r/m8
o16 0F B6 /r
386+
16/32/64-bit
MOVZX r32, r/m8
o32 0F B6 /r
386+
16/32/64-bit
MOVZX r64, r/m8
o64 0F B6 /r
X64
64-bit
MOVZX r16, r/m16
o16 0F B7 /r
386+
16/32/64-bit
MOVZX r32, r/m16
o32 0F B7 /r
386+
16/32/64-bit
MOVZX r64, r/m16
o64 0F B7 /r
X64
64-bit
JMPE disp16
o16 0F B8 cw
IA-64
16/32-bit
JMPE disp32
o32 0F B8 cd
IA-64
16/32-bit
POPCNT r16, r/m16
o16 F3 0F B8 /r
POPCNT
16/32/64-bit
POPCNT r32, r/m32
o32 F3 0F B8 /r
POPCNT
16/32/64-bit
POPCNT r64, r/m64
F3 o64 0F B8 /r
POPCNT
64-bit
UD1 r16, r/m16
o16 0F B9 /r
286+
16/32/64-bit
UD1 r32, r/m32
o32 0F B9 /r
386+
16/32/64-bit
UD1 r64, r/m64
o64 0F B9 /r
X64
64-bit
BT r/m16, imm8
o16 0F BA /4 ib
386+
16/32/64-bit
BT r/m32, imm8
o32 0F BA /4 ib
386+
16/32/64-bit
BT r/m64, imm8
o64 0F BA /4 ib
X64
64-bit
BTS r/m16, imm8
o16 0F BA /5 ib
386+
16/32/64-bit
BTS r/m32, imm8
o32 0F BA /5 ib
386+
16/32/64-bit
BTS r/m64, imm8
o64 0F BA /5 ib
X64
64-bit
BTR r/m16, imm8
o16 0F BA /6 ib
386+
16/32/64-bit
BTR r/m32, imm8
o32 0F BA /6 ib
386+
16/32/64-bit
BTR r/m64, imm8
o64 0F BA /6 ib
X64
64-bit
BTC r/m16, imm8
o16 0F BA /7 ib
386+
16/32/64-bit
BTC r/m32, imm8
o32 0F BA /7 ib
386+
16/32/64-bit
BTC r/m64, imm8
o64 0F BA /7 ib
X64
64-bit
BTC r/m16, r16
o16 0F BB /r
386+
16/32/64-bit
BTC r/m32, r32
o32 0F BB /r
386+
16/32/64-bit
BTC r/m64, r64
o64 0F BB /r
X64
64-bit
BSF r16, r/m16
o16 0F BC /r
386+
16/32/64-bit
BSF r32, r/m32
o32 0F BC /r
386+
16/32/64-bit
BSF r64, r/m64
o64 0F BC /r
X64
64-bit
TZCNT r16, r/m16
o16 F3 0F BC /r
BMI1
16/32/64-bit
TZCNT r32, r/m32
o32 F3 0F BC /r
BMI1
16/32/64-bit
TZCNT r64, r/m64
F3 o64 0F BC /r
BMI1
64-bit
BSR r16, r/m16
o16 0F BD /r
386+
16/32/64-bit
BSR r32, r/m32
o32 0F BD /r
386+
16/32/64-bit
BSR r64, r/m64
o64 0F BD /r
X64
64-bit
LZCNT r16, r/m16
o16 F3 0F BD /r
LZCNT
16/32/64-bit
LZCNT r32, r/m32
o32 F3 0F BD /r
LZCNT
16/32/64-bit
LZCNT r64, r/m64
F3 o64 0F BD /r
LZCNT
64-bit
MOVSX r16, r/m8
o16 0F BE /r
386+
16/32/64-bit
MOVSX r32, r/m8
o32 0F BE /r
386+
16/32/64-bit
MOVSX r64, r/m8
o64 0F BE /r
X64
64-bit
MOVSX r16, r/m16
o16 0F BF /r
386+
16/32/64-bit
MOVSX r32, r/m16
o32 0F BF /r
386+
16/32/64-bit
MOVSX r64, r/m16
o64 0F BF /r
X64
64-bit
XADD r/m8, r8
0F C0 /r
486+
16/32/64-bit
XADD r/m16, r16
o16 0F C1 /r
486+
16/32/64-bit
XADD r/m32, r32
o32 0F C1 /r
486+
16/32/64-bit
XADD r/m64, r64
o64 0F C1 /r
X64
64-bit
CMPPS xmm1, xmm2/m128, imm8
NP 0F C2 /r ib
SSE
16/32/64-bit
VCMPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C2 /r ib
AVX
16/32/64-bit
VCMPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C2 /r ib
AVX
16/32/64-bit
VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
CMPPD xmm1, xmm2/m128, imm8
66 0F C2 /r ib
SSE2
16/32/64-bit
VCMPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
VCMPPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C2 /r ib
AVX
16/32/64-bit
VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C2 /r ib
AVX512VL and AVX512F
16/32/64-bit
VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
CMPSS xmm1, xmm2/m32, imm8
F3 0F C2 /r ib
SSE
16/32/64-bit
VCMPSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.F3.0F.WIG C2 /r ib
AVX
16/32/64-bit
VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.F3.0F.W0 C2 /r ib
AVX512F
16/32/64-bit
CMPSD xmm1, xmm2/m64, imm8
F2 0F C2 /r ib
SSE2
16/32/64-bit
VCMPSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.F2.0F.WIG C2 /r ib
AVX
16/32/64-bit
VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.F2.0F.W1 C2 /r ib
AVX512F
16/32/64-bit
MOVNTI m32, r32
NP 0F C3 /r
SSE2
16/32/64-bit
MOVNTI m64, r64
NP o64 0F C3 /r
SSE2
64-bit
PINSRW mm, r32/m16, imm8
NP 0F C4 /r ib
SSE
16/32/64-bit
PINSRW mm, r64/m16, imm8
NP o64 0F C4 /r ib
SSE
64-bit
PINSRW xmm, r32/m16, imm8
66 0F C4 /r ib
SSE2
16/32/64-bit
PINSRW xmm, r64/m16, imm8
66 o64 0F C4 /r ib
SSE2
64-bit
VPINSRW xmm1, xmm2, r32/m16, imm8
VEX.128.66.0F.W0 C4 /r ib
AVX
16/32/64-bit
VPINSRW xmm1, xmm2, r64/m16, imm8
VEX.128.66.0F.W1 C4 /r ib
AVX
64-bit
VPINSRW xmm1, xmm2, r32/m16, imm8
EVEX.128.66.0F.W0 C4 /r ib
AVX512BW
16/32/64-bit
VPINSRW xmm1, xmm2, r64/m16, imm8
EVEX.128.66.0F.W1 C4 /r ib
AVX512BW
64-bit
PEXTRW r32, mm, imm8
NP 0F C5 /r ib
SSE
16/32/64-bit
PEXTRW r64, mm, imm8
NP o64 0F C5 /r ib
SSE
64-bit
PEXTRW r32, xmm, imm8
66 0F C5 /r ib
SSE2
16/32/64-bit
PEXTRW r64, xmm, imm8
66 o64 0F C5 /r ib
SSE2
64-bit
VPEXTRW r32, xmm1, imm8
VEX.128.66.0F.W0 C5 /r ib
AVX
16/32/64-bit
VPEXTRW r64, xmm1, imm8
VEX.128.66.0F.W1 C5 /r ib
AVX
64-bit
VPEXTRW r32, xmm1, imm8
EVEX.128.66.0F.W0 C5 /r ib
AVX512BW
16/32/64-bit
VPEXTRW r64, xmm1, imm8
EVEX.128.66.0F.W1 C5 /r ib
AVX512BW
64-bit
SHUFPS xmm1, xmm2/m128, imm8
NP 0F C6 /r ib
SSE
16/32/64-bit
VSHUFPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.0F.W0 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.0F.W0 C6 /r ib
AVX512F
16/32/64-bit
SHUFPD xmm1, xmm2/m128, imm8
66 0F C6 /r ib
SSE2
16/32/64-bit
VSHUFPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F.WIG C6 /r ib
AVX
16/32/64-bit
VSHUFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F.W1 C6 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F.W1 C6 /r ib
AVX512F
16/32/64-bit
CMPXCHG8B m64
0F C7 /1
CX8
16/32/64-bit
CMPXCHG16B m128
o64 0F C7 /1
CMPXCHG16B
64-bit
XRSTORS mem
NP 0F C7 /3
XSAVES
16/32/64-bit
XRSTORS64 mem
NP o64 0F C7 /3
XSAVES
64-bit
XSAVEC mem
NP 0F C7 /4
XSAVEC
16/32/64-bit
XSAVEC64 mem
NP o64 0F C7 /4
XSAVEC
64-bit
XSAVES mem
NP 0F C7 /5
XSAVES
16/32/64-bit
XSAVES64 mem
NP o64 0F C7 /5
XSAVES
64-bit
VMPTRLD m64
NP 0F C7 /6
VMX
16/32/64-bit
VMCLEAR m64
66 0F C7 /6
VMX
16/32/64-bit
VMXON m64
F3 0F C7 /6
VMX
16/32/64-bit
RDRAND r16
o16 0F C7 /6
RDRAND
16/32/64-bit
RDRAND r32
o32 0F C7 /6
RDRAND
16/32/64-bit
RDRAND r64
o64 0F C7 /6
RDRAND
64-bit
VMPTRST m64
NP 0F C7 /7
VMX
16/32/64-bit
RDSEED r16
o16 0F C7 /7
RDSEED
16/32/64-bit
RDSEED r32
o32 0F C7 /7
RDSEED
16/32/64-bit
RDSEED r64
o64 0F C7 /7
RDSEED
64-bit
RDPID r32
F3 0F C7 /7
RDPID
16/32-bit
RDPID r64
F3 0F C7 /7
RDPID
64-bit
BSWAP r16
o16 0F C8+rw
486+
16/32/64-bit
BSWAP r32
o32 0F C8+rd
486+
16/32/64-bit
BSWAP r64
o64 0F C8+ro
X64
64-bit
ADDSUBPD xmm1, xmm2/m128
66 0F D0 /r
SSE3
16/32/64-bit
VADDSUBPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D0 /r
AVX
16/32/64-bit
VADDSUBPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D0 /r
AVX
16/32/64-bit
ADDSUBPS xmm1, xmm2/m128
F2 0F D0 /r
SSE3
16/32/64-bit
VADDSUBPS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F.WIG D0 /r
AVX
16/32/64-bit
VADDSUBPS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F.WIG D0 /r
AVX
16/32/64-bit
PSRLW mm, mm/m64
NP 0F D1 /r
MMX
16/32/64-bit
PSRLW xmm1, xmm2/m128
66 0F D1 /r
SSE2
16/32/64-bit
VPSRLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D1 /r
AVX
16/32/64-bit
VPSRLW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D1 /r
AVX2
16/32/64-bit
VPSRLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D1 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG D1 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRLW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG D1 /r
AVX512BW
16/32/64-bit
PSRLD mm, mm/m64
NP 0F D2 /r
MMX
16/32/64-bit
PSRLD xmm1, xmm2/m128
66 0F D2 /r
SSE2
16/32/64-bit
VPSRLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D2 /r
AVX
16/32/64-bit
VPSRLD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D2 /r
AVX2
16/32/64-bit
VPSRLD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 D2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 D2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 D2 /r
AVX512F
16/32/64-bit
PSRLQ mm, mm/m64
NP 0F D3 /r
MMX
16/32/64-bit
PSRLQ xmm1, xmm2/m128
66 0F D3 /r
SSE2
16/32/64-bit
VPSRLQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D3 /r
AVX
16/32/64-bit
VPSRLQ ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG D3 /r
AVX2
16/32/64-bit
VPSRLQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 D3 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 D3 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 D3 /r
AVX512F
16/32/64-bit
PADDQ mm, mm/m64
NP 0F D4 /r
MMX
16/32/64-bit
PADDQ xmm1, xmm2/m128
66 0F D4 /r
SSE2
16/32/64-bit
VPADDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D4 /r
AVX
16/32/64-bit
VPADDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D4 /r
AVX2
16/32/64-bit
VPADDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 D4 /r
AVX512VL and AVX512F
16/32/64-bit
VPADDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 D4 /r
AVX512VL and AVX512F
16/32/64-bit
VPADDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 D4 /r
AVX512F
16/32/64-bit
PMULLW mm, mm/m64
NP 0F D5 /r
MMX
16/32/64-bit
PMULLW xmm1, xmm2/m128
66 0F D5 /r
SSE2
16/32/64-bit
VPMULLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D5 /r
AVX
16/32/64-bit
VPMULLW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D5 /r
AVX2
16/32/64-bit
VPMULLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D5 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULLW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D5 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULLW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D5 /r
AVX512BW
16/32/64-bit
MOVQ xmm2/m64, xmm1
66 0F D6 /r
SSE2
16/32/64-bit
VMOVQ xmm1/m64, xmm2
VEX.128.66.0F.WIG D6 /r
AVX
16/32/64-bit
VMOVQ xmm1/m64, xmm2
EVEX.128.66.0F.W1 D6 /r
AVX512F
16/32/64-bit
MOVQ2DQ xmm, mm
F3 0F D6 /r
SSE2
16/32/64-bit
MOVDQ2Q mm, xmm
F2 0F D6 /r
SSE2
16/32/64-bit
PMOVMSKB r32, mm
NP 0F D7 /r
SSE
16/32/64-bit
PMOVMSKB r64, mm
NP o64 0F D7 /r
SSE
64-bit
PMOVMSKB r32, xmm
66 0F D7 /r
SSE2
16/32/64-bit
PMOVMSKB r64, xmm
66 o64 0F D7 /r
SSE2
64-bit
VPMOVMSKB r32, xmm1
VEX.128.66.0F.W0 D7 /r
AVX
16/32/64-bit
VPMOVMSKB r64, xmm1
VEX.128.66.0F.W1 D7 /r
AVX
64-bit
VPMOVMSKB r32, ymm1
VEX.256.66.0F.W0 D7 /r
AVX2
16/32/64-bit
VPMOVMSKB r64, ymm1
VEX.256.66.0F.W1 D7 /r
AVX2
64-bit
PSUBUSB mm, mm/m64
NP 0F D8 /r
MMX
16/32/64-bit
PSUBUSB xmm1, xmm2/m128
66 0F D8 /r
SSE2
16/32/64-bit
VPSUBUSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D8 /r
AVX
16/32/64-bit
VPSUBUSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D8 /r
AVX2
16/32/64-bit
VPSUBUSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D8 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBUSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D8 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBUSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D8 /r
AVX512BW
16/32/64-bit
PSUBUSW mm, mm/m64
NP 0F D9 /r
MMX
16/32/64-bit
PSUBUSW xmm1, xmm2/m128
66 0F D9 /r
SSE2
16/32/64-bit
VPSUBUSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG D9 /r
AVX
16/32/64-bit
VPSUBUSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG D9 /r
AVX2
16/32/64-bit
VPSUBUSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG D9 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBUSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG D9 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBUSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG D9 /r
AVX512BW
16/32/64-bit
PMINUB mm1, mm2/m64
NP 0F DA /r
SSE
16/32/64-bit
PMINUB xmm1, xmm2/m128
66 0F DA /r
SSE2
16/32/64-bit
VPMINUB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DA /r
AVX
16/32/64-bit
VPMINUB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DA /r
AVX2
16/32/64-bit
VPMINUB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DA /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINUB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DA /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINUB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DA /r
AVX512BW
16/32/64-bit
PAND mm, mm/m64
NP 0F DB /r
MMX
16/32/64-bit
PAND xmm1, xmm2/m128
66 0F DB /r
SSE2
16/32/64-bit
VPAND xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DB /r
AVX
16/32/64-bit
VPAND ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DB /r
AVX2
16/32/64-bit
VPANDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 DB /r
AVX512VL and AVX512F
16/32/64-bit
VPANDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 DB /r
AVX512VL and AVX512F
16/32/64-bit
VPANDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 DB /r
AVX512F
16/32/64-bit
VPANDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 DB /r
AVX512VL and AVX512F
16/32/64-bit
VPANDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 DB /r
AVX512VL and AVX512F
16/32/64-bit
VPANDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 DB /r
AVX512F
16/32/64-bit
PADDUSB mm, mm/m64
NP 0F DC /r
MMX
16/32/64-bit
PADDUSB xmm1, xmm2/m128
66 0F DC /r
SSE2
16/32/64-bit
VPADDUSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DC /r
AVX
16/32/64-bit
VPADDUSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DC /r
AVX2
16/32/64-bit
VPADDUSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DC /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDUSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DC /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDUSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DC /r
AVX512BW
16/32/64-bit
PADDUSW mm, mm/m64
NP 0F DD /r
MMX
16/32/64-bit
PADDUSW xmm1, xmm2/m128
66 0F DD /r
SSE2
16/32/64-bit
VPADDUSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DD /r
AVX
16/32/64-bit
VPADDUSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DD /r
AVX2
16/32/64-bit
VPADDUSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DD /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDUSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DD /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDUSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DD /r
AVX512BW
16/32/64-bit
PMAXUB mm1, mm2/m64
NP 0F DE /r
SSE
16/32/64-bit
PMAXUB xmm1, xmm2/m128
66 0F DE /r
SSE2
16/32/64-bit
VPMAXUB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DE /r
AVX
16/32/64-bit
VPMAXUB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DE /r
AVX2
16/32/64-bit
VPMAXUB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG DE /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXUB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG DE /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXUB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG DE /r
AVX512BW
16/32/64-bit
PANDN mm, mm/m64
NP 0F DF /r
MMX
16/32/64-bit
PANDN xmm1, xmm2/m128
66 0F DF /r
SSE2
16/32/64-bit
VPANDN xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG DF /r
AVX
16/32/64-bit
VPANDN ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG DF /r
AVX2
16/32/64-bit
VPANDND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 DF /r
AVX512VL and AVX512F
16/32/64-bit
VPANDND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 DF /r
AVX512VL and AVX512F
16/32/64-bit
VPANDND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 DF /r
AVX512F
16/32/64-bit
VPANDNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 DF /r
AVX512VL and AVX512F
16/32/64-bit
VPANDNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 DF /r
AVX512VL and AVX512F
16/32/64-bit
VPANDNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 DF /r
AVX512F
16/32/64-bit
PAVGB mm1, mm2/m64
NP 0F E0 /r
SSE
16/32/64-bit
PAVGB xmm1, xmm2/m128
66 0F E0 /r
SSE2
16/32/64-bit
VPAVGB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E0 /r
AVX
16/32/64-bit
VPAVGB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E0 /r
AVX2
16/32/64-bit
VPAVGB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E0 /r
AVX512VL and AVX512BW
16/32/64-bit
VPAVGB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E0 /r
AVX512VL and AVX512BW
16/32/64-bit
VPAVGB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E0 /r
AVX512BW
16/32/64-bit
PSRAW mm, mm/m64
NP 0F E1 /r
MMX
16/32/64-bit
PSRAW xmm1, xmm2/m128
66 0F E1 /r
SSE2
16/32/64-bit
VPSRAW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E1 /r
AVX
16/32/64-bit
VPSRAW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG E1 /r
AVX2
16/32/64-bit
VPSRAW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E1 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG E1 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRAW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG E1 /r
AVX512BW
16/32/64-bit
PSRAD mm, mm/m64
NP 0F E2 /r
MMX
16/32/64-bit
PSRAD xmm1, xmm2/m128
66 0F E2 /r
SSE2
16/32/64-bit
VPSRAD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E2 /r
AVX
16/32/64-bit
VPSRAD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG E2 /r
AVX2
16/32/64-bit
VPSRAD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 E2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 E2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 E2 /r
AVX512F
16/32/64-bit
VPSRAQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 E2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 E2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 E2 /r
AVX512F
16/32/64-bit
PAVGW mm1, mm2/m64
NP 0F E3 /r
SSE
16/32/64-bit
PAVGW xmm1, xmm2/m128
66 0F E3 /r
SSE2
16/32/64-bit
VPAVGW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E3 /r
AVX
16/32/64-bit
VPAVGW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E3 /r
AVX2
16/32/64-bit
VPAVGW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E3 /r
AVX512VL and AVX512BW
16/32/64-bit
VPAVGW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E3 /r
AVX512VL and AVX512BW
16/32/64-bit
VPAVGW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E3 /r
AVX512BW
16/32/64-bit
PMULHUW mm1, mm2/m64
NP 0F E4 /r
SSE
16/32/64-bit
PMULHUW xmm1, xmm2/m128
66 0F E4 /r
SSE2
16/32/64-bit
VPMULHUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E4 /r
AVX
16/32/64-bit
VPMULHUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E4 /r
AVX2
16/32/64-bit
VPMULHUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E4 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULHUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E4 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULHUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E4 /r
AVX512BW
16/32/64-bit
PMULHW mm, mm/m64
NP 0F E5 /r
MMX
16/32/64-bit
PMULHW xmm1, xmm2/m128
66 0F E5 /r
SSE2
16/32/64-bit
VPMULHW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E5 /r
AVX
16/32/64-bit
VPMULHW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E5 /r
AVX2
16/32/64-bit
VPMULHW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E5 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULHW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E5 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULHW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E5 /r
AVX512BW
16/32/64-bit
CVTTPD2DQ xmm1, xmm2/m128
66 0F E6 /r
SSE2
16/32/64-bit
VCVTTPD2DQ xmm1, xmm2/m128
VEX.128.66.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTTPD2DQ xmm1, ymm2/m256
VEX.256.66.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F.W1 E6 /r
AVX512F
16/32/64-bit
CVTDQ2PD xmm1, xmm2/m64
F3 0F E6 /r
SSE2
16/32/64-bit
VCVTDQ2PD xmm1, xmm2/m64
VEX.128.F3.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTDQ2PD ymm1, xmm2/m128
VEX.256.F3.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst
EVEX.128.F3.0F.W0 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.256.F3.0F.W0 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}
EVEX.512.F3.0F.W0 E6 /r
AVX512F
16/32/64-bit
VCVTQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F3.0F.W1 E6 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F3.0F.W1 E6 /r
AVX512VL and AVX512DQ
16/32/64-bit
VCVTQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F3.0F.W1 E6 /r
AVX512DQ
16/32/64-bit
CVTPD2DQ xmm1, xmm2/m128
F2 0F E6 /r
SSE2
16/32/64-bit
VCVTPD2DQ xmm1, xmm2/m128
VEX.128.F2.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTPD2DQ xmm1, ymm2/m256
VEX.256.F2.0F.WIG E6 /r
AVX
16/32/64-bit
VCVTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.0F.W1 E6 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.0F.W1 E6 /r
AVX512F
16/32/64-bit
MOVNTQ m64, mm
NP 0F E7 /r
SSE
16/32/64-bit
MOVNTDQ m128, xmm1
66 0F E7 /r
SSE2
16/32/64-bit
VMOVNTDQ m128, xmm1
VEX.128.66.0F.WIG E7 /r
AVX
16/32/64-bit
VMOVNTDQ m256, ymm1
VEX.256.66.0F.WIG E7 /r
AVX
16/32/64-bit
VMOVNTDQ m128, xmm1
EVEX.128.66.0F.W0 E7 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTDQ m256, ymm1
EVEX.256.66.0F.W0 E7 /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTDQ m512, zmm1
EVEX.512.66.0F.W0 E7 /r
AVX512F
16/32/64-bit
PSUBSB mm, mm/m64
NP 0F E8 /r
MMX
16/32/64-bit
PSUBSB xmm1, xmm2/m128
66 0F E8 /r
SSE2
16/32/64-bit
VPSUBSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E8 /r
AVX
16/32/64-bit
VPSUBSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E8 /r
AVX2
16/32/64-bit
VPSUBSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E8 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E8 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E8 /r
AVX512BW
16/32/64-bit
PSUBSW mm, mm/m64
NP 0F E9 /r
MMX
16/32/64-bit
PSUBSW xmm1, xmm2/m128
66 0F E9 /r
SSE2
16/32/64-bit
VPSUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG E9 /r
AVX
16/32/64-bit
VPSUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG E9 /r
AVX2
16/32/64-bit
VPSUBSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG E9 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG E9 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG E9 /r
AVX512BW
16/32/64-bit
PMINSW mm1, mm2/m64
NP 0F EA /r
SSE
16/32/64-bit
PMINSW xmm1, xmm2/m128
66 0F EA /r
SSE2
16/32/64-bit
VPMINSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EA /r
AVX
16/32/64-bit
VPMINSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EA /r
AVX2
16/32/64-bit
VPMINSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EA /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EA /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EA /r
AVX512BW
16/32/64-bit
POR mm, mm/m64
NP 0F EB /r
MMX
16/32/64-bit
POR xmm1, xmm2/m128
66 0F EB /r
SSE2
16/32/64-bit
VPOR xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EB /r
AVX
16/32/64-bit
VPOR ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EB /r
AVX2
16/32/64-bit
VPORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 EB /r
AVX512VL and AVX512F
16/32/64-bit
VPORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 EB /r
AVX512VL and AVX512F
16/32/64-bit
VPORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 EB /r
AVX512F
16/32/64-bit
VPORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 EB /r
AVX512VL and AVX512F
16/32/64-bit
VPORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 EB /r
AVX512VL and AVX512F
16/32/64-bit
VPORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 EB /r
AVX512F
16/32/64-bit
PADDSB mm, mm/m64
NP 0F EC /r
MMX
16/32/64-bit
PADDSB xmm1, xmm2/m128
66 0F EC /r
SSE2
16/32/64-bit
VPADDSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EC /r
AVX
16/32/64-bit
VPADDSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EC /r
AVX2
16/32/64-bit
VPADDSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EC /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EC /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EC /r
AVX512BW
16/32/64-bit
PADDSW mm, mm/m64
NP 0F ED /r
MMX
16/32/64-bit
PADDSW xmm1, xmm2/m128
66 0F ED /r
SSE2
16/32/64-bit
VPADDSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG ED /r
AVX
16/32/64-bit
VPADDSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG ED /r
AVX2
16/32/64-bit
VPADDSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG ED /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG ED /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG ED /r
AVX512BW
16/32/64-bit
PMAXSW mm1, mm2/m64
NP 0F EE /r
SSE
16/32/64-bit
PMAXSW xmm1, xmm2/m128
66 0F EE /r
SSE2
16/32/64-bit
VPMAXSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EE /r
AVX
16/32/64-bit
VPMAXSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EE /r
AVX2
16/32/64-bit
VPMAXSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG EE /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG EE /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG EE /r
AVX512BW
16/32/64-bit
PXOR mm, mm/m64
NP 0F EF /r
MMX
16/32/64-bit
PXOR xmm1, xmm2/m128
66 0F EF /r
SSE2
16/32/64-bit
VPXOR xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG EF /r
AVX
16/32/64-bit
VPXOR ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG EF /r
AVX2
16/32/64-bit
VPXORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 EF /r
AVX512VL and AVX512F
16/32/64-bit
VPXORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 EF /r
AVX512VL and AVX512F
16/32/64-bit
VPXORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 EF /r
AVX512F
16/32/64-bit
VPXORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 EF /r
AVX512VL and AVX512F
16/32/64-bit
VPXORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 EF /r
AVX512VL and AVX512F
16/32/64-bit
VPXORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 EF /r
AVX512F
16/32/64-bit
LDDQU xmm1, m128
F2 0F F0 /r
SSE3
16/32/64-bit
VLDDQU xmm1, m128
VEX.128.F2.0F.WIG F0 /r
AVX
16/32/64-bit
VLDDQU ymm1, m256
VEX.256.F2.0F.WIG F0 /r
AVX
16/32/64-bit
PSLLW mm, mm/m64
NP 0F F1 /r
MMX
16/32/64-bit
PSLLW xmm1, xmm2/m128
66 0F F1 /r
SSE2
16/32/64-bit
VPSLLW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F1 /r
AVX
16/32/64-bit
VPSLLW ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F1 /r
AVX2
16/32/64-bit
VPSLLW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F1 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.WIG F1 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSLLW zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.WIG F1 /r
AVX512BW
16/32/64-bit
PSLLD mm, mm/m64
NP 0F F2 /r
MMX
16/32/64-bit
PSLLD xmm1, xmm2/m128
66 0F F2 /r
SSE2
16/32/64-bit
VPSLLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F2 /r
AVX
16/32/64-bit
VPSLLD ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F2 /r
AVX2
16/32/64-bit
VPSLLD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W0 F2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLD ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W0 F2 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLD zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W0 F2 /r
AVX512F
16/32/64-bit
PSLLQ mm, mm/m64
NP 0F F3 /r
MMX
16/32/64-bit
PSLLQ xmm1, xmm2/m128
66 0F F3 /r
SSE2
16/32/64-bit
VPSLLQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F3 /r
AVX
16/32/64-bit
VPSLLQ ymm1, ymm2, xmm3/m128
VEX.256.66.0F.WIG F3 /r
AVX2
16/32/64-bit
VPSLLQ xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.W1 F3 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ ymm1 {k1}{z}, ymm2, xmm3/m128
EVEX.256.66.0F.W1 F3 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLQ zmm1 {k1}{z}, zmm2, xmm3/m128
EVEX.512.66.0F.W1 F3 /r
AVX512F
16/32/64-bit
PMULUDQ mm1, mm2/m64
NP 0F F4 /r
SSE2
16/32/64-bit
PMULUDQ xmm1, xmm2/m128
66 0F F4 /r
SSE2
16/32/64-bit
VPMULUDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F4 /r
AVX
16/32/64-bit
VPMULUDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F4 /r
AVX2
16/32/64-bit
VPMULUDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 F4 /r
AVX512VL and AVX512F
16/32/64-bit
VPMULUDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 F4 /r
AVX512VL and AVX512F
16/32/64-bit
VPMULUDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 F4 /r
AVX512F
16/32/64-bit
PMADDWD mm, mm/m64
NP 0F F5 /r
MMX
16/32/64-bit
PMADDWD xmm1, xmm2/m128
66 0F F5 /r
SSE2
16/32/64-bit
VPMADDWD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F5 /r
AVX
16/32/64-bit
VPMADDWD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F5 /r
AVX2
16/32/64-bit
VPMADDWD xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F5 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMADDWD ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F5 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMADDWD zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F5 /r
AVX512BW
16/32/64-bit
PSADBW mm1, mm2/m64
NP 0F F6 /r
SSE
16/32/64-bit
PSADBW xmm1, xmm2/m128
66 0F F6 /r
SSE2
16/32/64-bit
VPSADBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F6 /r
AVX
16/32/64-bit
VPSADBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F6 /r
AVX2
16/32/64-bit
VPSADBW xmm1, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F6 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSADBW ymm1, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F6 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSADBW zmm1, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F6 /r
AVX512BW
16/32/64-bit
MASKMOVQ mm1, mm2
NP 0F F7 /r
SSE
16/32/64-bit
MASKMOVDQU xmm1, xmm2
66 0F F7 /r
SSE2
16/32/64-bit
VMASKMOVDQU xmm1, xmm2
VEX.128.66.0F.WIG F7 /r
AVX
16/32/64-bit
PSUBB mm, mm/m64
NP 0F F8 /r
MMX
16/32/64-bit
PSUBB xmm1, xmm2/m128
66 0F F8 /r
SSE2
16/32/64-bit
VPSUBB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F8 /r
AVX
16/32/64-bit
VPSUBB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F8 /r
AVX2
16/32/64-bit
VPSUBB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F8 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F8 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F8 /r
AVX512BW
16/32/64-bit
PSUBW mm, mm/m64
NP 0F F9 /r
MMX
16/32/64-bit
PSUBW xmm1, xmm2/m128
66 0F F9 /r
SSE2
16/32/64-bit
VPSUBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG F9 /r
AVX
16/32/64-bit
VPSUBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG F9 /r
AVX2
16/32/64-bit
VPSUBW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG F9 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG F9 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSUBW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG F9 /r
AVX512BW
16/32/64-bit
PSUBD mm, mm/m64
NP 0F FA /r
MMX
16/32/64-bit
PSUBD xmm1, xmm2/m128
66 0F FA /r
SSE2
16/32/64-bit
VPSUBD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FA /r
AVX
16/32/64-bit
VPSUBD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FA /r
AVX2
16/32/64-bit
VPSUBD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 FA /r
AVX512VL and AVX512F
16/32/64-bit
VPSUBD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 FA /r
AVX512VL and AVX512F
16/32/64-bit
VPSUBD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 FA /r
AVX512F
16/32/64-bit
PSUBQ mm1, mm2/m64
NP 0F FB /r
SSE2
16/32/64-bit
PSUBQ xmm1, xmm2/m128
66 0F FB /r
SSE2
16/32/64-bit
VPSUBQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FB /r
AVX
16/32/64-bit
VPSUBQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FB /r
AVX2
16/32/64-bit
VPSUBQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F.W1 FB /r
AVX512VL and AVX512F
16/32/64-bit
VPSUBQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F.W1 FB /r
AVX512VL and AVX512F
16/32/64-bit
VPSUBQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F.W1 FB /r
AVX512F
16/32/64-bit
PADDB mm, mm/m64
NP 0F FC /r
MMX
16/32/64-bit
PADDB xmm1, xmm2/m128
66 0F FC /r
SSE2
16/32/64-bit
VPADDB xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FC /r
AVX
16/32/64-bit
VPADDB ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FC /r
AVX2
16/32/64-bit
VPADDB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG FC /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG FC /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG FC /r
AVX512BW
16/32/64-bit
PADDW mm, mm/m64
NP 0F FD /r
MMX
16/32/64-bit
PADDW xmm1, xmm2/m128
66 0F FD /r
SSE2
16/32/64-bit
VPADDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FD /r
AVX
16/32/64-bit
VPADDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FD /r
AVX2
16/32/64-bit
VPADDW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F.WIG FD /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F.WIG FD /r
AVX512VL and AVX512BW
16/32/64-bit
VPADDW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F.WIG FD /r
AVX512BW
16/32/64-bit
PADDD mm, mm/m64
NP 0F FE /r
MMX
16/32/64-bit
PADDD xmm1, xmm2/m128
66 0F FE /r
SSE2
16/32/64-bit
VPADDD xmm1, xmm2, xmm3/m128
VEX.128.66.0F.WIG FE /r
AVX
16/32/64-bit
VPADDD ymm1, ymm2, ymm3/m256
VEX.256.66.0F.WIG FE /r
AVX2
16/32/64-bit
VPADDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F.W0 FE /r
AVX512VL and AVX512F
16/32/64-bit
VPADDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F.W0 FE /r
AVX512VL and AVX512F
16/32/64-bit
VPADDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F.W0 FE /r
AVX512F
16/32/64-bit
UD0 r16, r/m16
o16 0F FF /r
286+
16/32/64-bit
UD0 r32, r/m32
o32 0F FF /r
386+
16/32/64-bit
UD0 r64, r/m64
o64 0F FF /r
X64
64-bit
PSHUFB mm1, mm2/m64
NP 0F 38 00 /r
SSSE3
16/32/64-bit
PSHUFB xmm1, xmm2/m128
66 0F 38 00 /r
SSSE3
16/32/64-bit
VPSHUFB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 00 /r
AVX
16/32/64-bit
VPSHUFB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 00 /r
AVX2
16/32/64-bit
VPSHUFB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 00 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSHUFB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 00 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSHUFB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 00 /r
AVX512BW
16/32/64-bit
PHADDW mm1, mm2/m64
NP 0F 38 01 /r
SSSE3
16/32/64-bit
PHADDW xmm1, xmm2/m128
66 0F 38 01 /r
SSSE3
16/32/64-bit
VPHADDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 01 /r
AVX
16/32/64-bit
VPHADDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 01 /r
AVX2
16/32/64-bit
PHADDD mm1, mm2/m64
NP 0F 38 02 /r
SSSE3
16/32/64-bit
PHADDD xmm1, xmm2/m128
66 0F 38 02 /r
SSSE3
16/32/64-bit
VPHADDD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 02 /r
AVX
16/32/64-bit
VPHADDD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 02 /r
AVX2
16/32/64-bit
PHADDSW mm1, mm2/m64
NP 0F 38 03 /r
SSSE3
16/32/64-bit
PHADDSW xmm1, xmm2/m128
66 0F 38 03 /r
SSSE3
16/32/64-bit
VPHADDSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 03 /r
AVX
16/32/64-bit
VPHADDSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 03 /r
AVX2
16/32/64-bit
PMADDUBSW mm1, mm2/m64
NP 0F 38 04 /r
SSSE3
16/32/64-bit
PMADDUBSW xmm1, xmm2/m128
66 0F 38 04 /r
SSSE3
16/32/64-bit
VPMADDUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 04 /r
AVX
16/32/64-bit
VPMADDUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 04 /r
AVX2
16/32/64-bit
VPMADDUBSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 04 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMADDUBSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 04 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMADDUBSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 04 /r
AVX512BW
16/32/64-bit
PHSUBW mm1, mm2/m64
NP 0F 38 05 /r
SSSE3
16/32/64-bit
PHSUBW xmm1, xmm2/m128
66 0F 38 05 /r
SSSE3
16/32/64-bit
VPHSUBW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 05 /r
AVX
16/32/64-bit
VPHSUBW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 05 /r
AVX2
16/32/64-bit
PHSUBD mm1, mm2/m64
NP 0F 38 06 /r
SSSE3
16/32/64-bit
PHSUBD xmm1, xmm2/m128
66 0F 38 06 /r
SSSE3
16/32/64-bit
VPHSUBD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 06 /r
AVX
16/32/64-bit
VPHSUBD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 06 /r
AVX2
16/32/64-bit
PHSUBSW mm1, mm2/m64
NP 0F 38 07 /r
SSSE3
16/32/64-bit
PHSUBSW xmm1, xmm2/m128
66 0F 38 07 /r
SSSE3
16/32/64-bit
VPHSUBSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 07 /r
AVX
16/32/64-bit
VPHSUBSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 07 /r
AVX2
16/32/64-bit
PSIGNB mm1, mm2/m64
NP 0F 38 08 /r
SSSE3
16/32/64-bit
PSIGNB xmm1, xmm2/m128
66 0F 38 08 /r
SSSE3
16/32/64-bit
VPSIGNB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 08 /r
AVX
16/32/64-bit
VPSIGNB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 08 /r
AVX2
16/32/64-bit
PSIGNW mm1, mm2/m64
NP 0F 38 09 /r
SSSE3
16/32/64-bit
PSIGNW xmm1, xmm2/m128
66 0F 38 09 /r
SSSE3
16/32/64-bit
VPSIGNW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 09 /r
AVX
16/32/64-bit
VPSIGNW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 09 /r
AVX2
16/32/64-bit
PSIGND mm1, mm2/m64
NP 0F 38 0A /r
SSSE3
16/32/64-bit
PSIGND xmm1, xmm2/m128
66 0F 38 0A /r
SSSE3
16/32/64-bit
VPSIGND xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 0A /r
AVX
16/32/64-bit
VPSIGND ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 0A /r
AVX2
16/32/64-bit
PMULHRSW mm1, mm2/m64
NP 0F 38 0B /r
SSSE3
16/32/64-bit
PMULHRSW xmm1, xmm2/m128
66 0F 38 0B /r
SSSE3
16/32/64-bit
VPMULHRSW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 0B /r
AVX
16/32/64-bit
VPMULHRSW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 0B /r
AVX2
16/32/64-bit
VPMULHRSW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 0B /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULHRSW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 0B /r
AVX512VL and AVX512BW
16/32/64-bit
VPMULHRSW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 0B /r
AVX512BW
16/32/64-bit
VPERMILPS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 0C /r
AVX
16/32/64-bit
VPERMILPS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 0C /r
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 0C /r
AVX512VL and AVX512F
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 0C /r
AVX512VL and AVX512F
16/32/64-bit
VPERMILPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 0C /r
AVX512F
16/32/64-bit
VPERMILPD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 0D /r
AVX
16/32/64-bit
VPERMILPD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 0D /r
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 0D /r
AVX512VL and AVX512F
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 0D /r
AVX512VL and AVX512F
16/32/64-bit
VPERMILPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 0D /r
AVX512F
16/32/64-bit
VTESTPS xmm1, xmm2/m128
VEX.128.66.0F38.W0 0E /r
AVX
16/32/64-bit
VTESTPS ymm1, ymm2/m256
VEX.256.66.0F38.W0 0E /r
AVX
16/32/64-bit
VTESTPD xmm1, xmm2/m128
VEX.128.66.0F38.W0 0F /r
AVX
16/32/64-bit
VTESTPD ymm1, ymm2/m256
VEX.256.66.0F38.W0 0F /r
AVX
16/32/64-bit
PBLENDVB xmm1, xmm2/m128, <XMM0>
66 0F 38 10 /r
SSE4.1
16/32/64-bit
VPSRLVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 10 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRLVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 10 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRLVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 10 /r
AVX512BW
16/32/64-bit
VPMOVUSWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 10 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVUSWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 10 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVUSWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 10 /r
AVX512BW
16/32/64-bit
VPSRAVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 11 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRAVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 11 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSRAVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 11 /r
AVX512BW
16/32/64-bit
VPMOVUSDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 11 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 11 /r
AVX512F
16/32/64-bit
VPSLLVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 12 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSLLVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 12 /r
AVX512VL and AVX512BW
16/32/64-bit
VPSLLVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 12 /r
AVX512BW
16/32/64-bit
VPMOVUSQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 12 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 12 /r
AVX512F
16/32/64-bit
VCVTPH2PS xmm1, xmm2/m64
VEX.128.66.0F38.W0 13 /r
F16C
16/32/64-bit
VCVTPH2PS ymm1, xmm2/m128
VEX.256.66.0F38.W0 13 /r
F16C
16/32/64-bit
VCVTPH2PS xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPH2PS ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
VCVTPH2PS zmm1 {k1}{z}, ymm2/m256{sae}
EVEX.512.66.0F38.W0 13 /r
AVX512F
16/32/64-bit
VPMOVUSDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 13 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 13 /r
AVX512F
16/32/64-bit
BLENDVPS xmm1, xmm2/m128, <XMM0>
66 0F 38 14 /r
SSE4.1
16/32/64-bit
VPRORVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
VPRORVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
VPRORVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 14 /r
AVX512F
16/32/64-bit
VPRORVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
VPRORVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 14 /r
AVX512VL and AVX512F
16/32/64-bit
VPRORVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 14 /r
AVX512F
16/32/64-bit
VPMOVUSQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 14 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 14 /r
AVX512F
16/32/64-bit
BLENDVPD xmm1, xmm2/m128, <XMM0>
66 0F 38 15 /r
SSE4.1
16/32/64-bit
VPROLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
VPROLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
VPROLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 15 /r
AVX512F
16/32/64-bit
VPROLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
VPROLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 15 /r
AVX512VL and AVX512F
16/32/64-bit
VPROLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 15 /r
AVX512F
16/32/64-bit
VPMOVUSQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 15 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVUSQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 15 /r
AVX512F
16/32/64-bit
VPERMPS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 16 /r
AVX2
16/32/64-bit
VPERMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 16 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 16 /r
AVX512F
16/32/64-bit
VPERMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 16 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 16 /r
AVX512F
16/32/64-bit
PTEST xmm1, xmm2/m128
66 0F 38 17 /r
SSE4.1
16/32/64-bit
VPTEST xmm1, xmm2/m128
VEX.128.66.0F38.WIG 17 /r
AVX
16/32/64-bit
VPTEST ymm1, ymm2/m256
VEX.256.66.0F38.WIG 17 /r
AVX
16/32/64-bit
VBROADCASTSS xmm1, m32
VEX.128.66.0F38.W0 18 /r
AVX
16/32/64-bit
VBROADCASTSS ymm1, m32
VEX.256.66.0F38.W0 18 /r
AVX
16/32/64-bit
VBROADCASTSS xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.W0 18 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSS ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.W0 18 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSS zmm1 {k1}{z}, xmm2/m32
EVEX.512.66.0F38.W0 18 /r
AVX512F
16/32/64-bit
VBROADCASTSD ymm1, m64
VEX.256.66.0F38.W0 19 /r
AVX
16/32/64-bit
VBROADCASTF32X2 ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W0 19 /r
AVX512VL and AVX512DQ
16/32/64-bit
VBROADCASTF32X2 zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W0 19 /r
AVX512DQ
16/32/64-bit
VBROADCASTSD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W1 19 /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTSD zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W1 19 /r
AVX512F
16/32/64-bit
VBROADCASTF128 ymm1, m128
VEX.256.66.0F38.W0 1A /r
AVX
16/32/64-bit
VBROADCASTF32X4 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W0 1A /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTF32X4 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W0 1A /r
AVX512F
16/32/64-bit
VBROADCASTF64X2 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W1 1A /r
AVX512VL and AVX512DQ
16/32/64-bit
VBROADCASTF64X2 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W1 1A /r
AVX512DQ
16/32/64-bit
VBROADCASTF32X8 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W0 1B /r
AVX512DQ
16/32/64-bit
VBROADCASTF64X4 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W1 1B /r
AVX512F
16/32/64-bit
PABSB mm1, mm2/m64
NP 0F 38 1C /r
SSSE3
16/32/64-bit
PABSB xmm1, xmm2/m128
66 0F 38 1C /r
SSSE3
16/32/64-bit
VPABSB xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1C /r
AVX
16/32/64-bit
VPABSB ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1C /r
AVX2
16/32/64-bit
VPABSB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.WIG 1C /r
AVX512VL and AVX512BW
16/32/64-bit
VPABSB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.WIG 1C /r
AVX512VL and AVX512BW
16/32/64-bit
VPABSB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.WIG 1C /r
AVX512BW
16/32/64-bit
PABSW mm1, mm2/m64
NP 0F 38 1D /r
SSSE3
16/32/64-bit
PABSW xmm1, xmm2/m128
66 0F 38 1D /r
SSSE3
16/32/64-bit
VPABSW xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1D /r
AVX
16/32/64-bit
VPABSW ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1D /r
AVX2
16/32/64-bit
VPABSW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.WIG 1D /r
AVX512VL and AVX512BW
16/32/64-bit
VPABSW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.WIG 1D /r
AVX512VL and AVX512BW
16/32/64-bit
VPABSW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.WIG 1D /r
AVX512BW
16/32/64-bit
PABSD mm1, mm2/m64
NP 0F 38 1E /r
SSSE3
16/32/64-bit
PABSD xmm1, xmm2/m128
66 0F 38 1E /r
SSSE3
16/32/64-bit
VPABSD xmm1, xmm2/m128
VEX.128.66.0F38.WIG 1E /r
AVX
16/32/64-bit
VPABSD ymm1, ymm2/m256
VEX.256.66.0F38.WIG 1E /r
AVX2
16/32/64-bit
VPABSD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 1E /r
AVX512VL and AVX512F
16/32/64-bit
VPABSD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 1E /r
AVX512VL and AVX512F
16/32/64-bit
VPABSD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 1E /r
AVX512F
16/32/64-bit
VPABSQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 1F /r
AVX512VL and AVX512F
16/32/64-bit
VPABSQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 1F /r
AVX512VL and AVX512F
16/32/64-bit
VPABSQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 1F /r
AVX512F
16/32/64-bit
PMOVSXBW xmm1, xmm2/m64
66 0F 38 20 /r
SSE4.1
16/32/64-bit
VPMOVSXBW xmm1, xmm2/m64
VEX.128.66.0F38.WIG 20 /r
AVX
16/32/64-bit
VPMOVSXBW ymm1, xmm2/m128
VEX.256.66.0F38.WIG 20 /r
AVX2
16/32/64-bit
VPMOVSXBW xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 20 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVSXBW ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 20 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVSXBW zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 20 /r
AVX512BW
16/32/64-bit
VPMOVSWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 20 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVSWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 20 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVSWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 20 /r
AVX512BW
16/32/64-bit
PMOVSXBD xmm1, xmm2/m32
66 0F 38 21 /r
SSE4.1
16/32/64-bit
VPMOVSXBD xmm1, xmm2/m32
VEX.128.66.0F38.WIG 21 /r
AVX
16/32/64-bit
VPMOVSXBD ymm1, xmm2/m64
VEX.256.66.0F38.WIG 21 /r
AVX2
16/32/64-bit
VPMOVSXBD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 21 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXBD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 21 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXBD zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 21 /r
AVX512F
16/32/64-bit
VPMOVSDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 21 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 21 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 21 /r
AVX512F
16/32/64-bit
PMOVSXBQ xmm1, xmm2/m16
66 0F 38 22 /r
SSE4.1
16/32/64-bit
VPMOVSXBQ xmm1, xmm2/m16
VEX.128.66.0F38.WIG 22 /r
AVX
16/32/64-bit
VPMOVSXBQ ymm1, xmm2/m32
VEX.256.66.0F38.WIG 22 /r
AVX2
16/32/64-bit
VPMOVSXBQ xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.WIG 22 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXBQ ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.WIG 22 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXBQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.WIG 22 /r
AVX512F
16/32/64-bit
VPMOVSQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 22 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 22 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 22 /r
AVX512F
16/32/64-bit
PMOVSXWD xmm1, xmm2/m64
66 0F 38 23 /r
SSE4.1
16/32/64-bit
VPMOVSXWD xmm1, xmm2/m64
VEX.128.66.0F38.WIG 23 /r
AVX
16/32/64-bit
VPMOVSXWD ymm1, xmm2/m128
VEX.256.66.0F38.WIG 23 /r
AVX2
16/32/64-bit
VPMOVSXWD xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 23 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXWD ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 23 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXWD zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 23 /r
AVX512F
16/32/64-bit
VPMOVSDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 23 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 23 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 23 /r
AVX512F
16/32/64-bit
PMOVSXWQ xmm1, xmm2/m32
66 0F 38 24 /r
SSE4.1
16/32/64-bit
VPMOVSXWQ xmm1, xmm2/m32
VEX.128.66.0F38.WIG 24 /r
AVX
16/32/64-bit
VPMOVSXWQ ymm1, xmm2/m64
VEX.256.66.0F38.WIG 24 /r
AVX2
16/32/64-bit
VPMOVSXWQ xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 24 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXWQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 24 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXWQ zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 24 /r
AVX512F
16/32/64-bit
VPMOVSQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 24 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 24 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 24 /r
AVX512F
16/32/64-bit
PMOVSXDQ xmm1, xmm2/m64
66 0F 38 25 /r
SSE4.1
16/32/64-bit
VPMOVSXDQ xmm1, xmm2/m64
VEX.128.66.0F38.WIG 25 /r
AVX
16/32/64-bit
VPMOVSXDQ ymm1, xmm2/m128
VEX.256.66.0F38.WIG 25 /r
AVX2
16/32/64-bit
VPMOVSXDQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXDQ ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSXDQ zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.W0 25 /r
AVX512F
16/32/64-bit
VPMOVSQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 25 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVSQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 25 /r
AVX512F
16/32/64-bit
VPTESTMB k2 {k1}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTMB k2 {k1}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTMB k2 {k1}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 26 /r
AVX512BW
16/32/64-bit
VPTESTMW k2 {k1}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTMW k2 {k1}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTMW k2 {k1}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 26 /r
AVX512BW
16/32/64-bit
VPTESTNMB k2 {k1}, xmm2, xmm3/m128
EVEX.128.F3.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTNMB k2 {k1}, ymm2, ymm3/m256
EVEX.256.F3.0F38.W0 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTNMB k2 {k1}, zmm2, zmm3/m512
EVEX.512.F3.0F38.W0 26 /r
AVX512BW
16/32/64-bit
VPTESTNMW k2 {k1}, xmm2, xmm3/m128
EVEX.128.F3.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTNMW k2 {k1}, ymm2, ymm3/m256
EVEX.256.F3.0F38.W1 26 /r
AVX512VL and AVX512BW
16/32/64-bit
VPTESTNMW k2 {k1}, zmm2, zmm3/m512
EVEX.512.F3.0F38.W1 26 /r
AVX512BW
16/32/64-bit
VPTESTMD k2 {k1}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTMD k2 {k1}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTMD k2 {k1}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 27 /r
AVX512F
16/32/64-bit
VPTESTMQ k2 {k1}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTMQ k2 {k1}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTMQ k2 {k1}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 27 /r
AVX512F
16/32/64-bit
VPTESTNMD k2 {k1}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTNMD k2 {k1}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.0F38.W0 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTNMD k2 {k1}, zmm2, zmm3/m512/m32bcst
EVEX.512.F3.0F38.W0 27 /r
AVX512F
16/32/64-bit
VPTESTNMQ k2 {k1}, xmm2, xmm3/m128/m64bcst
EVEX.128.F3.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTNMQ k2 {k1}, ymm2, ymm3/m256/m64bcst
EVEX.256.F3.0F38.W1 27 /r
AVX512VL and AVX512F
16/32/64-bit
VPTESTNMQ k2 {k1}, zmm2, zmm3/m512/m64bcst
EVEX.512.F3.0F38.W1 27 /r
AVX512F
16/32/64-bit
PMULDQ xmm1, xmm2/m128
66 0F 38 28 /r
SSE4.1
16/32/64-bit
VPMULDQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 28 /r
AVX
16/32/64-bit
VPMULDQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 28 /r
AVX2
16/32/64-bit
VPMULDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
VPMULDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 28 /r
AVX512VL and AVX512F
16/32/64-bit
VPMULDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 28 /r
AVX512F
16/32/64-bit
VPMOVM2B xmm1, k1
EVEX.128.F3.0F38.W0 28 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVM2B ymm1, k1
EVEX.256.F3.0F38.W0 28 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVM2B zmm1, k1
EVEX.512.F3.0F38.W0 28 /r
AVX512BW
16/32/64-bit
VPMOVM2W xmm1, k1
EVEX.128.F3.0F38.W1 28 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVM2W ymm1, k1
EVEX.256.F3.0F38.W1 28 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVM2W zmm1, k1
EVEX.512.F3.0F38.W1 28 /r
AVX512BW
16/32/64-bit
PCMPEQQ xmm1, xmm2/m128
66 0F 38 29 /r
SSE4.1
16/32/64-bit
VPCMPEQQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 29 /r
AVX
16/32/64-bit
VPCMPEQQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 29 /r
AVX2
16/32/64-bit
VPCMPEQQ k1 {k2}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPEQQ k1 {k2}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 29 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPEQQ k1 {k2}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 29 /r
AVX512F
16/32/64-bit
VPMOVB2M k1, xmm1
EVEX.128.F3.0F38.W0 29 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVB2M k1, ymm1
EVEX.256.F3.0F38.W0 29 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVB2M k1, zmm1
EVEX.512.F3.0F38.W0 29 /r
AVX512BW
16/32/64-bit
VPMOVW2M k1, xmm1
EVEX.128.F3.0F38.W1 29 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVW2M k1, ymm1
EVEX.256.F3.0F38.W1 29 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVW2M k1, zmm1
EVEX.512.F3.0F38.W1 29 /r
AVX512BW
16/32/64-bit
MOVNTDQA xmm1, m128
66 0F 38 2A /r
SSE4.1
16/32/64-bit
VMOVNTDQA xmm1, m128
VEX.128.66.0F38.WIG 2A /r
AVX
16/32/64-bit
VMOVNTDQA ymm1, m256
VEX.256.66.0F38.WIG 2A /r
AVX2
16/32/64-bit
VMOVNTDQA xmm1, m128
EVEX.128.66.0F38.W0 2A /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTDQA ymm1, m256
EVEX.256.66.0F38.W0 2A /r
AVX512VL and AVX512F
16/32/64-bit
VMOVNTDQA zmm1, m512
EVEX.512.66.0F38.W0 2A /r
AVX512F
16/32/64-bit
VPBROADCASTMB2Q xmm1, k1
EVEX.128.F3.0F38.W1 2A /r
AVX512VL and AVX512CD
16/32/64-bit
VPBROADCASTMB2Q ymm1, k1
EVEX.256.F3.0F38.W1 2A /r
AVX512VL and AVX512CD
16/32/64-bit
VPBROADCASTMB2Q zmm1, k1
EVEX.512.F3.0F38.W1 2A /r
AVX512CD
16/32/64-bit
PACKUSDW xmm1, xmm2/m128
66 0F 38 2B /r
SSE4.1
16/32/64-bit
VPACKUSDW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 2B /r
AVX
16/32/64-bit
VPACKUSDW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 2B /r
AVX2
16/32/64-bit
VPACKUSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 2B /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKUSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 2B /r
AVX512VL and AVX512BW
16/32/64-bit
VPACKUSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 2B /r
AVX512BW
16/32/64-bit
VMASKMOVPS xmm1, xmm2, m128
VEX.128.66.0F38.W0 2C /r
AVX
16/32/64-bit
VMASKMOVPS ymm1, ymm2, m256
VEX.256.66.0F38.W0 2C /r
AVX
16/32/64-bit
VSCALEFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 2C /r
AVX512VL and AVX512F
16/32/64-bit
VSCALEFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 2C /r
AVX512VL and AVX512F
16/32/64-bit
VSCALEFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 2C /r
AVX512F
16/32/64-bit
VSCALEFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 2C /r
AVX512VL and AVX512F
16/32/64-bit
VSCALEFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 2C /r
AVX512VL and AVX512F
16/32/64-bit
VSCALEFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 2C /r
AVX512F
16/32/64-bit
VMASKMOVPD xmm1, xmm2, m128
VEX.128.66.0F38.W0 2D /r
AVX
16/32/64-bit
VMASKMOVPD ymm1, ymm2, m256
VEX.256.66.0F38.W0 2D /r
AVX
16/32/64-bit
VSCALEFSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 2D /r
AVX512F
16/32/64-bit
VSCALEFSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 2D /r
AVX512F
16/32/64-bit
VMASKMOVPS m128, xmm1, xmm2
VEX.128.66.0F38.W0 2E /r
AVX
16/32/64-bit
VMASKMOVPS m256, ymm1, ymm2
VEX.256.66.0F38.W0 2E /r
AVX
16/32/64-bit
VMASKMOVPD m128, xmm1, xmm2
VEX.128.66.0F38.W0 2F /r
AVX
16/32/64-bit
VMASKMOVPD m256, ymm1, ymm2
VEX.256.66.0F38.W0 2F /r
AVX
16/32/64-bit
PMOVZXBW xmm1, xmm2/m64
66 0F 38 30 /r
SSE4.1
16/32/64-bit
VPMOVZXBW xmm1, xmm2/m64
VEX.128.66.0F38.WIG 30 /r
AVX
16/32/64-bit
VPMOVZXBW ymm1, xmm2/m128
VEX.256.66.0F38.WIG 30 /r
AVX2
16/32/64-bit
VPMOVZXBW xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 30 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVZXBW ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 30 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVZXBW zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 30 /r
AVX512BW
16/32/64-bit
VPMOVWB xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 30 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVWB xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 30 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMOVWB ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 30 /r
AVX512BW
16/32/64-bit
PMOVZXBD xmm1, xmm2/m32
66 0F 38 31 /r
SSE4.1
16/32/64-bit
VPMOVZXBD xmm1, xmm2/m32
VEX.128.66.0F38.WIG 31 /r
AVX
16/32/64-bit
VPMOVZXBD ymm1, xmm2/m64
VEX.256.66.0F38.WIG 31 /r
AVX2
16/32/64-bit
VPMOVZXBD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 31 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXBD ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 31 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXBD zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 31 /r
AVX512F
16/32/64-bit
VPMOVDB xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 31 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVDB xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 31 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVDB xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 31 /r
AVX512F
16/32/64-bit
PMOVZXBQ xmm1, xmm2/m16
66 0F 38 32 /r
SSE4.1
16/32/64-bit
VPMOVZXBQ xmm1, xmm2/m16
VEX.128.66.0F38.WIG 32 /r
AVX
16/32/64-bit
VPMOVZXBQ ymm1, xmm2/m32
VEX.256.66.0F38.WIG 32 /r
AVX2
16/32/64-bit
VPMOVZXBQ xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.WIG 32 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXBQ ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.WIG 32 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXBQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.WIG 32 /r
AVX512F
16/32/64-bit
VPMOVQB xmm1/m16 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 32 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVQB xmm1/m32 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 32 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVQB xmm1/m64 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 32 /r
AVX512F
16/32/64-bit
PMOVZXWD xmm1, xmm2/m64
66 0F 38 33 /r
SSE4.1
16/32/64-bit
VPMOVZXWD xmm1, xmm2/m64
VEX.128.66.0F38.WIG 33 /r
AVX
16/32/64-bit
VPMOVZXWD ymm1, xmm2/m128
VEX.256.66.0F38.WIG 33 /r
AVX2
16/32/64-bit
VPMOVZXWD xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.WIG 33 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXWD ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.WIG 33 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXWD zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.WIG 33 /r
AVX512F
16/32/64-bit
VPMOVDW xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 33 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVDW xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 33 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVDW ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 33 /r
AVX512F
16/32/64-bit
PMOVZXWQ xmm1, xmm2/m32
66 0F 38 34 /r
SSE4.1
16/32/64-bit
VPMOVZXWQ xmm1, xmm2/m32
VEX.128.66.0F38.WIG 34 /r
AVX
16/32/64-bit
VPMOVZXWQ ymm1, xmm2/m64
VEX.256.66.0F38.WIG 34 /r
AVX2
16/32/64-bit
VPMOVZXWQ xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.WIG 34 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXWQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.WIG 34 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXWQ zmm1 {k1}{z}, xmm2/m128
EVEX.512.66.0F38.WIG 34 /r
AVX512F
16/32/64-bit
VPMOVQW xmm1/m32 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 34 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVQW xmm1/m64 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 34 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVQW xmm1/m128 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 34 /r
AVX512F
16/32/64-bit
PMOVZXDQ xmm1, xmm2/m64
66 0F 38 35 /r
SSE4.1
16/32/64-bit
VPMOVZXDQ xmm1, xmm2/m64
VEX.128.66.0F38.WIG 35 /r
AVX
16/32/64-bit
VPMOVZXDQ ymm1, xmm2/m128
VEX.256.66.0F38.WIG 35 /r
AVX2
16/32/64-bit
VPMOVZXDQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXDQ ymm1 {k1}{z}, xmm2/m128
EVEX.256.66.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVZXDQ zmm1 {k1}{z}, ymm2/m256
EVEX.512.66.0F38.W0 35 /r
AVX512F
16/32/64-bit
VPMOVQD xmm1/m64 {k1}{z}, xmm2
EVEX.128.F3.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVQD xmm1/m128 {k1}{z}, ymm2
EVEX.256.F3.0F38.W0 35 /r
AVX512VL and AVX512F
16/32/64-bit
VPMOVQD ymm1/m256 {k1}{z}, zmm2
EVEX.512.F3.0F38.W0 35 /r
AVX512F
16/32/64-bit
VPERMD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 36 /r
AVX2
16/32/64-bit
VPERMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 36 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 36 /r
AVX512F
16/32/64-bit
VPERMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 36 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 36 /r
AVX512F
16/32/64-bit
PCMPGTQ xmm1, xmm2/m128
66 0F 38 37 /r
SSE4.2
16/32/64-bit
VPCMPGTQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 37 /r
AVX
16/32/64-bit
VPCMPGTQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 37 /r
AVX2
16/32/64-bit
VPCMPGTQ k1 {k2}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 37 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPGTQ k1 {k2}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 37 /r
AVX512VL and AVX512F
16/32/64-bit
VPCMPGTQ k1 {k2}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 37 /r
AVX512F
16/32/64-bit
PMINSB xmm1, xmm2/m128
66 0F 38 38 /r
SSE4.1
16/32/64-bit
VPMINSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 38 /r
AVX
16/32/64-bit
VPMINSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 38 /r
AVX2
16/32/64-bit
VPMINSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 38 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 38 /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 38 /r
AVX512BW
16/32/64-bit
VPMOVM2D xmm1, k1
EVEX.128.F3.0F38.W0 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVM2D ymm1, k1
EVEX.256.F3.0F38.W0 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVM2D zmm1, k1
EVEX.512.F3.0F38.W0 38 /r
AVX512DQ
16/32/64-bit
VPMOVM2Q xmm1, k1
EVEX.128.F3.0F38.W1 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVM2Q ymm1, k1
EVEX.256.F3.0F38.W1 38 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVM2Q zmm1, k1
EVEX.512.F3.0F38.W1 38 /r
AVX512DQ
16/32/64-bit
PMINSD xmm1, xmm2/m128
66 0F 38 39 /r
SSE4.1
16/32/64-bit
VPMINSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 39 /r
AVX
16/32/64-bit
VPMINSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 39 /r
AVX2
16/32/64-bit
VPMINSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 39 /r
AVX512VL and AVX512F
16/32/64-bit
VPMINSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 39 /r
AVX512VL and AVX512F
16/32/64-bit
VPMINSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 39 /r
AVX512F
16/32/64-bit
VPMINSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 39 /r
AVX512VL and AVX512F
16/32/64-bit
VPMINSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 39 /r
AVX512VL and AVX512F
16/32/64-bit
VPMINSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 39 /r
AVX512F
16/32/64-bit
VPMOVD2M k1, xmm1
EVEX.128.F3.0F38.W0 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVD2M k1, ymm1
EVEX.256.F3.0F38.W0 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVD2M k1, zmm1
EVEX.512.F3.0F38.W0 39 /r
AVX512DQ
16/32/64-bit
VPMOVQ2M k1, xmm1
EVEX.128.F3.0F38.W1 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVQ2M k1, ymm1
EVEX.256.F3.0F38.W1 39 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMOVQ2M k1, zmm1
EVEX.512.F3.0F38.W1 39 /r
AVX512DQ
16/32/64-bit
PMINUW xmm1, xmm2/m128
66 0F 38 3A /r
SSE4.1
16/32/64-bit
VPMINUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3A /r
AVX
16/32/64-bit
VPMINUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3A /r
AVX2
16/32/64-bit
VPMINUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3A /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3A /r
AVX512VL and AVX512BW
16/32/64-bit
VPMINUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3A /r
AVX512BW
16/32/64-bit
VPBROADCASTMW2D xmm1, k1
EVEX.128.F3.0F38.W0 3A /r
AVX512VL and AVX512CD
16/32/64-bit
VPBROADCASTMW2D ymm1, k1
EVEX.256.F3.0F38.W0 3A /r
AVX512VL and AVX512CD
16/32/64-bit
VPBROADCASTMW2D zmm1, k1
EVEX.512.F3.0F38.W0 3A /r
AVX512CD
16/32/64-bit
PMINUD xmm1, xmm2/m128
66 0F 38 3B /r
SSE4.1
16/32/64-bit
VPMINUD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3B /r
AVX
16/32/64-bit
VPMINUD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3B /r
AVX2
16/32/64-bit
VPMINUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3B /r
AVX512VL and AVX512F
16/32/64-bit
VPMINUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3B /r
AVX512VL and AVX512F
16/32/64-bit
VPMINUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3B /r
AVX512F
16/32/64-bit
VPMINUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3B /r
AVX512VL and AVX512F
16/32/64-bit
VPMINUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3B /r
AVX512VL and AVX512F
16/32/64-bit
VPMINUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3B /r
AVX512F
16/32/64-bit
PMAXSB xmm1, xmm2/m128
66 0F 38 3C /r
SSE4.1
16/32/64-bit
VPMAXSB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3C /r
AVX
16/32/64-bit
VPMAXSB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3C /r
AVX2
16/32/64-bit
VPMAXSB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3C /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXSB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3C /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXSB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3C /r
AVX512BW
16/32/64-bit
PMAXSD xmm1, xmm2/m128
66 0F 38 3D /r
SSE4.1
16/32/64-bit
VPMAXSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3D /r
AVX
16/32/64-bit
VPMAXSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3D /r
AVX2
16/32/64-bit
VPMAXSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3D /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3D /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3D /r
AVX512F
16/32/64-bit
VPMAXSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3D /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3D /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3D /r
AVX512F
16/32/64-bit
PMAXUW xmm1, xmm2/m128
66 0F 38 3E /r
SSE4.1
16/32/64-bit
VPMAXUW xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3E /r
AVX
16/32/64-bit
VPMAXUW ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3E /r
AVX2
16/32/64-bit
VPMAXUW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG 3E /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXUW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG 3E /r
AVX512VL and AVX512BW
16/32/64-bit
VPMAXUW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG 3E /r
AVX512BW
16/32/64-bit
PMAXUD xmm1, xmm2/m128
66 0F 38 3F /r
SSE4.1
16/32/64-bit
VPMAXUD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 3F /r
AVX
16/32/64-bit
VPMAXUD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 3F /r
AVX2
16/32/64-bit
VPMAXUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 3F /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 3F /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 3F /r
AVX512F
16/32/64-bit
VPMAXUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 3F /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 3F /r
AVX512VL and AVX512F
16/32/64-bit
VPMAXUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 3F /r
AVX512F
16/32/64-bit
PMULLD xmm1, xmm2/m128
66 0F 38 40 /r
SSE4.1
16/32/64-bit
VPMULLD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG 40 /r
AVX
16/32/64-bit
VPMULLD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG 40 /r
AVX2
16/32/64-bit
VPMULLD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 40 /r
AVX512VL and AVX512F
16/32/64-bit
VPMULLD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 40 /r
AVX512VL and AVX512F
16/32/64-bit
VPMULLD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 40 /r
AVX512F
16/32/64-bit
VPMULLQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 40 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMULLQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 40 /r
AVX512VL and AVX512DQ
16/32/64-bit
VPMULLQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 40 /r
AVX512DQ
16/32/64-bit
PHMINPOSUW xmm1, xmm2/m128
66 0F 38 41 /r
SSE4.1
16/32/64-bit
VPHMINPOSUW xmm1, xmm2/m128
VEX.128.66.0F38.WIG 41 /r
AVX
16/32/64-bit
VGETEXPPS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 42 /r
AVX512VL and AVX512F
16/32/64-bit
VGETEXPPS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 42 /r
AVX512VL and AVX512F
16/32/64-bit
VGETEXPPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 42 /r
AVX512F
16/32/64-bit
VGETEXPPD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 42 /r
AVX512VL and AVX512F
16/32/64-bit
VGETEXPPD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 42 /r
AVX512VL and AVX512F
16/32/64-bit
VGETEXPPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 42 /r
AVX512F
16/32/64-bit
VGETEXPSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 43 /r
AVX512F
16/32/64-bit
VGETEXPSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 43 /r
AVX512F
16/32/64-bit
VPLZCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 44 /r
AVX512VL and AVX512CD
16/32/64-bit
VPLZCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 44 /r
AVX512VL and AVX512CD
16/32/64-bit
VPLZCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 44 /r
AVX512CD
16/32/64-bit
VPLZCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 44 /r
AVX512VL and AVX512CD
16/32/64-bit
VPLZCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 44 /r
AVX512VL and AVX512CD
16/32/64-bit
VPLZCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 44 /r
AVX512CD
16/32/64-bit
VPSRLVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 45 /r
AVX2
16/32/64-bit
VPSRLVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 45 /r
AVX2
16/32/64-bit
VPSRLVQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 45 /r
AVX2
16/32/64-bit
VPSRLVQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 45 /r
AVX2
16/32/64-bit
VPSRLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 45 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 45 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 45 /r
AVX512F
16/32/64-bit
VPSRLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 45 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 45 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 45 /r
AVX512F
16/32/64-bit
VPSRAVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 46 /r
AVX2
16/32/64-bit
VPSRAVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 46 /r
AVX2
16/32/64-bit
VPSRAVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 46 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 46 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 46 /r
AVX512F
16/32/64-bit
VPSRAVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 46 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 46 /r
AVX512VL and AVX512F
16/32/64-bit
VPSRAVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 46 /r
AVX512F
16/32/64-bit
VPSLLVD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 47 /r
AVX2
16/32/64-bit
VPSLLVD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 47 /r
AVX2
16/32/64-bit
VPSLLVQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 47 /r
AVX2
16/32/64-bit
VPSLLVQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 47 /r
AVX2
16/32/64-bit
VPSLLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 47 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 47 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 47 /r
AVX512F
16/32/64-bit
VPSLLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 47 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 47 /r
AVX512VL and AVX512F
16/32/64-bit
VPSLLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 47 /r
AVX512F
16/32/64-bit
VRCP14PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 4C /r
AVX512VL and AVX512F
16/32/64-bit
VRCP14PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 4C /r
AVX512VL and AVX512F
16/32/64-bit
VRCP14PS zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 4C /r
AVX512F
16/32/64-bit
VRCP14PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 4C /r
AVX512VL and AVX512F
16/32/64-bit
VRCP14PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 4C /r
AVX512VL and AVX512F
16/32/64-bit
VRCP14PD zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 4C /r
AVX512F
16/32/64-bit
VRCP14SS xmm1 {k1}{z}, xmm2, xmm3/m32
EVEX.LIG.66.0F38.W0 4D /r
AVX512F
16/32/64-bit
VRCP14SD xmm1 {k1}{z}, xmm2, xmm3/m64
EVEX.LIG.66.0F38.W1 4D /r
AVX512F
16/32/64-bit
VRSQRT14PS xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 4E /r
AVX512VL and AVX512F
16/32/64-bit
VRSQRT14PS ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 4E /r
AVX512VL and AVX512F
16/32/64-bit
VRSQRT14PS zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 4E /r
AVX512F
16/32/64-bit
VRSQRT14PD xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 4E /r
AVX512VL and AVX512F
16/32/64-bit
VRSQRT14PD ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 4E /r
AVX512VL and AVX512F
16/32/64-bit
VRSQRT14PD zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 4E /r
AVX512F
16/32/64-bit
VRSQRT14SS xmm1 {k1}{z}, xmm2, xmm3/m32
EVEX.LIG.66.0F38.W0 4F /r
AVX512F
16/32/64-bit
VRSQRT14SD xmm1 {k1}{z}, xmm2, xmm3/m64
EVEX.LIG.66.0F38.W1 4F /r
AVX512F
16/32/64-bit
VPDPBUSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 50 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 50 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 50 /r
AVX512_VNNI
16/32/64-bit
VPDPBUSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 51 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 51 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPBUSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 51 /r
AVX512_VNNI
16/32/64-bit
VPDPWSSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 52 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 52 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 52 /r
AVX512_VNNI
16/32/64-bit
VDPBF16PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.0F38.W0 52 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VDPBF16PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.0F38.W0 52 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VDPBF16PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.F3.0F38.W0 52 /r
AVX512F and AVX512_BF16
16/32/64-bit
VP4DPWSSD zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 52 /r
AVX512_4VNNIW
16/32/64-bit
VPDPWSSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 53 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 53 /r
AVX512VL and AVX512_VNNI
16/32/64-bit
VPDPWSSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 53 /r
AVX512_VNNI
16/32/64-bit
VP4DPWSSDS zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 53 /r
AVX512_4VNNIW
16/32/64-bit
VPOPCNTB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
VPOPCNTB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
VPOPCNTB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 54 /r
AVX512_BITALG
16/32/64-bit
VPOPCNTW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
VPOPCNTW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 54 /r
AVX512VL and AVX512_BITALG
16/32/64-bit
VPOPCNTW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 54 /r
AVX512_BITALG
16/32/64-bit
VPOPCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
VPOPCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
VPOPCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 55 /r
AVX512_VPOPCNTDQ
16/32/64-bit
VPOPCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
VPOPCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 55 /r
AVX512VL and AVX512_VPOPCNTDQ
16/32/64-bit
VPOPCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 55 /r
AVX512_VPOPCNTDQ
16/32/64-bit
VPBROADCASTD xmm1, xmm2/m32
VEX.128.66.0F38.W0 58 /r
AVX2
16/32/64-bit
VPBROADCASTD ymm1, xmm2/m32
VEX.256.66.0F38.W0 58 /r
AVX2
16/32/64-bit
VPBROADCASTD xmm1 {k1}{z}, xmm2/m32
EVEX.128.66.0F38.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
VPBROADCASTD ymm1 {k1}{z}, xmm2/m32
EVEX.256.66.0F38.W0 58 /r
AVX512VL and AVX512F
16/32/64-bit
VPBROADCASTD zmm1 {k1}{z}, xmm2/m32
EVEX.512.66.0F38.W0 58 /r
AVX512F
16/32/64-bit
VPBROADCASTQ xmm1, xmm2/m64
VEX.128.66.0F38.W0 59 /r
AVX2
16/32/64-bit
VPBROADCASTQ ymm1, xmm2/m64
VEX.256.66.0F38.W0 59 /r
AVX2
16/32/64-bit
VBROADCASTI32X2 xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W0 59 /r
AVX512VL and AVX512DQ
16/32/64-bit
VBROADCASTI32X2 ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W0 59 /r
AVX512VL and AVX512DQ
16/32/64-bit
VBROADCASTI32X2 zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W0 59 /r
AVX512DQ
16/32/64-bit
VPBROADCASTQ xmm1 {k1}{z}, xmm2/m64
EVEX.128.66.0F38.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
VPBROADCASTQ ymm1 {k1}{z}, xmm2/m64
EVEX.256.66.0F38.W1 59 /r
AVX512VL and AVX512F
16/32/64-bit
VPBROADCASTQ zmm1 {k1}{z}, xmm2/m64
EVEX.512.66.0F38.W1 59 /r
AVX512F
16/32/64-bit
VBROADCASTI128 ymm1, m128
VEX.256.66.0F38.W0 5A /r
AVX2
16/32/64-bit
VBROADCASTI32X4 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W0 5A /r
AVX512VL and AVX512F
16/32/64-bit
VBROADCASTI32X4 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W0 5A /r
AVX512F
16/32/64-bit
VBROADCASTI64X2 ymm1 {k1}{z}, m128
EVEX.256.66.0F38.W1 5A /r
AVX512VL and AVX512DQ
16/32/64-bit
VBROADCASTI64X2 zmm1 {k1}{z}, m128
EVEX.512.66.0F38.W1 5A /r
AVX512DQ
16/32/64-bit
VBROADCASTI32X8 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W0 5B /r
AVX512DQ
16/32/64-bit
VBROADCASTI64X4 zmm1 {k1}{z}, m256
EVEX.512.66.0F38.W1 5B /r
AVX512F
16/32/64-bit
VPEXPANDB xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPEXPANDB ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPEXPANDB zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 62 /r
AVX512_VBMI2
16/32/64-bit
VPEXPANDW xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPEXPANDW ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 62 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPEXPANDW zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 62 /r
AVX512_VBMI2
16/32/64-bit
VPCOMPRESSB xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPCOMPRESSB ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPCOMPRESSB zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 63 /r
AVX512_VBMI2
16/32/64-bit
VPCOMPRESSW xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPCOMPRESSW ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 63 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPCOMPRESSW zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 63 /r
AVX512_VBMI2
16/32/64-bit
VPBLENDMD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 64 /r
AVX512VL and AVX512F
16/32/64-bit
VPBLENDMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 64 /r
AVX512VL and AVX512F
16/32/64-bit
VPBLENDMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 64 /r
AVX512F
16/32/64-bit
VPBLENDMQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 64 /r
AVX512VL and AVX512F
16/32/64-bit
VPBLENDMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 64 /r
AVX512VL and AVX512F
16/32/64-bit
VPBLENDMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 64 /r
AVX512F
16/32/64-bit
VBLENDMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 65 /r
AVX512VL and AVX512F
16/32/64-bit
VBLENDMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 65 /r
AVX512VL and AVX512F
16/32/64-bit
VBLENDMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 65 /r
AVX512F
16/32/64-bit
VBLENDMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 65 /r
AVX512VL and AVX512F
16/32/64-bit
VBLENDMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 65 /r
AVX512VL and AVX512F
16/32/64-bit
VBLENDMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 65 /r
AVX512F
16/32/64-bit
VPBLENDMB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 66 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBLENDMB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 66 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBLENDMB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 66 /r
AVX512BW
16/32/64-bit
VPBLENDMW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 66 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBLENDMW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 66 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBLENDMW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 66 /r
AVX512BW
16/32/64-bit
VP2INTERSECTD k1+1, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.0F38.W0 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
VP2INTERSECTD k1+1, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.0F38.W0 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
VP2INTERSECTD k1+1, zmm2, zmm3/m512/m32bcst
EVEX.512.F2.0F38.W0 68 /r
AVX512F and AVX512_VP2INTERSECT
16/32/64-bit
VP2INTERSECTQ k1+1, xmm2, xmm3/m128/m64bcst
EVEX.128.F2.0F38.W1 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
VP2INTERSECTQ k1+1, ymm2, ymm3/m256/m64bcst
EVEX.256.F2.0F38.W1 68 /r
AVX512VL and AVX512_VP2INTERSECT
16/32/64-bit
VP2INTERSECTQ k1+1, zmm2, zmm3/m512/m64bcst
EVEX.512.F2.0F38.W1 68 /r
AVX512F and AVX512_VP2INTERSECT
16/32/64-bit
VPSHLDVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 70 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 70 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 70 /r
AVX512_VBMI2
16/32/64-bit
VPSHLDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 71 /r
AVX512_VBMI2
16/32/64-bit
VPSHLDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 71 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 71 /r
AVX512_VBMI2
16/32/64-bit
VPSHRDVW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 72 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDVW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 72 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDVW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 72 /r
AVX512_VBMI2
16/32/64-bit
VCVTNEPS2BF16 xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNEPS2BF16 xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F3.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNEPS2BF16 ymm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.F3.0F38.W0 72 /r
AVX512F and AVX512_BF16
16/32/64-bit
VCVTNE2PS2BF16 xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNE2PS2BF16 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.0F38.W0 72 /r
AVX512VL and AVX512_BF16
16/32/64-bit
VCVTNE2PS2BF16 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.F2.0F38.W0 72 /r
AVX512F and AVX512_BF16
16/32/64-bit
VPSHRDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 73 /r
AVX512_VBMI2
16/32/64-bit
VPSHRDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 73 /r
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 73 /r
AVX512_VBMI2
16/32/64-bit
VPERMI2B xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 75 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPERMI2B ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 75 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPERMI2B zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 75 /r
AVX512_VBMI
16/32/64-bit
VPERMI2W xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 75 /r
AVX512VL and AVX512BW
16/32/64-bit
VPERMI2W ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 75 /r
AVX512VL and AVX512BW
16/32/64-bit
VPERMI2W zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 75 /r
AVX512BW
16/32/64-bit
VPERMI2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 76 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 76 /r
AVX512F
16/32/64-bit
VPERMI2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 76 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 76 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 76 /r
AVX512F
16/32/64-bit
VPERMI2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 77 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 77 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 77 /r
AVX512F
16/32/64-bit
VPERMI2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 77 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 77 /r
AVX512VL and AVX512F
16/32/64-bit
VPERMI2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 77 /r
AVX512F
16/32/64-bit
VPBROADCASTB xmm1, xmm2/m8
VEX.128.66.0F38.W0 78 /r
AVX2
16/32/64-bit
VPBROADCASTB ymm1, xmm2/m8
VEX.256.66.0F38.W0 78 /r
AVX2
16/32/64-bit
VPBROADCASTB xmm1 {k1}{z}, xmm2/m8
EVEX.128.66.0F38.W0 78 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTB ymm1 {k1}{z}, xmm2/m8
EVEX.256.66.0F38.W0 78 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTB zmm1 {k1}{z}, xmm2/m8
EVEX.512.66.0F38.W0 78 /r
AVX512BW
16/32/64-bit
VPBROADCASTW xmm1, xmm2/m16
VEX.128.66.0F38.W0 79 /r
AVX2
16/32/64-bit
VPBROADCASTW ymm1, xmm2/m16
VEX.256.66.0F38.W0 79 /r
AVX2
16/32/64-bit
VPBROADCASTW xmm1 {k1}{z}, xmm2/m16
EVEX.128.66.0F38.W0 79 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTW ymm1 {k1}{z}, xmm2/m16
EVEX.256.66.0F38.W0 79 /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTW zmm1 {k1}{z}, xmm2/m16
EVEX.512.66.0F38.W0 79 /r
AVX512BW
16/32/64-bit
VPBROADCASTB xmm1 {k1}{z}, r32
EVEX.128.66.0F38.W0 7A /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTB ymm1 {k1}{z}, r32
EVEX.256.66.0F38.W0 7A /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTB zmm1 {k1}{z}, r32
EVEX.512.66.0F38.W0 7A /r
AVX512BW
16/32/64-bit
VPBROADCASTW xmm1 {k1}{z}, r32
EVEX.128.66.0F38.W0 7B /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTW ymm1 {k1}{z}, r32
EVEX.256.66.0F38.W0 7B /r
AVX512VL and AVX512BW
16/32/64-bit
VPBROADCASTW zmm1 {k1}{z}, r32
EVEX.512.66.0F38.W0 7B /r
AVX512BW
16/32/64-bit
VPBROADCASTD xmm1 {k1}{z}, r32
EVEX.128.66.0F38.W0 7C /r
AVX512VL and AVX512F
16/32/64-bit
VPBROADCASTD ymm1 {k1}{z}, r32
EVEX.256.66.0F38.W0 7C /r
AVX512VL and AVX512F
16/32/64-bit
VPBROADCASTD zmm1 {k1}{z}, r32
EVEX.512.66.0F38.W0 7C /r
AVX512F
16/32/64-bit
VPBROADCASTQ xmm1 {k1}{z}, r64
EVEX.128.66.0F38.W1 7C /r
AVX512VL and AVX512F
64-bit
VPBROADCASTQ ymm1 {k1}{z}, r64
EVEX.256.66.0F38.W1 7C /r
AVX512VL and AVX512F
64-bit
VPBROADCASTQ zmm1 {k1}{z}, r64
EVEX.512.66.0F38.W1 7C /r
AVX512F
64-bit
VPERMT2B xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 7D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPERMT2B ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 7D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPERMT2B zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 7D /r
AVX512_VBMI
16/32/64-bit
VPERMT2W xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 7D /r
AVX512VL and AVX512BW
16/32/64-bit
VPERMT2W ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 7D /r
AVX512VL and AVX512BW
16/32/64-bit
VPERMT2W zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 7D /r
AVX512BW
16/32/64-bit
VPERMT2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 7E /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 7E /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 7E /r
AVX512F
16/32/64-bit
VPERMT2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 7E /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 7E /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 7E /r
AVX512F
16/32/64-bit
VPERMT2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 7F /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst
EVEX.512.66.0F38.W0 7F /r
AVX512F
16/32/64-bit
VPERMT2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 7F /r
AVX512VL and AVX512F
16/32/64-bit
VPERMT2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 7F /r
AVX512F
16/32/64-bit
INVEPT r32, m128
66 0F 38 80 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 20]
16/32-bit
INVEPT r64, m128
66 0F 38 80 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 20]
64-bit
INVVPID r32, m128
66 0F 38 81 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 32]
16/32-bit
INVVPID r64, m128
66 0F 38 81 /r
VMX and IA32_VMX_EPT_VPID_CAP[bit 32]
64-bit
INVPCID r32, m128
66 0F 38 82 /r
INVPCID
16/32-bit
INVPCID r64, m128
66 0F 38 82 /r
INVPCID
64-bit
VPMULTISHIFTQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 83 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPMULTISHIFTQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 83 /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPMULTISHIFTQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 83 /r
AVX512_VBMI
16/32/64-bit
VEXPANDPS xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 88 /r
AVX512VL and AVX512F
16/32/64-bit
VEXPANDPS ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 88 /r
AVX512VL and AVX512F
16/32/64-bit
VEXPANDPS zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 88 /r
AVX512F
16/32/64-bit
VEXPANDPD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 88 /r
AVX512VL and AVX512F
16/32/64-bit
VEXPANDPD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 88 /r
AVX512VL and AVX512F
16/32/64-bit
VEXPANDPD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 88 /r
AVX512F
16/32/64-bit
VPEXPANDD xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W0 89 /r
AVX512VL and AVX512F
16/32/64-bit
VPEXPANDD ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W0 89 /r
AVX512VL and AVX512F
16/32/64-bit
VPEXPANDD zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W0 89 /r
AVX512F
16/32/64-bit
VPEXPANDQ xmm1 {k1}{z}, xmm2/m128
EVEX.128.66.0F38.W1 89 /r
AVX512VL and AVX512F
16/32/64-bit
VPEXPANDQ ymm1 {k1}{z}, ymm2/m256
EVEX.256.66.0F38.W1 89 /r
AVX512VL and AVX512F
16/32/64-bit
VPEXPANDQ zmm1 {k1}{z}, zmm2/m512
EVEX.512.66.0F38.W1 89 /r
AVX512F
16/32/64-bit
VCOMPRESSPS xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 8A /r
AVX512VL and AVX512F
16/32/64-bit
VCOMPRESSPS ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 8A /r
AVX512VL and AVX512F
16/32/64-bit
VCOMPRESSPS zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 8A /r
AVX512F
16/32/64-bit
VCOMPRESSPD xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 8A /r
AVX512VL and AVX512F
16/32/64-bit
VCOMPRESSPD ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 8A /r
AVX512VL and AVX512F
16/32/64-bit
VCOMPRESSPD zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 8A /r
AVX512F
16/32/64-bit
VPCOMPRESSD xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W0 8B /r
AVX512VL and AVX512F
16/32/64-bit
VPCOMPRESSD ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W0 8B /r
AVX512VL and AVX512F
16/32/64-bit
VPCOMPRESSD zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W0 8B /r
AVX512F
16/32/64-bit
VPCOMPRESSQ xmm1/m128 {k1}{z}, xmm2
EVEX.128.66.0F38.W1 8B /r
AVX512VL and AVX512F
16/32/64-bit
VPCOMPRESSQ ymm1/m256 {k1}{z}, ymm2
EVEX.256.66.0F38.W1 8B /r
AVX512VL and AVX512F
16/32/64-bit
VPCOMPRESSQ zmm1/m512 {k1}{z}, zmm2
EVEX.512.66.0F38.W1 8B /r
AVX512F
16/32/64-bit
VPMASKMOVD xmm1, xmm2, m128
VEX.128.66.0F38.W0 8C /r
AVX2
16/32/64-bit
VPMASKMOVD ymm1, ymm2, m256
VEX.256.66.0F38.W0 8C /r
AVX2
16/32/64-bit
VPMASKMOVQ xmm1, xmm2, m128
VEX.128.66.0F38.W1 8C /r
AVX2
16/32/64-bit
VPMASKMOVQ ymm1, ymm2, m256
VEX.256.66.0F38.W1 8C /r
AVX2
16/32/64-bit
VPERMB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 8D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPERMB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 8D /r
AVX512VL and AVX512_VBMI
16/32/64-bit
VPERMB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 8D /r
AVX512_VBMI
16/32/64-bit
VPERMW xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W1 8D /r
AVX512VL and AVX512BW
16/32/64-bit
VPERMW ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W1 8D /r
AVX512VL and AVX512BW
16/32/64-bit
VPERMW zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W1 8D /r
AVX512BW
16/32/64-bit
VPMASKMOVD m128, xmm1, xmm2
VEX.128.66.0F38.W0 8E /r
AVX2
16/32/64-bit
VPMASKMOVD m256, ymm1, ymm2
VEX.256.66.0F38.W0 8E /r
AVX2
16/32/64-bit
VPMASKMOVQ m128, xmm1, xmm2
VEX.128.66.0F38.W1 8E /r
AVX2
16/32/64-bit
VPMASKMOVQ m256, ymm1, ymm2
VEX.256.66.0F38.W1 8E /r
AVX2
16/32/64-bit
VPSHUFBITQMB k1 {k2}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 8F /r
AVX512VL and AVX512_BITALG
16/32/64-bit
VPSHUFBITQMB k1 {k2}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 8F /r
AVX512VL and AVX512_BITALG
16/32/64-bit
VPSHUFBITQMB k1 {k2}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 8F /r
AVX512_BITALG
16/32/64-bit
VPGATHERDD xmm1, vm32x, xmm2
VEX.128.66.0F38.W0 90 /r
AVX2
16/32/64-bit
VPGATHERDD ymm1, vm32y, ymm2
VEX.256.66.0F38.W0 90 /r
AVX2
16/32/64-bit
VPGATHERDQ xmm1, vm32x, xmm2
VEX.128.66.0F38.W1 90 /r
AVX2
16/32/64-bit
VPGATHERDQ ymm1, vm32x, ymm2
VEX.256.66.0F38.W1 90 /r
AVX2
16/32/64-bit
VPGATHERDD xmm1 {k1}, vm32x
EVEX.128.66.0F38.W0 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERDD ymm1 {k1}, vm32y
EVEX.256.66.0F38.W0 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERDD zmm1 {k1}, vm32z
EVEX.512.66.0F38.W0 90 /vsib
AVX512F
16/32/64-bit
VPGATHERDQ xmm1 {k1}, vm32x
EVEX.128.66.0F38.W1 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERDQ ymm1 {k1}, vm32x
EVEX.256.66.0F38.W1 90 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERDQ zmm1 {k1}, vm32y
EVEX.512.66.0F38.W1 90 /vsib
AVX512F
16/32/64-bit
VPGATHERQD xmm1, vm64x, xmm2
VEX.128.66.0F38.W0 91 /r
AVX2
16/32/64-bit
VPGATHERQD xmm1, vm64y, xmm2
VEX.256.66.0F38.W0 91 /r
AVX2
16/32/64-bit
VPGATHERQQ xmm1, vm64x, xmm2
VEX.128.66.0F38.W1 91 /r
AVX2
16/32/64-bit
VPGATHERQQ ymm1, vm64y, ymm2
VEX.256.66.0F38.W1 91 /r
AVX2
16/32/64-bit
VPGATHERQD xmm1 {k1}, vm64x
EVEX.128.66.0F38.W0 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERQD xmm1 {k1}, vm64y
EVEX.256.66.0F38.W0 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERQD ymm1 {k1}, vm64z
EVEX.512.66.0F38.W0 91 /vsib
AVX512F
16/32/64-bit
VPGATHERQQ xmm1 {k1}, vm64x
EVEX.128.66.0F38.W1 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERQQ ymm1 {k1}, vm64y
EVEX.256.66.0F38.W1 91 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPGATHERQQ zmm1 {k1}, vm64z
EVEX.512.66.0F38.W1 91 /vsib
AVX512F
16/32/64-bit
VGATHERDPS xmm1, vm32x, xmm2
VEX.128.66.0F38.W0 92 /r
AVX2
16/32/64-bit
VGATHERDPS ymm1, vm32y, ymm2
VEX.256.66.0F38.W0 92 /r
AVX2
16/32/64-bit
VGATHERDPD xmm1, vm32x, xmm2
VEX.128.66.0F38.W1 92 /r
AVX2
16/32/64-bit
VGATHERDPD ymm1, vm32x, ymm2
VEX.256.66.0F38.W1 92 /r
AVX2
16/32/64-bit
VGATHERDPS xmm1 {k1}, vm32x
EVEX.128.66.0F38.W0 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERDPS ymm1 {k1}, vm32y
EVEX.256.66.0F38.W0 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERDPS zmm1 {k1}, vm32z
EVEX.512.66.0F38.W0 92 /vsib
AVX512F
16/32/64-bit
VGATHERDPD xmm1 {k1}, vm32x
EVEX.128.66.0F38.W1 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERDPD ymm1 {k1}, vm32x
EVEX.256.66.0F38.W1 92 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERDPD zmm1 {k1}, vm32y
EVEX.512.66.0F38.W1 92 /vsib
AVX512F
16/32/64-bit
VGATHERQPS xmm1, vm64x, xmm2
VEX.128.66.0F38.W0 93 /r
AVX2
16/32/64-bit
VGATHERQPS xmm1, vm64y, xmm2
VEX.256.66.0F38.W0 93 /r
AVX2
16/32/64-bit
VGATHERQPD xmm1, vm64x, xmm2
VEX.128.66.0F38.W1 93 /r
AVX2
16/32/64-bit
VGATHERQPD ymm1, vm64y, ymm2
VEX.256.66.0F38.W1 93 /r
AVX2
16/32/64-bit
VGATHERQPS xmm1 {k1}, vm64x
EVEX.128.66.0F38.W0 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERQPS xmm1 {k1}, vm64y
EVEX.256.66.0F38.W0 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERQPS ymm1 {k1}, vm64z
EVEX.512.66.0F38.W0 93 /vsib
AVX512F
16/32/64-bit
VGATHERQPD xmm1 {k1}, vm64x
EVEX.128.66.0F38.W1 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERQPD ymm1 {k1}, vm64y
EVEX.256.66.0F38.W1 93 /vsib
AVX512VL and AVX512F
16/32/64-bit
VGATHERQPD zmm1 {k1}, vm64z
EVEX.512.66.0F38.W1 93 /vsib
AVX512F
16/32/64-bit
VFMADDSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 96 /r
FMA
16/32/64-bit
VFMADDSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 96 /r
FMA
16/32/64-bit
VFMADDSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 96 /r
FMA
16/32/64-bit
VFMADDSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 96 /r
FMA
16/32/64-bit
VFMADDSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 96 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 96 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 96 /r
AVX512F
16/32/64-bit
VFMADDSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 96 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 96 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 96 /r
AVX512F
16/32/64-bit
VFMSUBADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 97 /r
FMA
16/32/64-bit
VFMSUBADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 97 /r
FMA
16/32/64-bit
VFMSUBADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 97 /r
FMA
16/32/64-bit
VFMSUBADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 97 /r
FMA
16/32/64-bit
VFMSUBADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 97 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 97 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 97 /r
AVX512F
16/32/64-bit
VFMSUBADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 97 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 97 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 97 /r
AVX512F
16/32/64-bit
VFMADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 98 /r
FMA
16/32/64-bit
VFMADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 98 /r
FMA
16/32/64-bit
VFMADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 98 /r
FMA
16/32/64-bit
VFMADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 98 /r
FMA
16/32/64-bit
VFMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 98 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 98 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 98 /r
AVX512F
16/32/64-bit
VFMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 98 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 98 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 98 /r
AVX512F
16/32/64-bit
VFMADD132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 99 /r
FMA
16/32/64-bit
VFMADD132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 99 /r
FMA
16/32/64-bit
VFMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 99 /r
AVX512F
16/32/64-bit
VFMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 99 /r
AVX512F
16/32/64-bit
VFMSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9A /r
FMA
16/32/64-bit
VFMSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9A /r
FMA
16/32/64-bit
VFMSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9A /r
FMA
16/32/64-bit
VFMSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9A /r
FMA
16/32/64-bit
VFMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9A /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9A /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9A /r
AVX512F
16/32/64-bit
VFMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9A /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9A /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9A /r
AVX512F
16/32/64-bit
V4FMADDPS zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 9A /r
AVX512_4FMAPS
16/32/64-bit
VFMSUB132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9B /r
FMA
16/32/64-bit
VFMSUB132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9B /r
FMA
16/32/64-bit
VFMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9B /r
AVX512F
16/32/64-bit
VFMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9B /r
AVX512F
16/32/64-bit
V4FMADDSS xmm1 {k1}{z}, xmm2+3, m128
EVEX.LIG.F2.0F38.W0 9B /r
AVX512_4FMAPS
16/32/64-bit
VFNMADD132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9C /r
FMA
16/32/64-bit
VFNMADD132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9C /r
FMA
16/32/64-bit
VFNMADD132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9C /r
FMA
16/32/64-bit
VFNMADD132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9C /r
FMA
16/32/64-bit
VFNMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9C /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9C /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9C /r
AVX512F
16/32/64-bit
VFNMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9C /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9C /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9C /r
AVX512F
16/32/64-bit
VFNMADD132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9D /r
FMA
16/32/64-bit
VFNMADD132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9D /r
FMA
16/32/64-bit
VFNMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9D /r
AVX512F
16/32/64-bit
VFNMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9D /r
AVX512F
16/32/64-bit
VFNMSUB132PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 9E /r
FMA
16/32/64-bit
VFNMSUB132PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 9E /r
FMA
16/32/64-bit
VFNMSUB132PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 9E /r
FMA
16/32/64-bit
VFNMSUB132PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 9E /r
FMA
16/32/64-bit
VFNMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 9E /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 9E /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 9E /r
AVX512F
16/32/64-bit
VFNMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 9E /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 9E /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 9E /r
AVX512F
16/32/64-bit
VFNMSUB132SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 9F /r
FMA
16/32/64-bit
VFNMSUB132SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 9F /r
FMA
16/32/64-bit
VFNMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 9F /r
AVX512F
16/32/64-bit
VFNMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 9F /r
AVX512F
16/32/64-bit
VPSCATTERDD vm32x {k1}, xmm1
EVEX.128.66.0F38.W0 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERDD vm32y {k1}, ymm1
EVEX.256.66.0F38.W0 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERDD vm32z {k1}, zmm1
EVEX.512.66.0F38.W0 A0 /vsib
AVX512F
16/32/64-bit
VPSCATTERDQ vm32x {k1}, xmm1
EVEX.128.66.0F38.W1 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERDQ vm32x {k1}, ymm1
EVEX.256.66.0F38.W1 A0 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERDQ vm32y {k1}, zmm1
EVEX.512.66.0F38.W1 A0 /vsib
AVX512F
16/32/64-bit
VPSCATTERQD vm64x {k1}, xmm1
EVEX.128.66.0F38.W0 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERQD vm64y {k1}, xmm1
EVEX.256.66.0F38.W0 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERQD vm64z {k1}, ymm1
EVEX.512.66.0F38.W0 A1 /vsib
AVX512F
16/32/64-bit
VPSCATTERQQ vm64x {k1}, xmm1
EVEX.128.66.0F38.W1 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERQQ vm64y {k1}, ymm1
EVEX.256.66.0F38.W1 A1 /vsib
AVX512VL and AVX512F
16/32/64-bit
VPSCATTERQQ vm64z {k1}, zmm1
EVEX.512.66.0F38.W1 A1 /vsib
AVX512F
16/32/64-bit
VSCATTERDPS vm32x {k1}, xmm1
EVEX.128.66.0F38.W0 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERDPS vm32y {k1}, ymm1
EVEX.256.66.0F38.W0 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERDPS vm32z {k1}, zmm1
EVEX.512.66.0F38.W0 A2 /vsib
AVX512F
16/32/64-bit
VSCATTERDPD vm32x {k1}, xmm1
EVEX.128.66.0F38.W1 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERDPD vm32x {k1}, ymm1
EVEX.256.66.0F38.W1 A2 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERDPD vm32y {k1}, zmm1
EVEX.512.66.0F38.W1 A2 /vsib
AVX512F
16/32/64-bit
VSCATTERQPS vm64x {k1}, xmm1
EVEX.128.66.0F38.W0 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERQPS vm64y {k1}, xmm1
EVEX.256.66.0F38.W0 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERQPS vm64z {k1}, ymm1
EVEX.512.66.0F38.W0 A3 /vsib
AVX512F
16/32/64-bit
VSCATTERQPD vm64x {k1}, xmm1
EVEX.128.66.0F38.W1 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERQPD vm64y {k1}, ymm1
EVEX.256.66.0F38.W1 A3 /vsib
AVX512VL and AVX512F
16/32/64-bit
VSCATTERQPD vm64z {k1}, zmm1
EVEX.512.66.0F38.W1 A3 /vsib
AVX512F
16/32/64-bit
VFMADDSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A6 /r
FMA
16/32/64-bit
VFMADDSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A6 /r
AVX512F
16/32/64-bit
VFMADDSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A6 /r
AVX512F
16/32/64-bit
VFMSUBADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A7 /r
FMA
16/32/64-bit
VFMSUBADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A7 /r
AVX512F
16/32/64-bit
VFMSUBADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A7 /r
AVX512F
16/32/64-bit
VFMADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 A8 /r
FMA
16/32/64-bit
VFMADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 A8 /r
FMA
16/32/64-bit
VFMADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 A8 /r
FMA
16/32/64-bit
VFMADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 A8 /r
FMA
16/32/64-bit
VFMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 A8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 A8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 A8 /r
AVX512F
16/32/64-bit
VFMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 A8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 A8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 A8 /r
AVX512F
16/32/64-bit
VFMADD213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 A9 /r
FMA
16/32/64-bit
VFMADD213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 A9 /r
FMA
16/32/64-bit
VFMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 A9 /r
AVX512F
16/32/64-bit
VFMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 A9 /r
AVX512F
16/32/64-bit
VFMSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AA /r
FMA
16/32/64-bit
VFMSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AA /r
FMA
16/32/64-bit
VFMSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AA /r
FMA
16/32/64-bit
VFMSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AA /r
FMA
16/32/64-bit
VFMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AA /r
AVX512F
16/32/64-bit
VFMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AA /r
AVX512F
16/32/64-bit
V4FNMADDPS zmm1 {k1}{z}, zmm2+3, m128
EVEX.512.F2.0F38.W0 AA /r
AVX512_4FMAPS
16/32/64-bit
VFMSUB213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AB /r
FMA
16/32/64-bit
VFMSUB213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AB /r
FMA
16/32/64-bit
VFMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AB /r
AVX512F
16/32/64-bit
VFMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AB /r
AVX512F
16/32/64-bit
V4FNMADDSS xmm1 {k1}{z}, xmm2+3, m128
EVEX.LIG.F2.0F38.W0 AB /r
AVX512_4FMAPS
16/32/64-bit
VFNMADD213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AC /r
FMA
16/32/64-bit
VFNMADD213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AC /r
FMA
16/32/64-bit
VFNMADD213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AC /r
FMA
16/32/64-bit
VFNMADD213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AC /r
FMA
16/32/64-bit
VFNMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AC /r
AVX512F
16/32/64-bit
VFNMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AC /r
AVX512F
16/32/64-bit
VFNMADD213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AD /r
FMA
16/32/64-bit
VFNMADD213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AD /r
FMA
16/32/64-bit
VFNMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AD /r
AVX512F
16/32/64-bit
VFNMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AD /r
AVX512F
16/32/64-bit
VFNMSUB213PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 AE /r
FMA
16/32/64-bit
VFNMSUB213PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 AE /r
FMA
16/32/64-bit
VFNMSUB213PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 AE /r
FMA
16/32/64-bit
VFNMSUB213PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 AE /r
FMA
16/32/64-bit
VFNMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 AE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 AE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 AE /r
AVX512F
16/32/64-bit
VFNMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 AE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 AE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 AE /r
AVX512F
16/32/64-bit
VFNMSUB213SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 AF /r
FMA
16/32/64-bit
VFNMSUB213SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 AF /r
FMA
16/32/64-bit
VFNMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 AF /r
AVX512F
16/32/64-bit
VFNMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 AF /r
AVX512F
16/32/64-bit
VPMADD52LUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B4 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52LUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B4 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52LUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 B4 /r
AVX512_IFMA
16/32/64-bit
VPMADD52HUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B5 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52HUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B5 /r
AVX512VL and AVX512_IFMA
16/32/64-bit
VPMADD52HUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst
EVEX.512.66.0F38.W1 B5 /r
AVX512_IFMA
16/32/64-bit
VFMADDSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B6 /r
FMA
16/32/64-bit
VFMADDSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B6 /r
AVX512F
16/32/64-bit
VFMADDSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B6 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADDSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B6 /r
AVX512F
16/32/64-bit
VFMSUBADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B7 /r
FMA
16/32/64-bit
VFMSUBADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B7 /r
AVX512F
16/32/64-bit
VFMSUBADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B7 /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUBADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B7 /r
AVX512F
16/32/64-bit
VFMADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 B8 /r
FMA
16/32/64-bit
VFMADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 B8 /r
FMA
16/32/64-bit
VFMADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B8 /r
FMA
16/32/64-bit
VFMADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B8 /r
FMA
16/32/64-bit
VFMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 B8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 B8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 B8 /r
AVX512F
16/32/64-bit
VFMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 B8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 B8 /r
AVX512VL and AVX512F
16/32/64-bit
VFMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 B8 /r
AVX512F
16/32/64-bit
VFMADD231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 B9 /r
FMA
16/32/64-bit
VFMADD231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 B9 /r
FMA
16/32/64-bit
VFMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 B9 /r
AVX512F
16/32/64-bit
VFMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 B9 /r
AVX512F
16/32/64-bit
VFMSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BA /r
FMA
16/32/64-bit
VFMSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BA /r
FMA
16/32/64-bit
VFMSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BA /r
FMA
16/32/64-bit
VFMSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BA /r
FMA
16/32/64-bit
VFMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BA /r
AVX512F
16/32/64-bit
VFMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BA /r
AVX512VL and AVX512F
16/32/64-bit
VFMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BA /r
AVX512F
16/32/64-bit
VFMSUB231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BB /r
FMA
16/32/64-bit
VFMSUB231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BB /r
FMA
16/32/64-bit
VFMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BB /r
AVX512F
16/32/64-bit
VFMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BB /r
AVX512F
16/32/64-bit
VFNMADD231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BC /r
FMA
16/32/64-bit
VFNMADD231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BC /r
FMA
16/32/64-bit
VFNMADD231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BC /r
FMA
16/32/64-bit
VFNMADD231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BC /r
FMA
16/32/64-bit
VFNMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BC /r
AVX512F
16/32/64-bit
VFNMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BC /r
AVX512VL and AVX512F
16/32/64-bit
VFNMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BC /r
AVX512F
16/32/64-bit
VFNMADD231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BD /r
FMA
16/32/64-bit
VFNMADD231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BD /r
FMA
16/32/64-bit
VFNMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BD /r
AVX512F
16/32/64-bit
VFNMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BD /r
AVX512F
16/32/64-bit
VFNMSUB231PS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 BE /r
FMA
16/32/64-bit
VFNMSUB231PS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 BE /r
FMA
16/32/64-bit
VFNMSUB231PD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 BE /r
FMA
16/32/64-bit
VFNMSUB231PD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 BE /r
FMA
16/32/64-bit
VFNMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.66.0F38.W0 BE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.66.0F38.W0 BE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.66.0F38.W0 BE /r
AVX512F
16/32/64-bit
VFNMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst
EVEX.128.66.0F38.W1 BE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst
EVEX.256.66.0F38.W1 BE /r
AVX512VL and AVX512F
16/32/64-bit
VFNMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}
EVEX.512.66.0F38.W1 BE /r
AVX512F
16/32/64-bit
VFNMSUB231SS xmm1, xmm2, xmm3/m32
VEX.LIG.66.0F38.W0 BF /r
FMA
16/32/64-bit
VFNMSUB231SD xmm1, xmm2, xmm3/m64
VEX.LIG.66.0F38.W1 BF /r
FMA
16/32/64-bit
VFNMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.66.0F38.W0 BF /r
AVX512F
16/32/64-bit
VFNMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.66.0F38.W1 BF /r
AVX512F
16/32/64-bit
VPCONFLICTD xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.0F38.W0 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
VPCONFLICTD ymm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.0F38.W0 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
VPCONFLICTD zmm1 {k1}{z}, zmm2/m512/m32bcst
EVEX.512.66.0F38.W0 C4 /r
AVX512CD
16/32/64-bit
VPCONFLICTQ xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.0F38.W1 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
VPCONFLICTQ ymm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.0F38.W1 C4 /r
AVX512VL and AVX512CD
16/32/64-bit
VPCONFLICTQ zmm1 {k1}{z}, zmm2/m512/m64bcst
EVEX.512.66.0F38.W1 C4 /r
AVX512CD
16/32/64-bit
VGATHERPF0DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /1 /vsib
AVX512PF
16/32/64-bit
VGATHERPF0DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /1 /vsib
AVX512PF
16/32/64-bit
VGATHERPF1DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /2 /vsib
AVX512PF
16/32/64-bit
VGATHERPF1DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /2 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF0DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /5 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF0DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /5 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF1DPS vm32z {k1}
EVEX.512.66.0F38.W0 C6 /6 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF1DPD vm32y {k1}
EVEX.512.66.0F38.W1 C6 /6 /vsib
AVX512PF
16/32/64-bit
VGATHERPF0QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /1 /vsib
AVX512PF
16/32/64-bit
VGATHERPF0QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /1 /vsib
AVX512PF
16/32/64-bit
VGATHERPF1QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /2 /vsib
AVX512PF
16/32/64-bit
VGATHERPF1QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /2 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF0QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /5 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF0QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /5 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF1QPS vm64z {k1}
EVEX.512.66.0F38.W0 C7 /6 /vsib
AVX512PF
16/32/64-bit
VSCATTERPF1QPD vm64z {k1}
EVEX.512.66.0F38.W1 C7 /6 /vsib
AVX512PF
16/32/64-bit
SHA1NEXTE xmm1, xmm2/m128
NP 0F 38 C8 /r
SHA
16/32/64-bit
VEXP2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 C8 /r
AVX512ER
16/32/64-bit
VEXP2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 C8 /r
AVX512ER
16/32/64-bit
SHA1MSG1 xmm1, xmm2/m128
NP 0F 38 C9 /r
SHA
16/32/64-bit
SHA1MSG2 xmm1, xmm2/m128
NP 0F 38 CA /r
SHA
16/32/64-bit
VRCP28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 CA /r
AVX512ER
16/32/64-bit
VRCP28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 CA /r
AVX512ER
16/32/64-bit
SHA256RNDS2 xmm1, xmm2/m128, <XMM0>
NP 0F 38 CB /r
SHA
16/32/64-bit
VRCP28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 CB /r
AVX512ER
16/32/64-bit
VRCP28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 CB /r
AVX512ER
16/32/64-bit
SHA256MSG1 xmm1, xmm2/m128
NP 0F 38 CC /r
SHA
16/32/64-bit
VRSQRT28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}
EVEX.512.66.0F38.W0 CC /r
AVX512ER
16/32/64-bit
VRSQRT28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}
EVEX.512.66.0F38.W1 CC /r
AVX512ER
16/32/64-bit
SHA256MSG2 xmm1, xmm2/m128
NP 0F 38 CD /r
SHA
16/32/64-bit
VRSQRT28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}
EVEX.LIG.66.0F38.W0 CD /r
AVX512ER
16/32/64-bit
VRSQRT28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}
EVEX.LIG.66.0F38.W1 CD /r
AVX512ER
16/32/64-bit
GF2P8MULB xmm1, xmm2/m128
66 0F 38 CF /r
GFNI
16/32/64-bit
VGF2P8MULB xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 CF /r
AVX and GFNI
16/32/64-bit
VGF2P8MULB ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 CF /r
AVX and GFNI
16/32/64-bit
VGF2P8MULB xmm1 {k1}{z}, xmm2, xmm3/m128
EVEX.128.66.0F38.W0 CF /r
AVX512VL and GFNI
16/32/64-bit
VGF2P8MULB ymm1 {k1}{z}, ymm2, ymm3/m256
EVEX.256.66.0F38.W0 CF /r
AVX512VL and GFNI
16/32/64-bit
VGF2P8MULB zmm1 {k1}{z}, zmm2, zmm3/m512
EVEX.512.66.0F38.W0 CF /r
AVX512F and GFNI
16/32/64-bit
AESIMC xmm1, xmm2/m128
66 0F 38 DB /r
AES
16/32/64-bit
VAESIMC xmm1, xmm2/m128
VEX.128.66.0F38.WIG DB /r
AES and AVX
16/32/64-bit
AESENC xmm1, xmm2/m128
66 0F 38 DC /r
AES
16/32/64-bit
VAESENC xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DC /r
AES and AVX
16/32/64-bit
VAESENC ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DC /r
VAES
16/32/64-bit
VAESENC xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DC /r
AVX512VL and VAES
16/32/64-bit
VAESENC ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DC /r
AVX512VL and VAES
16/32/64-bit
VAESENC zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DC /r
AVX512F and VAES
16/32/64-bit
AESENCLAST xmm1, xmm2/m128
66 0F 38 DD /r
AES
16/32/64-bit
VAESENCLAST xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DD /r
AES and AVX
16/32/64-bit
VAESENCLAST ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DD /r
VAES
16/32/64-bit
VAESENCLAST xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DD /r
AVX512VL and VAES
16/32/64-bit
VAESENCLAST ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DD /r
AVX512VL and VAES
16/32/64-bit
VAESENCLAST zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DD /r
AVX512F and VAES
16/32/64-bit
AESDEC xmm1, xmm2/m128
66 0F 38 DE /r
AES
16/32/64-bit
VAESDEC xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DE /r
AES and AVX
16/32/64-bit
VAESDEC ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DE /r
VAES
16/32/64-bit
VAESDEC xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DE /r
AVX512VL and VAES
16/32/64-bit
VAESDEC ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DE /r
AVX512VL and VAES
16/32/64-bit
VAESDEC zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DE /r
AVX512F and VAES
16/32/64-bit
AESDECLAST xmm1, xmm2/m128
66 0F 38 DF /r
AES
16/32/64-bit
VAESDECLAST xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.WIG DF /r
AES and AVX
16/32/64-bit
VAESDECLAST ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.WIG DF /r
VAES
16/32/64-bit
VAESDECLAST xmm1, xmm2, xmm3/m128
EVEX.128.66.0F38.WIG DF /r
AVX512VL and VAES
16/32/64-bit
VAESDECLAST ymm1, ymm2, ymm3/m256
EVEX.256.66.0F38.WIG DF /r
AVX512VL and VAES
16/32/64-bit
VAESDECLAST zmm1, zmm2, zmm3/m512
EVEX.512.66.0F38.WIG DF /r
AVX512F and VAES
16/32/64-bit
MOVBE r16, m16
o16 0F 38 F0 /r
MOVBE
16/32/64-bit
MOVBE r32, m32
o32 0F 38 F0 /r
MOVBE
16/32/64-bit
MOVBE r64, m64
o64 0F 38 F0 /r
MOVBE
64-bit
CRC32 r32, r/m8
F2 0F 38 F0 /r
SSE4.2
16/32/64-bit
CRC32 r64, r/m8
F2 o64 0F 38 F0 /r
SSE4.2
64-bit
MOVBE m16, r16
o16 0F 38 F1 /r
MOVBE
16/32/64-bit
MOVBE m32, r32
o32 0F 38 F1 /r
MOVBE
16/32/64-bit
MOVBE m64, r64
o64 0F 38 F1 /r
MOVBE
64-bit
CRC32 r32, r/m16
o16 F2 0F 38 F1 /r
SSE4.2
16/32/64-bit
CRC32 r32, r/m32
o32 F2 0F 38 F1 /r
SSE4.2
16/32/64-bit
CRC32 r64, r/m64
F2 o64 0F 38 F1 /r
SSE4.2
64-bit
ANDN r32a, r32b, r/m32
VEX.LZ.0F38.W0 F2 /r
BMI1
16/32/64-bit
ANDN r64a, r64b, r/m64
VEX.LZ.0F38.W1 F2 /r
BMI1
64-bit
BLSR r32, r/m32
VEX.LZ.0F38.W0 F3 /1
BMI1
16/32/64-bit
BLSR r64, r/m64
VEX.LZ.0F38.W1 F3 /1
BMI1
64-bit
BLSMSK r32, r/m32
VEX.LZ.0F38.W0 F3 /2
BMI1
16/32/64-bit
BLSMSK r64, r/m64
VEX.LZ.0F38.W1 F3 /2
BMI1
64-bit
BLSI r32, r/m32
VEX.LZ.0F38.W0 F3 /3
BMI1
16/32/64-bit
BLSI r64, r/m64
VEX.LZ.0F38.W1 F3 /3
BMI1
64-bit
BZHI r32a, r/m32, r32b
VEX.LZ.0F38.W0 F5 /r
BMI2
16/32/64-bit
BZHI r64a, r/m64, r64b
VEX.LZ.0F38.W1 F5 /r
BMI2
64-bit
WRUSSD m32, r32
66 0F 38 F5 /r
CET_SS
16/32/64-bit
WRUSSQ m64, r64
66 o64 0F 38 F5 /r
CET_SS
64-bit
PEXT r32a, r32b, r/m32
VEX.LZ.F3.0F38.W0 F5 /r
BMI2
16/32/64-bit
PEXT r64a, r64b, r/m64
VEX.LZ.F3.0F38.W1 F5 /r
BMI2
64-bit
PDEP r32a, r32b, r/m32
VEX.LZ.F2.0F38.W0 F5 /r
BMI2
16/32/64-bit
PDEP r64a, r64b, r/m64
VEX.LZ.F2.0F38.W1 F5 /r
BMI2
64-bit
WRSSD m32, r32
NP 0F 38 F6 /r
CET_SS
16/32/64-bit
WRSSQ m64, r64
NP o64 0F 38 F6 /r
CET_SS
64-bit
ADCX r32, r/m32
66 0F 38 F6 /r
ADX
16/32/64-bit
ADCX r64, r/m64
66 o64 0F 38 F6 /r
ADX
64-bit
ADOX r32, r/m32
F3 0F 38 F6 /r
ADX
16/32/64-bit
ADOX r64, r/m64
F3 o64 0F 38 F6 /r
ADX
64-bit
MULX r32a, r32b, r/m32
VEX.LZ.F2.0F38.W0 F6 /r
BMI2
16/32/64-bit
MULX r64a, r64b, r/m64
VEX.LZ.F2.0F38.W1 F6 /r
BMI2
64-bit
BEXTR r32a, r/m32, r32b
VEX.LZ.0F38.W0 F7 /r
BMI1
16/32/64-bit
BEXTR r64a, r/m64, r64b
VEX.LZ.0F38.W1 F7 /r
BMI1
64-bit
SHLX r32a, r/m32, r32b
VEX.LZ.66.0F38.W0 F7 /r
BMI2
16/32/64-bit
SHLX r64a, r/m64, r64b
VEX.LZ.66.0F38.W1 F7 /r
BMI2
64-bit
SARX r32a, r/m32, r32b
VEX.LZ.F3.0F38.W0 F7 /r
BMI2
16/32/64-bit
SARX r64a, r/m64, r64b
VEX.LZ.F3.0F38.W1 F7 /r
BMI2
64-bit
SHRX r32a, r/m32, r32b
VEX.LZ.F2.0F38.W0 F7 /r
BMI2
16/32/64-bit
SHRX r64a, r/m64, r64b
VEX.LZ.F2.0F38.W1 F7 /r
BMI2
64-bit
MOVDIR64B r16, m512
a16 66 0F 38 F8 /r
MOVDIR64B
16/32-bit
MOVDIR64B r32, m512
a32 66 0F 38 F8 /r
MOVDIR64B
16/32/64-bit
MOVDIR64B r64, m512
a64 66 0F 38 F8 /r
MOVDIR64B
64-bit
ENQCMDS r16, m512
a16 F3 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32-bit
ENQCMDS r32, m512
a32 F3 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32/64-bit
ENQCMDS r64, m512
a64 F3 0F 38 F8 !(11):rrr:bbb
ENQCMD
64-bit
ENQCMD r16, m512
a16 F2 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32-bit
ENQCMD r32, m512
a32 F2 0F 38 F8 !(11):rrr:bbb
ENQCMD
16/32/64-bit
ENQCMD r64, m512
a64 F2 0F 38 F8 !(11):rrr:bbb
ENQCMD
64-bit
MOVDIRI m32, r32
NP 0F 38 F9 /r
MOVDIRI
16/32/64-bit
MOVDIRI m64, r64
NP o64 0F 38 F9 /r
MOVDIRI
64-bit
VPERMQ ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 00 /r ib
AVX2
16/32/64-bit
VPERMQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 00 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPERMQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 00 /r ib
AVX512F
16/32/64-bit
VPERMPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W1 01 /r ib
AVX2
16/32/64-bit
VPERMPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 01 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPERMPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 01 /r ib
AVX512F
16/32/64-bit
VPBLENDD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
VPBLENDD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 02 /r ib
AVX2
16/32/64-bit
VALIGND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
VALIGND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
VALIGND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 03 /r ib
AVX512F
16/32/64-bit
VALIGNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
VALIGNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 03 /r ib
AVX512VL and AVX512F
16/32/64-bit
VALIGNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 03 /r ib
AVX512F
16/32/64-bit
VPERMILPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 04 /r ib
AVX
16/32/64-bit
VPERMILPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPERMILPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 04 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPERMILPS zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 04 /r ib
AVX512F
16/32/64-bit
VPERMILPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.W0 05 /r ib
AVX
16/32/64-bit
VPERMILPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPERMILPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 05 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPERMILPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 05 /r ib
AVX512F
16/32/64-bit
VPERM2F128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 06 /r ib
AVX
16/32/64-bit
ROUNDPS xmm1, xmm2/m128, imm8
66 0F 3A 08 /r ib
SSE4.1
16/32/64-bit
VROUNDPS xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
VROUNDPS ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 08 /r ib
AVX
16/32/64-bit
VRNDSCALEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
VRNDSCALEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 08 /r ib
AVX512VL and AVX512F
16/32/64-bit
VRNDSCALEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 08 /r ib
AVX512F
16/32/64-bit
ROUNDPD xmm1, xmm2/m128, imm8
66 0F 3A 09 /r ib
SSE4.1
16/32/64-bit
VROUNDPD xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
VROUNDPD ymm1, ymm2/m256, imm8
VEX.256.66.0F3A.WIG 09 /r ib
AVX
16/32/64-bit
VRNDSCALEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
VRNDSCALEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 09 /r ib
AVX512VL and AVX512F
16/32/64-bit
VRNDSCALEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 09 /r ib
AVX512F
16/32/64-bit
ROUNDSS xmm1, xmm2/m32, imm8
66 0F 3A 0A /r ib
SSE4.1
16/32/64-bit
VROUNDSS xmm1, xmm2, xmm3/m32, imm8
VEX.LIG.66.0F3A.WIG 0A /r ib
AVX
16/32/64-bit
VRNDSCALESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 0A /r ib
AVX512F
16/32/64-bit
ROUNDSD xmm1, xmm2/m64, imm8
66 0F 3A 0B /r ib
SSE4.1
16/32/64-bit
VROUNDSD xmm1, xmm2, xmm3/m64, imm8
VEX.LIG.66.0F3A.WIG 0B /r ib
AVX
16/32/64-bit
VRNDSCALESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 0B /r ib
AVX512F
16/32/64-bit
BLENDPS xmm1, xmm2/m128, imm8
66 0F 3A 0C /r ib
SSE4.1
16/32/64-bit
VBLENDPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
VBLENDPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0C /r ib
AVX
16/32/64-bit
BLENDPD xmm1, xmm2/m128, imm8
66 0F 3A 0D /r ib
SSE4.1
16/32/64-bit
VBLENDPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
VBLENDPD ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0D /r ib
AVX
16/32/64-bit
PBLENDW xmm1, xmm2/m128, imm8
66 0F 3A 0E /r ib
SSE4.1
16/32/64-bit
VPBLENDW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0E /r ib
AVX
16/32/64-bit
VPBLENDW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0E /r ib
AVX2
16/32/64-bit
PALIGNR mm1, mm2/m64, imm8
NP 0F 3A 0F /r ib
SSSE3
16/32/64-bit
PALIGNR xmm1, xmm2/m128, imm8
66 0F 3A 0F /r ib
SSSE3
16/32/64-bit
VPALIGNR xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 0F /r ib
AVX
16/32/64-bit
VPALIGNR ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 0F /r ib
AVX2
16/32/64-bit
VPALIGNR xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPALIGNR ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 0F /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPALIGNR zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 0F /r ib
AVX512BW
16/32/64-bit
PEXTRB r32/m8, xmm2, imm8
66 0F 3A 14 /r ib
SSE4.1
16/32/64-bit
PEXTRB r64/m8, xmm2, imm8
66 o64 0F 3A 14 /r ib
SSE4.1
64-bit
VPEXTRB r32/m8, xmm2, imm8
VEX.128.66.0F3A.W0 14 /r ib
AVX
16/32/64-bit
VPEXTRB r64/m8, xmm2, imm8
VEX.128.66.0F3A.W1 14 /r ib
AVX
64-bit
VPEXTRB r32/m8, xmm2, imm8
EVEX.128.66.0F3A.W0 14 /r ib
AVX512BW
16/32/64-bit
VPEXTRB r64/m8, xmm2, imm8
EVEX.128.66.0F3A.W1 14 /r ib
AVX512BW
64-bit
PEXTRW r32/m16, xmm, imm8
66 0F 3A 15 /r ib
SSE4.1
16/32/64-bit
PEXTRW r64/m16, xmm, imm8
66 o64 0F 3A 15 /r ib
SSE4.1
64-bit
VPEXTRW r32/m16, xmm2, imm8
VEX.128.66.0F3A.W0 15 /r ib
AVX
16/32/64-bit
VPEXTRW r64/m16, xmm2, imm8
VEX.128.66.0F3A.W1 15 /r ib
AVX
64-bit
VPEXTRW r32/m16, xmm2, imm8
EVEX.128.66.0F3A.W0 15 /r ib
AVX512BW
16/32/64-bit
VPEXTRW r64/m16, xmm2, imm8
EVEX.128.66.0F3A.W1 15 /r ib
AVX512BW
64-bit
PEXTRD r/m32, xmm2, imm8
66 0F 3A 16 /r ib
SSE4.1
16/32/64-bit
PEXTRQ r/m64, xmm2, imm8
66 o64 0F 3A 16 /r ib
SSE4.1
64-bit
VPEXTRD r/m32, xmm2, imm8
VEX.128.66.0F3A.W0 16 /r ib
AVX
16/32/64-bit
VPEXTRQ r/m64, xmm2, imm8
VEX.128.66.0F3A.W1 16 /r ib
AVX
64-bit
VPEXTRD r/m32, xmm2, imm8
EVEX.128.66.0F3A.W0 16 /r ib
AVX512DQ
16/32/64-bit
VPEXTRQ r/m64, xmm2, imm8
EVEX.128.66.0F3A.W1 16 /r ib
AVX512DQ
64-bit
EXTRACTPS r/m32, xmm1, imm8
66 0F 3A 17 /r ib
SSE4.1
16/32/64-bit
EXTRACTPS r64/m32, xmm1, imm8
66 o64 0F 3A 17 /r ib
SSE4.1
64-bit
VEXTRACTPS r/m32, xmm1, imm8
VEX.128.66.0F3A.W0 17 /r ib
AVX
16/32/64-bit
VEXTRACTPS r64/m32, xmm1, imm8
VEX.128.66.0F3A.W1 17 /r ib
AVX
64-bit
VEXTRACTPS r/m32, xmm1, imm8
EVEX.128.66.0F3A.W0 17 /r ib
AVX512F
16/32/64-bit
VEXTRACTPS r64/m32, xmm1, imm8
EVEX.128.66.0F3A.W1 17 /r ib
AVX512F
64-bit
VINSERTF128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 18 /r ib
AVX
16/32/64-bit
VINSERTF32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 18 /r ib
AVX512VL and AVX512F
16/32/64-bit
VINSERTF32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 18 /r ib
AVX512F
16/32/64-bit
VINSERTF64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 18 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VINSERTF64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 18 /r ib
AVX512DQ
16/32/64-bit
VEXTRACTF128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 19 /r ib
AVX
16/32/64-bit
VEXTRACTF32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 19 /r ib
AVX512VL and AVX512F
16/32/64-bit
VEXTRACTF32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 19 /r ib
AVX512F
16/32/64-bit
VEXTRACTF64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 19 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VEXTRACTF64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 19 /r ib
AVX512DQ
16/32/64-bit
VINSERTF32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 1A /r ib
AVX512DQ
16/32/64-bit
VINSERTF64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 1A /r ib
AVX512F
16/32/64-bit
VEXTRACTF32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 1B /r ib
AVX512DQ
16/32/64-bit
VEXTRACTF64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 1B /r ib
AVX512F
16/32/64-bit
VCVTPS2PH xmm1/m64, xmm2, imm8
VEX.128.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 1D /r ib
F16C
16/32/64-bit
VCVTPS2PH xmm1/m64 {k1}{z}, xmm2, imm8
EVEX.128.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2PH xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 1D /r ib
AVX512VL and AVX512F
16/32/64-bit
VCVTPS2PH ymm1/m256 {k1}{z}, zmm2{sae}, imm8
EVEX.512.66.0F3A.W0 1D /r ib
AVX512F
16/32/64-bit
VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1E /r ib
AVX512F
16/32/64-bit
VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1E /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1E /r ib
AVX512F
16/32/64-bit
VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 1F /r ib
AVX512F
16/32/64-bit
VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 1F /r ib
AVX512VL and AVX512F
16/32/64-bit
VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 1F /r ib
AVX512F
16/32/64-bit
PINSRB xmm1, r32/m8, imm8
66 0F 3A 20 /r ib
SSE4.1
16/32/64-bit
PINSRB xmm1, r64/m8, imm8
66 o64 0F 3A 20 /r ib
SSE4.1
64-bit
VPINSRB xmm1, xmm2, r32/m8, imm8
VEX.128.66.0F3A.W0 20 /r ib
AVX
16/32/64-bit
VPINSRB xmm1, xmm2, r64/m8, imm8
VEX.128.66.0F3A.W1 20 /r ib
AVX
64-bit
VPINSRB xmm1, xmm2, r32/m8, imm8
EVEX.128.66.0F3A.W0 20 /r ib
AVX512BW
16/32/64-bit
VPINSRB xmm1, xmm2, r64/m8, imm8
EVEX.128.66.0F3A.W1 20 /r ib
AVX512BW
64-bit
INSERTPS xmm1, xmm2/m32, imm8
66 0F 3A 21 /r ib
SSE4.1
16/32/64-bit
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
VEX.128.66.0F3A.WIG 21 /r ib
AVX
16/32/64-bit
VINSERTPS xmm1, xmm2, xmm3/m32, imm8
EVEX.128.66.0F3A.W0 21 /r ib
AVX512F
16/32/64-bit
PINSRD xmm1, r/m32, imm8
66 0F 3A 22 /r ib
SSE4.1
16/32/64-bit
PINSRQ xmm1, r/m64, imm8
66 o64 0F 3A 22 /r ib
SSE4.1
64-bit
VPINSRD xmm1, xmm2, r/m32, imm8
VEX.128.66.0F3A.W0 22 /r ib
AVX
16/32/64-bit
VPINSRQ xmm1, xmm2, r/m64, imm8
VEX.128.66.0F3A.W1 22 /r ib
AVX
64-bit
VPINSRD xmm1, xmm2, r/m32, imm8
EVEX.128.66.0F3A.W0 22 /r ib
AVX512DQ
16/32/64-bit
VPINSRQ xmm1, xmm2, r/m64, imm8
EVEX.128.66.0F3A.W1 22 /r ib
AVX512DQ
64-bit
VSHUFF32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFF32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 23 /r ib
AVX512F
16/32/64-bit
VSHUFF64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 23 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFF64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 23 /r ib
AVX512F
16/32/64-bit
VPTERNLOGD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPTERNLOGD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPTERNLOGD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 25 /r ib
AVX512F
16/32/64-bit
VPTERNLOGQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPTERNLOGQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 25 /r ib
AVX512VL and AVX512F
16/32/64-bit
VPTERNLOGQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 25 /r ib
AVX512F
16/32/64-bit
VGETMANTPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
VGETMANTPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
VGETMANTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 26 /r ib
AVX512F
16/32/64-bit
VGETMANTPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
VGETMANTPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 26 /r ib
AVX512VL and AVX512F
16/32/64-bit
VGETMANTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 26 /r ib
AVX512F
16/32/64-bit
VGETMANTSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 27 /r ib
AVX512F
16/32/64-bit
VGETMANTSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 27 /r ib
AVX512F
16/32/64-bit
KSHIFTRB k1, k2, imm8
VEX.L0.66.0F3A.W0 30 /r ib
AVX512DQ
16/32/64-bit
KSHIFTRW k1, k2, imm8
VEX.L0.66.0F3A.W1 30 /r ib
AVX512F
16/32/64-bit
KSHIFTRD k1, k2, imm8
VEX.L0.66.0F3A.W0 31 /r ib
AVX512BW
16/32/64-bit
KSHIFTRQ k1, k2, imm8
VEX.L0.66.0F3A.W1 31 /r ib
AVX512BW
16/32/64-bit
KSHIFTLB k1, k2, imm8
VEX.L0.66.0F3A.W0 32 /r ib
AVX512DQ
16/32/64-bit
KSHIFTLW k1, k2, imm8
VEX.L0.66.0F3A.W1 32 /r ib
AVX512F
16/32/64-bit
KSHIFTLD k1, k2, imm8
VEX.L0.66.0F3A.W0 33 /r ib
AVX512BW
16/32/64-bit
KSHIFTLQ k1, k2, imm8
VEX.L0.66.0F3A.W1 33 /r ib
AVX512BW
16/32/64-bit
VINSERTI128 ymm1, ymm2, xmm3/m128, imm8
VEX.256.66.0F3A.W0 38 /r ib
AVX2
16/32/64-bit
VINSERTI32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W0 38 /r ib
AVX512VL and AVX512F
16/32/64-bit
VINSERTI32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W0 38 /r ib
AVX512F
16/32/64-bit
VINSERTI64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8
EVEX.256.66.0F3A.W1 38 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VINSERTI64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8
EVEX.512.66.0F3A.W1 38 /r ib
AVX512DQ
16/32/64-bit
VEXTRACTI128 xmm1/m128, ymm2, imm8
VEX.256.66.0F3A.W0 39 /r ib
AVX2
16/32/64-bit
VEXTRACTI32X4 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W0 39 /r ib
AVX512VL and AVX512F
16/32/64-bit
VEXTRACTI32X4 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 39 /r ib
AVX512F
16/32/64-bit
VEXTRACTI64X2 xmm1/m128 {k1}{z}, ymm2, imm8
EVEX.256.66.0F3A.W1 39 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VEXTRACTI64X2 xmm1/m128 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 39 /r ib
AVX512DQ
16/32/64-bit
VINSERTI32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W0 3A /r ib
AVX512DQ
16/32/64-bit
VINSERTI64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8
EVEX.512.66.0F3A.W1 3A /r ib
AVX512F
16/32/64-bit
VEXTRACTI32X8 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W0 3B /r ib
AVX512DQ
16/32/64-bit
VEXTRACTI64X4 ymm1/m256 {k1}{z}, zmm2, imm8
EVEX.512.66.0F3A.W1 3B /r ib
AVX512F
16/32/64-bit
VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3E /r ib
AVX512BW
16/32/64-bit
VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3E /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3E /r ib
AVX512BW
16/32/64-bit
VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 3F /r ib
AVX512BW
16/32/64-bit
VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 3F /r ib
AVX512VL and AVX512BW
16/32/64-bit
VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 3F /r ib
AVX512BW
16/32/64-bit
DPPS xmm1, xmm2/m128, imm8
66 0F 3A 40 /r ib
SSE4.1
16/32/64-bit
VDPPS xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
VDPPS ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 40 /r ib
AVX
16/32/64-bit
DPPD xmm1, xmm2/m128, imm8
66 0F 3A 41 /r ib
SSE4.1
16/32/64-bit
VDPPD xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 41 /r ib
AVX
16/32/64-bit
MPSADBW xmm1, xmm2/m128, imm8
66 0F 3A 42 /r ib
SSE4.1
16/32/64-bit
VMPSADBW xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 42 /r ib
AVX
16/32/64-bit
VMPSADBW ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 42 /r ib
AVX2
16/32/64-bit
VDBPSADBW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
VDBPSADBW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W0 42 /r ib
AVX512VL and AVX512BW
16/32/64-bit
VDBPSADBW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W0 42 /r ib
AVX512BW
16/32/64-bit
VSHUFI32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFI32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 43 /r ib
AVX512F
16/32/64-bit
VSHUFI64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 43 /r ib
AVX512VL and AVX512F
16/32/64-bit
VSHUFI64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 43 /r ib
AVX512F
16/32/64-bit
PCLMULQDQ xmm1, xmm2/m128, imm8
66 0F 3A 44 /r ib
PCLMULQDQ
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.WIG 44 /r ib
PCLMULQDQ and AVX
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.WIG 44 /r ib
VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.WIG 44 /r ib
AVX512VL and VPCLMULQDQ
16/32/64-bit
VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.WIG 44 /r ib
AVX512F and VPCLMULQDQ
16/32/64-bit
VPERM2I128 ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W0 46 /r ib
AVX2
16/32/64-bit
VPERMIL2PS xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
VPERMIL2PS ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 48 /r /is5
XOP
16/32/64-bit
VPERMIL2PS xmm1, xmm2, xmm3, xmm4/m128, imm4
VEX.128.66.0F3A.W1 48 /r /is5
XOP
16/32/64-bit
VPERMIL2PS ymm1, ymm2, ymm3, ymm4/m256, imm4
VEX.256.66.0F3A.W1 48 /r /is5
XOP
16/32/64-bit
VPERMIL2PD xmm1, xmm2, xmm3/m128, xmm4, imm4
VEX.128.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
VPERMIL2PD ymm1, ymm2, ymm3/m256, ymm4, imm4
VEX.256.66.0F3A.W0 49 /r /is5
XOP
16/32/64-bit
VPERMIL2PD xmm1, xmm2, xmm3, xmm4/m128, imm4
VEX.128.66.0F3A.W1 49 /r /is5
XOP
16/32/64-bit
VPERMIL2PD ymm1, ymm2, ymm3, ymm4/m256, imm4
VEX.256.66.0F3A.W1 49 /r /is5
XOP
16/32/64-bit
VBLENDVPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4A /r /is4
AVX
16/32/64-bit
VBLENDVPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4A /r /is4
AVX
16/32/64-bit
VBLENDVPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4B /r /is4
AVX
16/32/64-bit
VBLENDVPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4B /r /is4
AVX
16/32/64-bit
VPBLENDVB xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 4C /r /is4
AVX
16/32/64-bit
VPBLENDVB ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 4C /r /is4
AVX2
16/32/64-bit
VRANGEPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VRANGEPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VRANGEPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 50 /r ib
AVX512DQ
16/32/64-bit
VRANGEPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VRANGEPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 50 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VRANGEPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 50 /r ib
AVX512DQ
16/32/64-bit
VRANGESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 51 /r ib
AVX512DQ
16/32/64-bit
VRANGESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 51 /r ib
AVX512DQ
16/32/64-bit
VFIXUPIMMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
VFIXUPIMMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
VFIXUPIMMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 54 /r ib
AVX512F
16/32/64-bit
VFIXUPIMMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
VFIXUPIMMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 54 /r ib
AVX512VL and AVX512F
16/32/64-bit
VFIXUPIMMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 54 /r ib
AVX512F
16/32/64-bit
VFIXUPIMMSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 55 /r ib
AVX512F
16/32/64-bit
VFIXUPIMMSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 55 /r ib
AVX512F
16/32/64-bit
VREDUCEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VREDUCEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VREDUCEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8
EVEX.512.66.0F3A.W0 56 /r ib
AVX512DQ
16/32/64-bit
VREDUCEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VREDUCEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 56 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VREDUCEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8
EVEX.512.66.0F3A.W1 56 /r ib
AVX512DQ
16/32/64-bit
VREDUCESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8
EVEX.LIG.66.0F3A.W0 57 /r ib
AVX512DQ
16/32/64-bit
VREDUCESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8
EVEX.LIG.66.0F3A.W1 57 /r ib
AVX512DQ
16/32/64-bit
VFMADDSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5C /r /is4
FMA4
16/32/64-bit
VFMADDSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5C /r /is4
FMA4
16/32/64-bit
VFMADDSUBPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5C /r /is4
FMA4
16/32/64-bit
VFMADDSUBPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5C /r /is4
FMA4
16/32/64-bit
VFMADDSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5D /r /is4
FMA4
16/32/64-bit
VFMADDSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5D /r /is4
FMA4
16/32/64-bit
VFMADDSUBPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5D /r /is4
FMA4
16/32/64-bit
VFMADDSUBPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5D /r /is4
FMA4
16/32/64-bit
VFMSUBADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5E /r /is4
FMA4
16/32/64-bit
VFMSUBADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5E /r /is4
FMA4
16/32/64-bit
VFMSUBADDPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5E /r /is4
FMA4
16/32/64-bit
VFMSUBADDPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5E /r /is4
FMA4
16/32/64-bit
VFMSUBADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 5F /r /is4
FMA4
16/32/64-bit
VFMSUBADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 5F /r /is4
FMA4
16/32/64-bit
VFMSUBADDPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 5F /r /is4
FMA4
16/32/64-bit
VFMSUBADDPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 5F /r /is4
FMA4
16/32/64-bit
PCMPESTRM xmm1, xmm2/m128, imm8
66 0F 3A 60 /r ib
SSE4.2
16/32/64-bit
PCMPESTRM64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 60 /r ib
SSE4.2
64-bit
VPCMPESTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 60 /r ib
AVX
16/32/64-bit
VPCMPESTRM64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 60 /r ib
AVX
64-bit
PCMPESTRI xmm1, xmm2/m128, imm8
66 0F 3A 61 /r ib
SSE4.2
16/32/64-bit
PCMPESTRI64 xmm1, xmm2/m128, imm8
66 o64 0F 3A 61 /r ib
SSE4.2
64-bit
VPCMPESTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W0 61 /r ib
AVX
16/32/64-bit
VPCMPESTRI64 xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.W1 61 /r ib
AVX
64-bit
PCMPISTRM xmm1, xmm2/m128, imm8
66 0F 3A 62 /r ib
SSE4.2
16/32/64-bit
VPCMPISTRM xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 62 /r ib
AVX
16/32/64-bit
PCMPISTRI xmm1, xmm2/m128, imm8
66 0F 3A 63 /r ib
SSE4.2
16/32/64-bit
VPCMPISTRI xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG 63 /r ib
AVX
16/32/64-bit
VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 66 /r ib
AVX512DQ
16/32/64-bit
VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 66 /r ib
AVX512VL and AVX512DQ
16/32/64-bit
VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 66 /r ib
AVX512DQ
16/32/64-bit
VFPCLASSSS k2 {k1}, xmm2/m32, imm8
EVEX.LIG.66.0F3A.W0 67 /r ib
AVX512DQ
16/32/64-bit
VFPCLASSSD k2 {k1}, xmm2/m64, imm8
EVEX.LIG.66.0F3A.W1 67 /r ib
AVX512DQ
16/32/64-bit
VFMADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 68 /r /is4
FMA4
16/32/64-bit
VFMADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 68 /r /is4
FMA4
16/32/64-bit
VFMADDPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 68 /r /is4
FMA4
16/32/64-bit
VFMADDPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 68 /r /is4
FMA4
16/32/64-bit
VFMADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 69 /r /is4
FMA4
16/32/64-bit
VFMADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 69 /r /is4
FMA4
16/32/64-bit
VFMADDPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 69 /r /is4
FMA4
16/32/64-bit
VFMADDPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 69 /r /is4
FMA4
16/32/64-bit
VFMADDSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 6A /r /is4
FMA4
16/32/64-bit
VFMADDSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 6A /r /is4
FMA4
16/32/64-bit
VFMADDSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 6B /r /is4
FMA4
16/32/64-bit
VFMADDSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 6B /r /is4
FMA4
16/32/64-bit
VFMSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 6C /r /is4
FMA4
16/32/64-bit
VFMSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 6C /r /is4
FMA4
16/32/64-bit
VFMSUBPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 6C /r /is4
FMA4
16/32/64-bit
VFMSUBPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 6C /r /is4
FMA4
16/32/64-bit
VFMSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 6D /r /is4
FMA4
16/32/64-bit
VFMSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 6D /r /is4
FMA4
16/32/64-bit
VFMSUBPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 6D /r /is4
FMA4
16/32/64-bit
VFMSUBPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 6D /r /is4
FMA4
16/32/64-bit
VFMSUBSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 6E /r /is4
FMA4
16/32/64-bit
VFMSUBSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 6E /r /is4
FMA4
16/32/64-bit
VFMSUBSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 6F /r /is4
FMA4
16/32/64-bit
VFMSUBSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 6F /r /is4
FMA4
16/32/64-bit
VPSHLDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 70 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 70 /r ib
AVX512_VBMI2
16/32/64-bit
VPSHLDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 71 /r ib
AVX512_VBMI2
16/32/64-bit
VPSHLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 71 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 71 /r ib
AVX512_VBMI2
16/32/64-bit
VPSHRDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8
EVEX.128.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8
EVEX.256.66.0F3A.W1 72 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8
EVEX.512.66.0F3A.W1 72 /r ib
AVX512_VBMI2
16/32/64-bit
VPSHRDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8
EVEX.128.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8
EVEX.256.66.0F3A.W0 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8
EVEX.512.66.0F3A.W0 73 /r ib
AVX512_VBMI2
16/32/64-bit
VPSHRDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 73 /r ib
AVX512VL and AVX512_VBMI2
16/32/64-bit
VPSHRDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 73 /r ib
AVX512_VBMI2
16/32/64-bit
VFNMADDPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 78 /r /is4
FMA4
16/32/64-bit
VFNMADDPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 78 /r /is4
FMA4
16/32/64-bit
VFNMADDPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 78 /r /is4
FMA4
16/32/64-bit
VFNMADDPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 78 /r /is4
FMA4
16/32/64-bit
VFNMADDPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 79 /r /is4
FMA4
16/32/64-bit
VFNMADDPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 79 /r /is4
FMA4
16/32/64-bit
VFNMADDPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 79 /r /is4
FMA4
16/32/64-bit
VFNMADDPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 79 /r /is4
FMA4
16/32/64-bit
VFNMADDSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 7A /r /is4
FMA4
16/32/64-bit
VFNMADDSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 7A /r /is4
FMA4
16/32/64-bit
VFNMADDSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 7B /r /is4
FMA4
16/32/64-bit
VFNMADDSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 7B /r /is4
FMA4
16/32/64-bit
VFNMSUBPS xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 7C /r /is4
FMA4
16/32/64-bit
VFNMSUBPS ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 7C /r /is4
FMA4
16/32/64-bit
VFNMSUBPS xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 7C /r /is4
FMA4
16/32/64-bit
VFNMSUBPS ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 7C /r /is4
FMA4
16/32/64-bit
VFNMSUBPD xmm1, xmm2, xmm3/m128, xmm4
VEX.128.66.0F3A.W0 7D /r /is4
FMA4
16/32/64-bit
VFNMSUBPD ymm1, ymm2, ymm3/m256, ymm4
VEX.256.66.0F3A.W0 7D /r /is4
FMA4
16/32/64-bit
VFNMSUBPD xmm1, xmm2, xmm3, xmm4/m128
VEX.128.66.0F3A.W1 7D /r /is4
FMA4
16/32/64-bit
VFNMSUBPD ymm1, ymm2, ymm3, ymm4/m256
VEX.256.66.0F3A.W1 7D /r /is4
FMA4
16/32/64-bit
VFNMSUBSS xmm1, xmm2, xmm3/m32, xmm4
VEX.LIG.66.0F3A.W0 7E /r /is4
FMA4
16/32/64-bit
VFNMSUBSS xmm1, xmm2, xmm3, xmm4/m32
VEX.LIG.66.0F3A.W1 7E /r /is4
FMA4
16/32/64-bit
VFNMSUBSD xmm1, xmm2, xmm3/m64, xmm4
VEX.LIG.66.0F3A.W0 7F /r /is4
FMA4
16/32/64-bit
VFNMSUBSD xmm1, xmm2, xmm3, xmm4/m64
VEX.LIG.66.0F3A.W1 7F /r /is4
FMA4
16/32/64-bit
SHA1RNDS4 xmm1, xmm2/m128, imm8
NP 0F 3A CC /r ib
SHA
16/32/64-bit
GF2P8AFFINEQB xmm1, xmm2/m128, imm8
66 0F 3A CE /r ib
GFNI
16/32/64-bit
VGF2P8AFFINEQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CE /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
VGF2P8AFFINEQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CE /r ib
AVX512VL and GFNI
16/32/64-bit
VGF2P8AFFINEQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CE /r ib
AVX512F and GFNI
16/32/64-bit
GF2P8AFFINEINVQB xmm1, xmm2/m128, imm8
66 0F 3A CF /r ib
GFNI
16/32/64-bit
VGF2P8AFFINEINVQB xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB ymm1, ymm2, ymm3/m256, imm8
VEX.256.66.0F3A.W1 CF /r ib
AVX and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8
EVEX.128.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8
EVEX.256.66.0F3A.W1 CF /r ib
AVX512VL and GFNI
16/32/64-bit
VGF2P8AFFINEINVQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8
EVEX.512.66.0F3A.W1 CF /r ib
AVX512F and GFNI
16/32/64-bit
AESKEYGENASSIST xmm1, xmm2/m128, imm8
66 0F 3A DF /r ib
AES
16/32/64-bit
VAESKEYGENASSIST xmm1, xmm2/m128, imm8
VEX.128.66.0F3A.WIG DF /r ib
AES and AVX
16/32/64-bit
RORX r32, r/m32, imm8
VEX.LZ.F2.0F3A.W0 F0 /r ib
BMI2
16/32/64-bit
RORX r64, r/m64, imm8
VEX.LZ.F2.0F3A.W1 F0 /r ib
BMI2
64-bit
VPMACSSWW xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 85 /r /is4
XOP
16/32/64-bit
VPMACSSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 86 /r /is4
XOP
16/32/64-bit
VPMACSSDQL xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 87 /r /is4
XOP
16/32/64-bit
VPMACSSDD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 8E /r /is4
XOP
16/32/64-bit
VPMACSSDQH xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 8F /r /is4
XOP
16/32/64-bit
VPMACSWW xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 95 /r /is4
XOP
16/32/64-bit
VPMACSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 96 /r /is4
XOP
16/32/64-bit
VPMACSDQL xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 97 /r /is4
XOP
16/32/64-bit
VPMACSDD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 9E /r /is4
XOP
16/32/64-bit
VPMACSDQH xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 9F /r /is4
XOP
16/32/64-bit
VPCMOV xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A2 /r /is4
XOP
16/32/64-bit
VPCMOV ymm1, ymm2, ymm3/m256, ymm4
XOP.256.X8.W0 A2 /r /is4
XOP
16/32/64-bit
VPCMOV xmm1, xmm2, xmm3, xmm4/m128
XOP.128.X8.W1 A2 /r /is4
XOP
16/32/64-bit
VPCMOV ymm1, ymm2, ymm3, ymm4/m256
XOP.256.X8.W1 A2 /r /is4
XOP
16/32/64-bit
VPPERM xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A3 /r /is4
XOP
16/32/64-bit
VPPERM xmm1, xmm2, xmm3, xmm4/m128
XOP.128.X8.W1 A3 /r /is4
XOP
16/32/64-bit
VPMADCSSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 A6 /r /is4
XOP
16/32/64-bit
VPMADCSWD xmm1, xmm2, xmm3/m128, xmm4
XOP.128.X8.W0 B6 /r /is4
XOP
16/32/64-bit
VPROTB xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C0 /r ib
XOP
16/32/64-bit
VPROTW xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C1 /r ib
XOP
16/32/64-bit
VPROTD xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C2 /r ib
XOP
16/32/64-bit
VPROTQ xmm1, xmm2/m128, imm8
XOP.128.X8.W0 C3 /r ib
XOP
16/32/64-bit
VPCOMB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CC /r ib
XOP
16/32/64-bit
VPCOMW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CD /r ib
XOP
16/32/64-bit
VPCOMD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CE /r ib
XOP
16/32/64-bit
VPCOMQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 CF /r ib
XOP
16/32/64-bit
VPCOMUB xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EC /r ib
XOP
16/32/64-bit
VPCOMUW xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 ED /r ib
XOP
16/32/64-bit
VPCOMUD xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EE /r ib
XOP
16/32/64-bit
VPCOMUQ xmm1, xmm2, xmm3/m128, imm8
XOP.128.X8.W0 EF /r ib
XOP
16/32/64-bit
BLCFILL r32, r/m32
XOP.L0.X9.W0 01 /1
TBM
16/32/64-bit
BLCFILL r64, r/m64
XOP.L0.X9.W1 01 /1
TBM
64-bit
BLSFILL r32, r/m32
XOP.L0.X9.W0 01 /2
TBM
16/32/64-bit
BLSFILL r64, r/m64
XOP.L0.X9.W1 01 /2
TBM
64-bit
BLCS r32, r/m32
XOP.L0.X9.W0 01 /3
TBM
16/32/64-bit
BLCS r64, r/m64
XOP.L0.X9.W1 01 /3
TBM
64-bit
TZMSK r32, r/m32
XOP.L0.X9.W0 01 /4
TBM
16/32/64-bit
TZMSK r64, r/m64
XOP.L0.X9.W1 01 /4
TBM
64-bit
BLCIC r32, r/m32
XOP.L0.X9.W0 01 /5
TBM
16/32/64-bit
BLCIC r64, r/m64
XOP.L0.X9.W1 01 /5
TBM
64-bit
BLSIC r32, r/m32
XOP.L0.X9.W0 01 /6
TBM
16/32/64-bit
BLSIC r64, r/m64
XOP.L0.X9.W1 01 /6
TBM
64-bit
T1MSKC r32, r/m32
XOP.L0.X9.W0 01 /7
TBM
16/32/64-bit
T1MSKC r64, r/m64
XOP.L0.X9.W1 01 /7
TBM
64-bit
BLCMSK r32, r/m32
XOP.L0.X9.W0 02 /1
TBM
16/32/64-bit
BLCMSK r64, r/m64
XOP.L0.X9.W1 02 /1
TBM
64-bit
BLCI r32, r/m32
XOP.L0.X9.W0 02 /6
TBM
16/32/64-bit
BLCI r64, r/m64
XOP.L0.X9.W1 02 /6
TBM
64-bit
LLWPCB r32
XOP.L0.X9.W0 12 /0
LWP
16/32/64-bit
LLWPCB r64
XOP.L0.X9.W1 12 /0
LWP
64-bit
SLWPCB r32
XOP.L0.X9.W0 12 /1
LWP
16/32/64-bit
SLWPCB r64
XOP.L0.X9.W1 12 /1
LWP
64-bit
VFRCZPS xmm1, xmm2/m128
XOP.128.X9.W0 80 /r
XOP
16/32/64-bit
VFRCZPS ymm1, ymm2/m256
XOP.256.X9.W0 80 /r
XOP
16/32/64-bit
VFRCZPD xmm1, xmm2/m128
XOP.128.X9.W0 81 /r
XOP
16/32/64-bit
VFRCZPD ymm1, ymm2/m256
XOP.256.X9.W0 81 /r
XOP
16/32/64-bit
VFRCZSS xmm1, xmm2/m32
XOP.128.X9.W0 82 /r
XOP
16/32/64-bit
VFRCZSD xmm1, xmm2/m64
XOP.128.X9.W0 83 /r
XOP
16/32/64-bit
VPROTB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 90 /r
XOP
16/32/64-bit
VPROTB xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 90 /r
XOP
16/32/64-bit
VPROTW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 91 /r
XOP
16/32/64-bit
VPROTW xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 91 /r
XOP
16/32/64-bit
VPROTD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 92 /r
XOP
16/32/64-bit
VPROTD xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 92 /r
XOP
16/32/64-bit
VPROTQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 93 /r
XOP
16/32/64-bit
VPROTQ xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 93 /r
XOP
16/32/64-bit
VPSHLB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 94 /r
XOP
16/32/64-bit
VPSHLB xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 94 /r
XOP
16/32/64-bit
VPSHLW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 95 /r
XOP
16/32/64-bit
VPSHLW xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 95 /r
XOP
16/32/64-bit
VPSHLD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 96 /r
XOP
16/32/64-bit
VPSHLD xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 96 /r
XOP
16/32/64-bit
VPSHLQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 97 /r
XOP
16/32/64-bit
VPSHLQ xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 97 /r
XOP
16/32/64-bit
VPSHAB xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 98 /r
XOP
16/32/64-bit
VPSHAB xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 98 /r
XOP
16/32/64-bit
VPSHAW xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 99 /r
XOP
16/32/64-bit
VPSHAW xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 99 /r
XOP
16/32/64-bit
VPSHAD xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 9A /r
XOP
16/32/64-bit
VPSHAD xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 9A /r
XOP
16/32/64-bit
VPSHAQ xmm1, xmm2/m128, xmm3
XOP.128.X9.W0 9B /r
XOP
16/32/64-bit
VPSHAQ xmm1, xmm2, xmm3/m128
XOP.128.X9.W1 9B /r
XOP
16/32/64-bit
VPHADDBW xmm1, xmm2/m128
XOP.128.X9.W0 C1 /r
XOP
16/32/64-bit
VPHADDBD xmm1, xmm2/m128
XOP.128.X9.W0 C2 /r
XOP
16/32/64-bit
VPHADDBQ xmm1, xmm2/m128
XOP.128.X9.W0 C3 /r
XOP
16/32/64-bit
VPHADDWD xmm1, xmm2/m128
XOP.128.X9.W0 C6 /r
XOP
16/32/64-bit
VPHADDWQ xmm1, xmm2/m128
XOP.128.X9.W0 C7 /r
XOP
16/32/64-bit
VPHADDDQ xmm1, xmm2/m128
XOP.128.X9.W0 CB /r
XOP
16/32/64-bit
VPHADDUBW xmm1, xmm2/m128
XOP.128.X9.W0 D1 /r
XOP
16/32/64-bit
VPHADDUBD xmm1, xmm2/m128
XOP.128.X9.W0 D2 /r
XOP
16/32/64-bit
VPHADDUBQ xmm1, xmm2/m128
XOP.128.X9.W0 D3 /r
XOP
16/32/64-bit
VPHADDUWD xmm1, xmm2/m128
XOP.128.X9.W0 D6 /r
XOP
16/32/64-bit
VPHADDUWQ xmm1, xmm2/m128
XOP.128.X9.W0 D7 /r
XOP
16/32/64-bit
VPHADDUDQ xmm1, xmm2/m128
XOP.128.X9.W0 DB /r
XOP
16/32/64-bit
VPHSUBBW xmm1, xmm2/m128
XOP.128.X9.W0 E1 /r
XOP
16/32/64-bit
VPHSUBWD xmm1, xmm2/m128
XOP.128.X9.W0 E2 /r
XOP
16/32/64-bit
VPHSUBDQ xmm1, xmm2/m128
XOP.128.X9.W0 E3 /r
XOP
16/32/64-bit
BEXTR r32, r/m32, imm32
XOP.L0.XA.W0 10 /r id
TBM
16/32/64-bit
BEXTR r64, r/m64, imm32
XOP.L0.XA.W1 10 /r id
TBM
64-bit
LWPINS r32, r/m32, imm32
XOP.L0.XA.W0 12 /0 id
LWP
16/32/64-bit
LWPINS r64, r/m32, imm32
XOP.L0.XA.W1 12 /0 id
LWP
64-bit
LWPVAL r32, r/m32, imm32
XOP.L0.XA.W0 12 /1 id
LWP
16/32/64-bit
LWPVAL r64, r/m32, imm32
XOP.L0.XA.W1 12 /1 id
LWP
64-bit
PI2FW mm, mm/m64
0F 0F /r 0C
3DNOWEXT
16/32/64-bit
PI2FD mm, mm/m64
0F 0F /r 0D
3DNOW
16/32/64-bit
PF2IW mm, mm/m64
0F 0F /r 1C
3DNOWEXT
16/32/64-bit
PF2ID mm, mm/m64
0F 0F /r 1D
3DNOW
16/32/64-bit
PFRCPV mm, mm/m64
0F 0F /r 86
AMD Geode GX/LX
16/32-bit
PFRSQRTV mm, mm/m64
0F 0F /r 87
AMD Geode GX/LX
16/32-bit
PFNACC mm, mm/m64
0F 0F /r 8A
3DNOWEXT
16/32/64-bit
PFPNACC mm, mm/m64
0F 0F /r 8E
3DNOWEXT
16/32/64-bit
PFCMPGE mm, mm/m64
0F 0F /r 90
3DNOW
16/32/64-bit
PFMIN mm, mm/m64
0F 0F /r 94
3DNOW
16/32/64-bit
PFRCP mm, mm/m64
0F 0F /r 96
3DNOW
16/32/64-bit
PFRSQRT mm, mm/m64
0F 0F /r 97
3DNOW
16/32/64-bit
PFSUB mm, mm/m64
0F 0F /r 9A
3DNOW
16/32/64-bit
PFADD mm, mm/m64
0F 0F /r 9E
3DNOW
16/32/64-bit
PFCMPGT mm, mm/m64
0F 0F /r A0
3DNOW
16/32/64-bit
PFMAX mm, mm/m64
0F 0F /r A4
3DNOW
16/32/64-bit
PFRCPIT1 mm, mm/m64
0F 0F /r A6
3DNOW
16/32/64-bit
PFRSQIT1 mm, mm/m64
0F 0F /r A7
3DNOW
16/32/64-bit
PFSUBR mm, mm/m64
0F 0F /r AA
3DNOW
16/32/64-bit
PFACC mm, mm/m64
0F 0F /r AE
3DNOW
16/32/64-bit
PFCMPEQ mm, mm/m64
0F 0F /r B0
3DNOW
16/32/64-bit
PFMUL mm, mm/m64
0F 0F /r B4
3DNOW
16/32/64-bit
PFRCPIT2 mm, mm/m64
0F 0F /r B6
3DNOW
16/32/64-bit
PMULHRW mm, mm/m64
0F 0F /r B7
3DNOW
16/32/64-bit
PSWAPD mm, mm/m64
0F 0F /r BB
3DNOWEXT
16/32/64-bit
PAVGUSB mm, mm/m64
0F 0F /r BF
3DNOW
16/32/64-bit
RMPADJUST
F3 0F 01 FE
SEV-SNP
64-bit
RMPUPDATE
F2 0F 01 FE
SEV-SNP
64-bit
PSMASH
F3 0F 01 FF
SEV-SNP
64-bit
PVALIDATE
a16 F2 0F 01 FF
SEV-SNP
16/32-bit
PVALIDATE
a32 F2 0F 01 FF
SEV-SNP
16/32/64-bit
PVALIDATE
a64 F2 0F 01 FF
SEV-SNP
64-bit
SERIALIZE
NP 0F 01 E8
SERIALIZE
16/32/64-bit
XSUSLDTRK
F2 0F 01 E8
TSXLDTRK
16/32/64-bit
XRESLDTRK
F2 0F 01 E9
TSXLDTRK
16/32/64-bit
INVLPGB
a16 NP 0F 01 FE
INVLPGB
16/32-bit
INVLPGB
a32 NP 0F 01 FE
INVLPGB
16/32/64-bit
INVLPGB
a64 NP 0F 01 FE
INVLPGB
64-bit
TLBSYNC
NP 0F 01 FF
INVLPGB
16/32/64-bit
PREFETCHW m8
0F 0D /3
PREFETCHW
16/32/64-bit
PREFETCH m8
0F 0D /4
PREFETCHW
16/32/64-bit
PREFETCH m8
0F 0D /5
PREFETCHW
16/32/64-bit
PREFETCH m8
0F 0D /6
PREFETCHW
16/32/64-bit
PREFETCH m8
0F 0D /7
PREFETCHW
16/32/64-bit
UD0
0F FF
286+
16/32/64-bit
VMGEXIT
F3 0F 01 D9
SEV-ES
16/32/64-bit
GETSECQ
NP o64 0F 37
SMX
64-bit
LDTILECFG m512
VEX.128.0F38.W0 49 !(11):000:bbb
AMX-TILE
64-bit
TILERELEASE
VEX.128.0F38.W0 49 C0
AMX-TILE
64-bit
STTILECFG m512
VEX.128.66.0F38.W0 49 !(11):000:bbb
AMX-TILE
64-bit
TILEZERO tmm1
VEX.128.F2.0F38.W0 49 11:rrr:000
AMX-TILE
64-bit
TILELOADDT1 tmm1, sibmem
VEX.128.66.0F38.W0 4B !(11):rrr:100
AMX-TILE
64-bit
TILESTORED sibmem, tmm1
VEX.128.F3.0F38.W0 4B !(11):rrr:100
AMX-TILE
64-bit
TILELOADD tmm1, sibmem
VEX.128.F2.0F38.W0 4B !(11):rrr:100
AMX-TILE
64-bit
TDPBF16PS tmm1, tmm2, tmm3
VEX.128.F3.0F38.W0 5C 11:rrr:bbb
AMX-BF16
64-bit
TDPBUUD tmm1, tmm2, tmm3
VEX.128.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
TDPBUSD tmm1, tmm2, tmm3
VEX.128.66.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
TDPBSUD tmm1, tmm2, tmm3
VEX.128.F3.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
TDPBSSD tmm1, tmm2, tmm3
VEX.128.F2.0F38.W0 5E 11:rrr:bbb
AMX-INT8
64-bit
FNSTDW AX
DF E1
387 SL
16/32-bit
FNSTSG AX
DF E2
387 SL
16/32-bit
RDSHR r/m32
0F 36 /0
Cyrix 6x86MX, M II, III
16/32-bit
WRSHR r/m32
0F 37 /0
Cyrix 6x86MX, M II, III
16/32-bit
SMINT
0F 38
Cyrix 6x86MX+, AMD Geode GX/LX
16/32-bit
DMINT
0F 39
AMD Geode GX/LX
16/32-bit
RDM
0F 3A
AMD Geode GX/LX
16/32-bit
SVDC m80, Sreg
0F 78 /r
Cyrix, AMD Geode GX/LX
16/32-bit
RSDC Sreg, m80
0F 79 /r
Cyrix, AMD Geode GX/LX
16/32-bit
SVLDT m80
0F 7A /0
Cyrix, AMD Geode GX/LX
16/32-bit
RSLDT m80
0F 7B /0
Cyrix, AMD Geode GX/LX
16/32-bit
SVTS m80
0F 7C /0
Cyrix, AMD Geode GX/LX
16/32-bit
RSTS m80
0F 7D /0
Cyrix, AMD Geode GX/LX
16/32-bit
SMINT
0F 7E
Cyrix 6x86 or earlier
16/32-bit
BB0_RESET
0F 3A
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
BB1_RESET
0F 3B
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
CPU_WRITE
0F 3C
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
CPU_READ
0F 3D
Cyrix MediaGX, GXm, GXLV, GX1
16/32-bit
ALTINST
0F 3F
Centaur AIS
16/32-bit
PAVEB mm, mm/m64
0F 50 /r
CYRIX_EMMI
16/32-bit
PADDSIW mm, mm/m64
0F 51 /r
CYRIX_EMMI
16/32-bit
PMAGW mm, mm/m64
0F 52 /r
CYRIX_EMMI
16/32-bit
PDISTIB mm, m64
0F 54 /r
CYRIX_EMMI
16/32-bit
PSUBSIW mm, mm/m64
0F 55 /r
CYRIX_EMMI
16/32-bit
PMVZB mm, m64
0F 58 /r
CYRIX_EMMI
16/32-bit
PMULHRW mm, mm/m64
0F 59 /r
CYRIX_EMMI
16/32-bit
PMVNZB mm, m64
0F 5A /r
CYRIX_EMMI
16/32-bit
PMVLZB mm, m64
0F 5B /r
CYRIX_EMMI
16/32-bit
PMVGEZB mm, m64
0F 5C /r
CYRIX_EMMI
16/32-bit
PMULHRIW mm, mm/m64
0F 5D /r
CYRIX_EMMI
16/32-bit
PMACHRIW mm, m64
0F 5E /r
CYRIX_EMMI
16/32-bit
UNDOC
D9 D7
Cyrix, AMD Geode GX/LX
16/32-bit
UNDOC
D9 E2
Cyrix, AMD Geode GX/LX
16/32-bit
FTSTP
D9 E6
Cyrix, AMD Geode GX/LX
16/32-bit
UNDOC
D9 E7
Cyrix, AMD Geode GX/LX
16/32-bit
FRINT2
DB FC
Cyrix, AMD Geode GX/LX
16/32-bit
FRICHOP
DD FC
Cyrix, AMD Geode GX/LX
16/32-bit
UNDOC
DE D8
Cyrix, AMD Geode GX/LX
16/32-bit
UNDOC
DE DA
Cyrix, AMD Geode GX/LX
16/32-bit
UNDOC
DE DC
Cyrix, AMD Geode GX/LX
16/32-bit
UNDOC
DE DD
Cyrix, AMD Geode GX/LX
16/32-bit
UNDOC
DE DE
Cyrix, AMD Geode GX/LX
16/32-bit
FRINEAR
DF FC
Cyrix, AMD Geode GX/LX
16/32-bit
TDCALL
66 0F 01 CC
TDX
16/32/64-bit
SEAMRET
66 0F 01 CD
TDX
64-bit
SEAMOPS
66 0F 01 CE
TDX
64-bit
SEAMCALL
66 0F 01 CF
TDX
64-bit
AESENCWIDE128KL m384, <XMM0-7>
F3 0F 38 D8 !(11):000:bbb
AESKLE and WIDE_KL
16/32/64-bit
AESDECWIDE128KL m384, <XMM0-7>
F3 0F 38 D8 !(11):001:bbb
AESKLE and WIDE_KL
16/32/64-bit
AESENCWIDE256KL m512, <XMM0-7>
F3 0F 38 D8 !(11):010:bbb
AESKLE and WIDE_KL
16/32/64-bit
AESDECWIDE256KL m512, <XMM0-7>
F3 0F 38 D8 !(11):011:bbb
AESKLE and WIDE_KL
16/32/64-bit
LOADIWKEY xmm1, xmm2, <EAX>, <XMM0>
F3 0F 38 DC 11:rrr:bbb
KL
16/32/64-bit
AESENC128KL xmm, m384
F3 0F 38 DC !(11):rrr:bbb
AESKLE
16/32/64-bit
AESDEC128KL xmm, m384
F3 0F 38 DD !(11):rrr:bbb
AESKLE
16/32/64-bit
AESENC256KL xmm, m512
F3 0F 38 DE !(11):rrr:bbb
AESKLE
16/32/64-bit
AESDEC256KL xmm, m512
F3 0F 38 DF !(11):rrr:bbb
AESKLE
16/32/64-bit
ENCODEKEY128 r32, r32, <XMM0-2>, <XMM4-6>
F3 0F 38 FA 11:rrr:bbb
AESKLE
16/32/64-bit
ENCODEKEY256 r32, r32, <XMM0-6>
F3 0F 38 FB 11:rrr:bbb
AESKLE
16/32/64-bit
VBROADCASTSS xmm1, xmm2
VEX.128.66.0F38.W0 18 /r
AVX2
16/32/64-bit
VBROADCASTSS ymm1, xmm2
VEX.256.66.0F38.W0 18 /r
AVX2
16/32/64-bit
VBROADCASTSD ymm1, xmm2
VEX.256.66.0F38.W0 19 /r
AVX2
16/32/64-bit
VMGEXIT
F2 0F 01 D9
SEV-ES
16/32/64-bit
UIRET
F3 0F 01 EC
UINTR
64-bit
TESTUI
F3 0F 01 ED
UINTR
64-bit
CLUI
F3 0F 01 EE
UINTR
64-bit
STUI
F3 0F 01 EF
UINTR
64-bit
SENDUIPI r64
F3 0F C7 /6
UINTR
64-bit
HRESET imm8, <EAX>
F3 0F 3A F0 C0 ib
HRESET
16/32/64-bit
VPDPBUSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 50 /r
AVX-VNNI
16/32/64-bit
VPDPBUSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 50 /r
AVX-VNNI
16/32/64-bit
VPDPBUSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 51 /r
AVX-VNNI
16/32/64-bit
VPDPBUSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 51 /r
AVX-VNNI
16/32/64-bit
VPDPWSSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 52 /r
AVX-VNNI
16/32/64-bit
VPDPWSSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 52 /r
AVX-VNNI
16/32/64-bit
VPDPWSSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 53 /r
AVX-VNNI
16/32/64-bit
VPDPWSSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 53 /r
AVX-VNNI
16/32/64-bit
CCS_HASH
a16 F3 0F A6 E8
PADLOCK_GMI
16/32-bit
CCS_HASH
a32 F3 0F A6 E8
PADLOCK_GMI
16/32/64-bit
CCS_HASH
a64 F3 0F A6 E8
PADLOCK_GMI
64-bit
CCS_ENCRYPT
a16 F3 0F A7 F0
PADLOCK_GMI
16/32-bit
CCS_ENCRYPT
a32 F3 0F A7 F0
PADLOCK_GMI
16/32/64-bit
CCS_ENCRYPT
a64 F3 0F A7 F0
PADLOCK_GMI
64-bit
LKGS r/m16
o16 F2 0F 00 /6
LKGS
64-bit
LKGS r32/m16
o32 F2 0F 00 /6
LKGS
64-bit
LKGS r64/m16
F2 o64 0F 00 /6
LKGS
64-bit
ERETU
F3 0F 01 CA
FRED
64-bit
ERETS
F2 0F 01 CA
FRED
64-bit
VADDPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 58 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VADDPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 58 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VADDPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 58 /r
AVX512-FP16
16/32/64-bit
VADDSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 58 /r
AVX512-FP16
16/32/64-bit
VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8
EVEX.128.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8
EVEX.256.0F3A.W0 C2 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.F3.0F3A.W0 C2 /r ib
AVX512-FP16
16/32/64-bit
VCOMISH xmm1, xmm2/m16{sae}
EVEX.LIG.MAP5.W0 2F /r
AVX512-FP16
16/32/64-bit
VCVTDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
VCVTPD2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPD2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.66.MAP5.W1 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPD2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.66.MAP5.W1 5A /r
AVX512-FP16
16/32/64-bit
VCVTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.66.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.66.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}
EVEX.512.66.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
VCVTPH2PD xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.MAP5.W0 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2PD ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.MAP5.W0 5A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2PD zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.MAP5.W0 5A /r
AVX512-FP16
16/32/64-bit
VCVTPH2PSX xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.66.MAP6.W0 13 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2PSX ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.66.MAP6.W0 13 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2PSX zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.66.MAP6.W0 13 /r
AVX512-FP16
16/32/64-bit
VCVTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 7B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 7B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}
EVEX.512.66.MAP5.W0 7B /r
AVX512-FP16
16/32/64-bit
VCVTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}
EVEX.512.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
VCVTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 79 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}
EVEX.512.66.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
VCVTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
VCVTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.66.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
VCVTPS2PHX xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPS2PHX xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.66.MAP5.W0 1D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTPS2PHX ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.66.MAP5.W0 1D /r
AVX512-FP16
16/32/64-bit
VCVTQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.MAP5.W1 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.MAP5.W1 5B /r
AVX512-FP16
16/32/64-bit
VCVTSD2SH xmm1 {k1}{z}, xmm2, xmm3/m64{er}
EVEX.LIG.F2.MAP5.W1 5A /r
AVX512-FP16
16/32/64-bit
VCVTSH2SD xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5A /r
AVX512-FP16
16/32/64-bit
VCVTSH2SI r32, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W0 2D /r
AVX512-FP16
16/32/64-bit
VCVTSH2SI r64, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W1 2D /r
AVX512-FP16
64-bit
VCVTSH2SS xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.MAP6.W0 13 /r
AVX512-FP16
16/32/64-bit
VCVTSH2USI r32, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W0 79 /r
AVX512-FP16
16/32/64-bit
VCVTSH2USI r64, xmm1/m16{er}
EVEX.LIG.F3.MAP5.W1 79 /r
AVX512-FP16
64-bit
VCVTSI2SH xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.MAP5.W0 2A /r
AVX512-FP16
16/32/64-bit
VCVTSI2SH xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.MAP5.W1 2A /r
AVX512-FP16
64-bit
VCVTSS2SH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.MAP5.W0 1D /r
AVX512-FP16
16/32/64-bit
VCVTTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.F3.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.F3.MAP5.W0 5B /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.F3.MAP5.W0 5B /r
AVX512-FP16
16/32/64-bit
VCVTTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.66.MAP5.W0 7A /r
AVX512-FP16
16/32/64-bit
VCVTTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.128.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.256.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}
EVEX.512.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
VCVTTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst
EVEX.128.66.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst
EVEX.256.66.MAP5.W0 78 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}
EVEX.512.66.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
VCVTTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.MAP5.W0 7C /r
AVX512-FP16
16/32/64-bit
VCVTTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP5.W0 7C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.66.MAP5.W0 7C /r
AVX512-FP16
16/32/64-bit
VCVTTSH2SI r32, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W0 2C /r
AVX512-FP16
16/32/64-bit
VCVTTSH2SI r64, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W1 2C /r
AVX512-FP16
64-bit
VCVTTSH2USI r32, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W0 78 /r
AVX512-FP16
16/32/64-bit
VCVTTSH2USI r64, xmm1/m16{sae}
EVEX.LIG.F3.MAP5.W1 78 /r
AVX512-FP16
64-bit
VCVTUDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst
EVEX.128.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst
EVEX.256.F2.MAP5.W0 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}
EVEX.512.F2.MAP5.W0 7A /r
AVX512-FP16
16/32/64-bit
VCVTUQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst
EVEX.128.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst
EVEX.256.F2.MAP5.W1 7A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}
EVEX.512.F2.MAP5.W1 7A /r
AVX512-FP16
16/32/64-bit
VCVTUSI2SH xmm1, xmm2, r/m32{er}
EVEX.LIG.F3.MAP5.W0 7B /r
AVX512-FP16
16/32/64-bit
VCVTUSI2SH xmm1, xmm2, r/m64{er}
EVEX.LIG.F3.MAP5.W1 7B /r
AVX512-FP16
64-bit
VCVTUW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.F2.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.F2.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTUW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.F2.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
VCVTW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.F3.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.F3.MAP5.W0 7D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VCVTW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.F3.MAP5.W0 7D /r
AVX512-FP16
16/32/64-bit
VDIVPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5E /r
AVX512VL and AVX512-FP16
16/32/64-bit
VDIVPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5E /r
AVX512VL and AVX512-FP16
16/32/64-bit
VDIVPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 5E /r
AVX512-FP16
16/32/64-bit
VDIVSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 5E /r
AVX512-FP16
16/32/64-bit
VFCMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFCMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFCMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F2.MAP6.W0 56 /r
AVX512-FP16
16/32/64-bit
VFMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.MAP6.W0 56 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F3.MAP6.W0 56 /r
AVX512-FP16
16/32/64-bit
VFCMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F2.MAP6.W0 57 /r
AVX512-FP16
16/32/64-bit
VFMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.MAP6.W0 57 /r
AVX512-FP16
16/32/64-bit
VFCMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F2.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFCMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F2.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFCMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F2.MAP6.W0 D6 /r
AVX512-FP16
16/32/64-bit
VFMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst
EVEX.128.F3.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst
EVEX.256.F3.MAP6.W0 D6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}
EVEX.512.F3.MAP6.W0 D6 /r
AVX512-FP16
16/32/64-bit
VFCMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F2.MAP6.W0 D7 /r
AVX512-FP16
16/32/64-bit
VFMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}
EVEX.LIG.F3.MAP6.W0 D7 /r
AVX512-FP16
16/32/64-bit
VFMADDSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 96 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 96 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 96 /r
AVX512-FP16
16/32/64-bit
VFMADDSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A6 /r
AVX512-FP16
16/32/64-bit
VFMADDSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B6 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADDSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B6 /r
AVX512-FP16
16/32/64-bit
VFMSUBADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 97 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUBADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 97 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUBADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 97 /r
AVX512-FP16
16/32/64-bit
VFMSUBADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUBADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUBADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A7 /r
AVX512-FP16
16/32/64-bit
VFMSUBADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUBADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B7 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUBADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B7 /r
AVX512-FP16
16/32/64-bit
VFMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 98 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 98 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 98 /r
AVX512-FP16
16/32/64-bit
VFMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 A8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 A8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 A8 /r
AVX512-FP16
16/32/64-bit
VFMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 B8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 B8 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 B8 /r
AVX512-FP16
16/32/64-bit
VFNMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9C /r
AVX512-FP16
16/32/64-bit
VFNMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AC /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AC /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AC /r
AVX512-FP16
16/32/64-bit
VFNMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BC /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BC /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BC /r
AVX512-FP16
16/32/64-bit
VFMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 99 /r
AVX512-FP16
16/32/64-bit
VFMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 A9 /r
AVX512-FP16
16/32/64-bit
VFMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 B9 /r
AVX512-FP16
16/32/64-bit
VFNMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9D /r
AVX512-FP16
16/32/64-bit
VFNMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AD /r
AVX512-FP16
16/32/64-bit
VFNMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BD /r
AVX512-FP16
16/32/64-bit
VFMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9A /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9A /r
AVX512-FP16
16/32/64-bit
VFMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AA /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AA /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AA /r
AVX512-FP16
16/32/64-bit
VFMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BA /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BA /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BA /r
AVX512-FP16
16/32/64-bit
VFNMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 9E /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 9E /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 9E /r
AVX512-FP16
16/32/64-bit
VFNMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 AE /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 AE /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 AE /r
AVX512-FP16
16/32/64-bit
VFNMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 BE /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 BE /r
AVX512VL and AVX512-FP16
16/32/64-bit
VFNMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 BE /r
AVX512-FP16
16/32/64-bit
VFMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9B /r
AVX512-FP16
16/32/64-bit
VFMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AB /r
AVX512-FP16
16/32/64-bit
VFMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BB /r
AVX512-FP16
16/32/64-bit
VFNMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 9F /r
AVX512-FP16
16/32/64-bit
VFNMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 AF /r
AVX512-FP16
16/32/64-bit
VFNMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 BF /r
AVX512-FP16
16/32/64-bit
VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 66 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8
EVEX.512.0F3A.W0 66 /r ib
AVX512-FP16
16/32/64-bit
VFPCLASSSH k1 {k2}, xmm2/m16, imm8
EVEX.LIG.0F3A.W0 67 /r ib
AVX512-FP16
16/32/64-bit
VGETEXPPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 42 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VGETEXPPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 42 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VGETEXPPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}
EVEX.512.66.MAP6.W0 42 /r
AVX512-FP16
16/32/64-bit
VGETEXPSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.66.MAP6.W0 43 /r
AVX512-FP16
16/32/64-bit
VGETMANTPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VGETMANTPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 26 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VGETMANTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 26 /r ib
AVX512-FP16
16/32/64-bit
VGETMANTSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 27 /r ib
AVX512-FP16
16/32/64-bit
VMAXPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5F /r
AVX512VL and AVX512-FP16
16/32/64-bit
VMAXPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5F /r
AVX512VL and AVX512-FP16
16/32/64-bit
VMAXPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}
EVEX.512.MAP5.W0 5F /r
AVX512-FP16
16/32/64-bit
VMAXSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5F /r
AVX512-FP16
16/32/64-bit
VMINPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VMINPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5D /r
AVX512VL and AVX512-FP16
16/32/64-bit
VMINPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}
EVEX.512.MAP5.W0 5D /r
AVX512-FP16
16/32/64-bit
VMINSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}
EVEX.LIG.F3.MAP5.W0 5D /r
AVX512-FP16
16/32/64-bit
VMOVSH xmm1 {k1}{z}, m16
EVEX.LIG.F3.MAP5.W0 10 /r
AVX512-FP16
16/32/64-bit
VMOVSH m16 {k1}, xmm1
EVEX.LIG.F3.MAP5.W0 11 /r
AVX512-FP16
16/32/64-bit
VMOVSH xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F3.MAP5.W0 10 /r
AVX512-FP16
16/32/64-bit
VMOVSH xmm1 {k1}{z}, xmm2, xmm3
EVEX.LIG.F3.MAP5.W0 11 /r
AVX512-FP16
16/32/64-bit
VMOVW xmm1, r32/m16
EVEX.128.66.MAP5.W0 6E /r
AVX512-FP16
16/32/64-bit
VMOVW xmm1, r64/m16
EVEX.128.66.MAP5.W1 6E /r
AVX512-FP16
64-bit
VMOVW r32/m16, xmm1
EVEX.128.66.MAP5.W0 7E /r
AVX512-FP16
16/32/64-bit
VMOVW r64/m16, xmm1
EVEX.128.66.MAP5.W1 7E /r
AVX512-FP16
64-bit
VMULPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 59 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VMULPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 59 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VMULPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 59 /r
AVX512-FP16
16/32/64-bit
VMULSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 59 /r
AVX512-FP16
16/32/64-bit
VRCPPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 4C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VRCPPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 4C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VRCPPH zmm1 {k1}{z}, zmm2/m512/m16bcst
EVEX.512.66.MAP6.W0 4C /r
AVX512-FP16
16/32/64-bit
VRCPSH xmm1 {k1}{z}, xmm2, xmm3/m16
EVEX.LIG.66.MAP6.W0 4D /r
AVX512-FP16
16/32/64-bit
VREDUCEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VREDUCEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 56 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VREDUCEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 56 /r ib
AVX512-FP16
16/32/64-bit
VREDUCESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 57 /r ib
AVX512-FP16
16/32/64-bit
VRNDSCALEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8
EVEX.128.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VRNDSCALEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8
EVEX.256.0F3A.W0 08 /r ib
AVX512VL and AVX512-FP16
16/32/64-bit
VRNDSCALEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8
EVEX.512.0F3A.W0 08 /r ib
AVX512-FP16
16/32/64-bit
VRNDSCALESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8
EVEX.LIG.0F3A.W0 0A /r ib
AVX512-FP16
16/32/64-bit
VRSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.66.MAP6.W0 4E /r
AVX512VL and AVX512-FP16
16/32/64-bit
VRSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.66.MAP6.W0 4E /r
AVX512VL and AVX512-FP16
16/32/64-bit
VRSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst
EVEX.512.66.MAP6.W0 4E /r
AVX512-FP16
16/32/64-bit
VRSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16
EVEX.LIG.66.MAP6.W0 4F /r
AVX512-FP16
16/32/64-bit
VSCALEFPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.66.MAP6.W0 2C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VSCALEFPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.66.MAP6.W0 2C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VSCALEFPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.66.MAP6.W0 2C /r
AVX512-FP16
16/32/64-bit
VSCALEFSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.66.MAP6.W0 2D /r
AVX512-FP16
16/32/64-bit
VSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst
EVEX.128.MAP5.W0 51 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst
EVEX.256.MAP5.W0 51 /r
AVX512VL and AVX512-FP16
16/32/64-bit
VSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}
EVEX.512.MAP5.W0 51 /r
AVX512-FP16
16/32/64-bit
VSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 51 /r
AVX512-FP16
16/32/64-bit
VSUBPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst
EVEX.128.MAP5.W0 5C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VSUBPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst
EVEX.256.MAP5.W0 5C /r
AVX512VL and AVX512-FP16
16/32/64-bit
VSUBPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}
EVEX.512.MAP5.W0 5C /r
AVX512-FP16
16/32/64-bit
VSUBSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}
EVEX.LIG.F3.MAP5.W0 5C /r
AVX512-FP16
16/32/64-bit
VUCOMISH xmm1, xmm2/m16{sae}
EVEX.LIG.MAP5.W0 2E /r
AVX512-FP16
16/32/64-bit
RDUDBG
0F 0E
UDBG
16/32/64-bit
WRUDBG
0F 0F
UDBG
16/32/64-bit
JKZD k1, rel8
VEX.128.W0 74 cb
KNC
64-bit
JKNZD k1, rel8
VEX.128.W0 75 cb
KNC
64-bit
VPREFETCHNTA m8
VEX.128.0F.WIG 18 /0
KNC
64-bit
VPREFETCH0 m8
VEX.128.0F.WIG 18 /1
KNC
64-bit
VPREFETCH1 m8
VEX.128.0F.WIG 18 /2
KNC
64-bit
VPREFETCH2 m8
VEX.128.0F.WIG 18 /3
KNC
64-bit
VPREFETCHENTA m8
VEX.128.0F.WIG 18 /4
KNC
64-bit
VPREFETCHE0 m8
VEX.128.0F.WIG 18 /5
KNC
64-bit
VPREFETCHE1 m8
VEX.128.0F.WIG 18 /6
KNC
64-bit
VPREFETCHE2 m8
VEX.128.0F.WIG 18 /7
KNC
64-bit
KAND k1, k2
VEX.128.0F.W0 41 /r
KNC
64-bit
KANDN k1, k2
VEX.128.0F.W0 42 /r
KNC
64-bit
KANDNR k1, k2
VEX.128.0F.W0 43 /r
KNC
64-bit
KNOT k1, k2
VEX.128.0F.W0 44 /r
KNC
64-bit
KOR k1, k2
VEX.128.0F.W0 45 /r
KNC
64-bit
KXNOR k1, k2
VEX.128.0F.W0 46 /r
KNC
64-bit
KXOR k1, k2
VEX.128.0F.W0 47 /r
KNC
64-bit
KMERGE2L1H k1, k2
VEX.128.0F.W0 48 /r
KNC
64-bit
KMERGE2L1L k1, k2
VEX.128.0F.W0 49 /r
KNC
64-bit
JKZD k1, rel32
VEX.128.0F.W0 84 cd
KNC
64-bit
JKNZD k1, rel32
VEX.128.0F.W0 85 cd
KNC
64-bit
KMOV k1, k2
VEX.128.0F.W0 90 /r
KNC
64-bit
KMOV k1, r32
VEX.128.0F.W0 92 /r
KNC
64-bit
KMOV r32, k1
VEX.128.0F.W0 93 /r
KNC
64-bit
KCONCATH r64, k1, k2
VEX.128.0F.W0 95 /r
KNC
64-bit
KCONCATL r64, k1, k2
VEX.128.0F.W0 97 /r
KNC
64-bit
KORTEST k1, k2
VEX.128.0F.W0 98 /r
KNC
64-bit
DELAY r32
VEX.128.F3.0F.W0 AE /6
KNC
64-bit
DELAY r64
VEX.128.F3.0F.W1 AE /6
KNC
64-bit
SPFLT r32
VEX.128.F2.0F.W0 AE /6
KNC
64-bit
SPFLT r64
VEX.128.F2.0F.W1 AE /6
KNC
64-bit
CLEVICT1 m8
VEX.128.F3.0F.WIG AE /7
KNC
64-bit
CLEVICT0 m8
VEX.128.F2.0F.WIG AE /7
KNC
64-bit
POPCNT r32, r32
VEX.128.F3.0F.W0 B8 /r
KNC
64-bit
POPCNT r64, r64
VEX.128.F3.0F.W1 B8 /r
KNC
64-bit
TZCNT r32, r32
VEX.128.F3.0F.W0 BC /r
KNC
64-bit
TZCNT r64, r64
VEX.128.F3.0F.W1 BC /r
KNC
64-bit
TZCNTI r32, r32
VEX.128.F2.0F.W0 BC /r
KNC
64-bit
TZCNTI r64, r64
VEX.128.F2.0F.W1 BC /r
KNC
64-bit
LZCNT r32, r32
VEX.128.F3.0F.W0 BD /r
KNC
64-bit
LZCNT r64, r64
VEX.128.F3.0F.W1 BD /r
KNC
64-bit
UNDOC r32, r/m32
VEX.128.F3.0F38.W0 F0 /r
KNC
64-bit
UNDOC r64, r/m64
VEX.128.F3.0F38.W1 F0 /r
KNC
64-bit
UNDOC r32, r/m32
VEX.128.F2.0F38.W0 F0 /r
KNC
64-bit
UNDOC r64, r/m64
VEX.128.F2.0F38.W1 F0 /r
KNC
64-bit
UNDOC r32, r/m32
VEX.128.F2.0F38.W0 F1 /r
KNC
64-bit
UNDOC r64, r/m64
VEX.128.F2.0F38.W1 F1 /r
KNC
64-bit
KEXTRACT k1, r64, imm8
VEX.128.66.0F3A.W0 3E /r ib
KNC
64-bit
VPREFETCHNTA m
MVEX.512.0F.WIG 18 /0
KNC
64-bit
VPREFETCH0 m
MVEX.512.0F.WIG 18 /1
KNC
64-bit
VPREFETCH1 m
MVEX.512.0F.WIG 18 /2
KNC
64-bit
VPREFETCH2 m
MVEX.512.0F.WIG 18 /3
KNC
64-bit
VPREFETCHENTA m
MVEX.512.0F.WIG 18 /4
KNC
64-bit
VPREFETCHE0 m
MVEX.512.0F.WIG 18 /5
KNC
64-bit
VPREFETCHE1 m
MVEX.512.0F.WIG 18 /6
KNC
64-bit
VPREFETCHE2 m
MVEX.512.0F.WIG 18 /7
KNC
64-bit
VMOVAPS zmm1 {k1}, Sf32(zmm2/mt)
MVEX.512.0F.W0 28 /r
KNC
64-bit
VMOVAPD zmm1 {k1}, Sf64(zmm2/mt)
MVEX.512.66.0F.W1 28 /r
KNC
64-bit
VMOVAPS mt {k1}, Df32(zmm1)
MVEX.512.0F.W0 29 /r
KNC
64-bit
VMOVAPD mt {k1}, Df64(zmm1)
MVEX.512.66.0F.W1 29 /r
KNC
64-bit
VMOVNRAPD m {k1}, Df64(zmm1)
MVEX.512.F3.0F.W1.EH0 29 /r
KNC
64-bit
VMOVNRNGOAPD m {k1}, Df64(zmm1)
MVEX.512.F3.0F.W1.EH1 29 /r
KNC
64-bit
VMOVNRAPS m {k1}, Df32(zmm1)
MVEX.512.F2.0F.W0.EH0 29 /r
KNC
64-bit
VMOVNRNGOAPS m {k1}, Df32(zmm1)
MVEX.512.F2.0F.W0.EH1 29 /r
KNC
64-bit
VADDPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.0F.W0 58 /r
KNC
64-bit
VADDPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F.W1 58 /r
KNC
64-bit
VMULPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.0F.W0 59 /r
KNC
64-bit
VMULPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F.W1 59 /r
KNC
64-bit
VCVTPS2PD zmm1 {k1}, Sf32(zmm2/mt)
MVEX.512.0F.W0 5A /r
KNC
64-bit
VCVTPD2PS zmm1 {k1}, Sf64(zmm2/mt)
MVEX.512.66.0F.W1 5A /r
KNC
64-bit
VSUBPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.0F.W0 5C /r
KNC
64-bit
VSUBPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F.W1 5C /r
KNC
64-bit
VPCMPGTD k2 {k1}, zmm1, Si32(zmm2/mt)
MVEX.NDS.512.66.0F.W0 66 /r
KNC
64-bit
VMOVDQA32 zmm1 {k1}, Si32(zmm2/mt)
MVEX.512.66.0F.W0 6F /r
KNC
64-bit
VMOVDQA64 zmm1 {k1}, Si64(zmm2/mt)
MVEX.512.66.0F.W1 6F /r
KNC
64-bit
VPSHUFD zmm1 {k1}, zmm2/mt, imm8
MVEX.512.66.0F.W0 70 /r ib
KNC
64-bit
VPSRLD zmm1 {k1}, Si32(zmm2/mt), imm8
MVEX.NDD.512.66.0F.W0 72 /2 ib
KNC
64-bit
VPSRAD zmm1 {k1}, Si32(zmm2/mt), imm8
MVEX.NDD.512.66.0F.W0 72 /4 ib
KNC
64-bit
VPSLLD zmm1 {k1}, Si32(zmm2/mt), imm8
MVEX.NDD.512.66.0F.W0 72 /6 ib
KNC
64-bit
VPCMPEQD k2 {k1}, zmm1, Si32(zmm2/mt)
MVEX.NDS.512.66.0F.W0 76 /r
KNC
64-bit
VCVTUDQ2PD zmm1 {k1}, Si32(zmm2/mt)
MVEX.512.F3.0F.W0 7A /r
KNC
64-bit
VMOVDQA32 mt {k1}, Di32(zmm1)
MVEX.512.66.0F.W0 7F /r
KNC
64-bit
VMOVDQA64 mt {k1}, Di64(zmm1)
MVEX.512.66.0F.W1 7F /r
KNC
64-bit
CLEVICT1 m
MVEX.512.F3.0F.WIG AE /7
KNC
64-bit
CLEVICT0 m
MVEX.512.F2.0F.WIG AE /7
KNC
64-bit
VCMPPS k2 {k1}, zmm1, Sf32(zmm2/mt), imm8
MVEX.NDS.512.0F.W0 C2 /r ib
KNC
64-bit
VCMPPD k2 {k1}, zmm1, Sf64(zmm2/mt), imm8
MVEX.NDS.512.66.0F.W1 C2 /r ib
KNC
64-bit
VPANDD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F.W0 DB /r
KNC
64-bit
VPANDQ zmm1 {k1}, zmm2, Si64(zmm3/mt)
MVEX.NDS.512.66.0F.W1 DB /r
KNC
64-bit
VPANDND zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F.W0 DF /r
KNC
64-bit
VPANDNQ zmm1 {k1}, zmm2, Si64(zmm3/mt)
MVEX.NDS.512.66.0F.W1 DF /r
KNC
64-bit
VCVTDQ2PD zmm1 {k1}, Si32(zmm2/mt)
MVEX.512.F3.0F.W0 E6 /r
KNC
64-bit
VPORD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F.W0 EB /r
KNC
64-bit
VPORQ zmm1 {k1}, zmm2, Si64(zmm3/mt)
MVEX.NDS.512.66.0F.W1 EB /r
KNC
64-bit
VPXORD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F.W0 EF /r
KNC
64-bit
VPXORQ zmm1 {k1}, zmm2, Si64(zmm3/mt)
MVEX.NDS.512.66.0F.W1 EF /r
KNC
64-bit
VPSUBD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F.W0 FA /r
KNC
64-bit
VPADDD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F.W0 FE /r
KNC
64-bit
VBROADCASTSS zmm1 {k1}, Uf32(mt)
MVEX.512.66.0F38.W0 18 /r
KNC
64-bit
VBROADCASTSD zmm1 {k1}, Uf64(mt)
MVEX.512.66.0F38.W1 19 /r
KNC
64-bit
VBROADCASTF32X4 zmm1 {k1}, Uf32(mt)
MVEX.512.66.0F38.W0 1A /r
KNC
64-bit
VBROADCASTF64X4 zmm1 {k1}, Uf64(mt)
MVEX.512.66.0F38.W1 1B /r
KNC
64-bit
VPTESTMD k2 {k1}, zmm1, Si32(zmm2/mt)
MVEX.NDS.512.66.0F38.W0 27 /r
KNC
64-bit
VPERMD zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 36 /r
KNC
64-bit
VPMINSD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 39 /r
KNC
64-bit
VPMINUD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 3B /r
KNC
64-bit
VPMAXSD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 3D /r
KNC
64-bit
VPMAXUD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 3F /r
KNC
64-bit
VPMULLD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 40 /r
KNC
64-bit
VGETEXPPS zmm1 {k1}, Sf32(zmm2/mt)
MVEX.512.66.0F38.W0 42 /r
KNC
64-bit
VGETEXPPD zmm1 {k1}, Sf64(zmm2/mt)
MVEX.512.66.0F38.W1 42 /r
KNC
64-bit
VPSRLVD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 45 /r
KNC
64-bit
VPSRAVD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 46 /r
KNC
64-bit
VPSLLVD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 47 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 48 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 49 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 4A /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 4B /r
KNC
64-bit
VADDNPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 50 /r
KNC
64-bit
VADDNPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 50 /r
KNC
64-bit
VGMAXABSPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 51 /r
KNC
64-bit
VGMINPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 52 /r
KNC
64-bit
VGMINPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 52 /r
KNC
64-bit
VGMAXPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 53 /r
KNC
64-bit
VGMAXPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 53 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 54 /r
KNC
64-bit
VFIXUPNANPS zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 55 /r
KNC
64-bit
VFIXUPNANPD zmm1 {k1}, zmm2, Si64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 55 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 56 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 57 /r
KNC
64-bit
VPBROADCASTD zmm1 {k1}, Ui32(mt)
MVEX.512.66.0F38.W0 58 /r
KNC
64-bit
VPBROADCASTQ zmm1 {k1}, Ui64(mt)
MVEX.512.66.0F38.W1 59 /r
KNC
64-bit
VBROADCASTI32X4 zmm1 {k1}, Ui32(mt)
MVEX.512.66.0F38.W0 5A /r
KNC
64-bit
VBROADCASTI64X4 zmm1 {k1}, Ui64(mt)
MVEX.512.66.0F38.W1 5B /r
KNC
64-bit
VPADCD zmm1 {k1}, k2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 5C /r
KNC
64-bit
VPADDSETCD zmm1 {k1}, k2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 5D /r
KNC
64-bit
VPSBBD zmm1 {k1}, k2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 5E /r
KNC
64-bit
VPSUBSETBD zmm1 {k1}, k2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 5F /r
KNC
64-bit
VPBLENDMD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 64 /r
KNC
64-bit
VPBLENDMQ zmm1 {k1}, zmm2, Si64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 64 /r
KNC
64-bit
VBLENDMPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 65 /r
KNC
64-bit
VBLENDMPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 65 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 67 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 68 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 69 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 6A /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 6B /r
KNC
64-bit
VPSUBRD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 6C /r
KNC
64-bit
VSUBRPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 6D /r
KNC
64-bit
VSUBRPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 6D /r
KNC
64-bit
VPSBBRD zmm1 {k1}, k2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 6E /r
KNC
64-bit
VPSUBRSETBD zmm1 {k1}, k2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 6F /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 70 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 71 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 72 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 73 /r
KNC
64-bit
VPCMPLTD k2 {k1}, zmm1, Si32(zmm2/mt)
MVEX.NDS.512.66.0F38.W0 74 /r
KNC
64-bit
VSCALEPS zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 84 /r
KNC
64-bit
VPMULHUD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 86 /r
KNC
64-bit
VPMULHD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 87 /r
KNC
64-bit
VPGATHERDD zmm1 {k1}, Ui32(mvt)
MVEX.512.66.0F38.W0 90 /vsib
KNC
64-bit
VPGATHERDQ zmm1 {k1}, Ui64(mvt)
MVEX.512.66.0F38.W1 90 /vsib
KNC
64-bit
VGATHERDPS zmm1 {k1}, Uf32(mvt)
MVEX.512.66.0F38.W0 92 /vsib
KNC
64-bit
VGATHERDPD zmm1 {k1}, Uf64(mvt)
MVEX.512.66.0F38.W1 92 /vsib
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 94 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W1 94 /r
KNC
64-bit
VFMADD132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 98 /r
KNC
64-bit
VFMADD132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 98 /r
KNC
64-bit
VFMSUB132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 9A /r
KNC
64-bit
VFMSUB132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 9A /r
KNC
64-bit
VFNMADD132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 9C /r
KNC
64-bit
VFNMADD132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 9C /r
KNC
64-bit
VFNMSUB132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 9E /r
KNC
64-bit
VFNMSUB132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 9E /r
KNC
64-bit
VPSCATTERDD mvt {k1}, Di32(zmm1)
MVEX.512.66.0F38.W0 A0 /vsib
KNC
64-bit
VPSCATTERDQ mvt {k1}, Di64(zmm1)
MVEX.512.66.0F38.W1 A0 /vsib
KNC
64-bit
VSCATTERDPS mvt {k1}, Df32(zmm1)
MVEX.512.66.0F38.W0 A2 /vsib
KNC
64-bit
VSCATTERDPD mvt {k1}, Df64(zmm1)
MVEX.512.66.0F38.W1 A2 /vsib
KNC
64-bit
VFMADD233PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 A4 /r
KNC
64-bit
VFMADD213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 A8 /r
KNC
64-bit
VFMADD213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 A8 /r
KNC
64-bit
VFMSUB213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 AA /r
KNC
64-bit
VFMSUB213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 AA /r
KNC
64-bit
VFNMADD213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 AC /r
KNC
64-bit
VFNMADD213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 AC /r
KNC
64-bit
VFNMSUB213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 AE /r
KNC
64-bit
VFNMSUB213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 AE /r
KNC
64-bit
UNDOC zmm1 {k1}, mvt
MVEX.512.66.0F38.W0 B0 /vsib
KNC
64-bit
UNDOC zmm1 {k1}, mvt
MVEX.512.66.0F38.W0 B2 /vsib
KNC
64-bit
VPMADD233D zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 B4 /r
KNC
64-bit
VPMADD231D zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 B5 /r
KNC
64-bit
VFMADD231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 B8 /r
KNC
64-bit
VFMADD231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 B8 /r
KNC
64-bit
VFMSUB231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 BA /r
KNC
64-bit
VFMSUB231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 BA /r
KNC
64-bit
VFNMADD231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 BC /r
KNC
64-bit
VFNMADD231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 BC /r
KNC
64-bit
VFNMSUB231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 BE /r
KNC
64-bit
VFNMSUB231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)
MVEX.NDS.512.66.0F38.W1 BE /r
KNC
64-bit
UNDOC zmm1 {k1}, mvt
MVEX.512.66.0F38.W0 C0 /vsib
KNC
64-bit
VGATHERPF0HINTDPS Uf32(mvt) {k1}
MVEX.512.66.0F38.W0 C6 /0 /vsib
KNC
64-bit
VGATHERPF0HINTDPD Uf64(mvt) {k1}
MVEX.512.66.0F38.W1 C6 /0 /vsib
KNC
64-bit
VGATHERPF0DPS Uf32(mvt) {k1}
MVEX.512.66.0F38.W0 C6 /1 /vsib
KNC
64-bit
VGATHERPF1DPS Uf32(mvt) {k1}
MVEX.512.66.0F38.W0 C6 /2 /vsib
KNC
64-bit
VSCATTERPF0HINTDPS Uf32(mvt) {k1}
MVEX.512.66.0F38.W0 C6 /4 /vsib
KNC
64-bit
VSCATTERPF0HINTDPD Uf64(mvt) {k1}
MVEX.512.66.0F38.W1 C6 /4 /vsib
KNC
64-bit
VSCATTERPF0DPS Uf32(mvt) {k1}
MVEX.512.66.0F38.W0 C6 /5 /vsib
KNC
64-bit
VSCATTERPF1DPS Uf32(mvt) {k1}
MVEX.512.66.0F38.W0 C6 /6 /vsib
KNC
64-bit
VEXP223PS zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 C8 /r
KNC
64-bit
VLOG2PS zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 C9 /r
KNC
64-bit
VRCP23PS zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 CA /r
KNC
64-bit
VRSQRT23PS zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 CB /r
KNC
64-bit
VADDSETSPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 CC /r
KNC
64-bit
VPADDSETSD zmm1 {k1}, zmm2, Si32(zmm3/mt)
MVEX.NDS.512.66.0F38.W0 CD /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 CE /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W1 CE /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2, zmm3/mt
MVEX.NDS.512.66.0F38.W0 CF /r
KNC
64-bit
VLOADUNPACKLD zmm1 {k1}, Ui32(mt)
MVEX.512.0F38.W0 D0 /r
KNC
64-bit
VLOADUNPACKLQ zmm1 {k1}, Ui64(mt)
MVEX.512.0F38.W1 D0 /r
KNC
64-bit
VPACKSTORELD mt {k1}, Di32(zmm1)
MVEX.512.66.0F38.W0 D0 /r
KNC
64-bit
VPACKSTORELQ mt {k1}, Di64(zmm1)
MVEX.512.66.0F38.W1 D0 /r
KNC
64-bit
VLOADUNPACKLPS zmm1 {k1}, Uf32(mt)
MVEX.512.0F38.W0 D1 /r
KNC
64-bit
VLOADUNPACKLPD zmm1 {k1}, Uf64(mt)
MVEX.512.0F38.W1 D1 /r
KNC
64-bit
VPACKSTORELPS mt {k1}, Df32(zmm1)
MVEX.512.66.0F38.W0 D1 /r
KNC
64-bit
VPACKSTORELPD mt {k1}, Df64(zmm1)
MVEX.512.66.0F38.W1 D1 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.0F38.W0 D2 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 D2 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.0F38.W0 D3 /r
KNC
64-bit
VLOADUNPACKHD zmm1 {k1}, Ui32(mt)
MVEX.512.0F38.W0 D4 /r
KNC
64-bit
VLOADUNPACKHQ zmm1 {k1}, Ui64(mt)
MVEX.512.0F38.W1 D4 /r
KNC
64-bit
VPACKSTOREHD mt {k1}, Di32(zmm1)
MVEX.512.66.0F38.W0 D4 /r
KNC
64-bit
VPACKSTOREHQ mt {k1}, Di64(zmm1)
MVEX.512.66.0F38.W1 D4 /r
KNC
64-bit
VLOADUNPACKHPS zmm1 {k1}, Uf32(mt)
MVEX.512.0F38.W0 D5 /r
KNC
64-bit
VLOADUNPACKHPD zmm1 {k1}, Uf64(mt)
MVEX.512.0F38.W1 D5 /r
KNC
64-bit
VPACKSTOREHPS mt {k1}, Df32(zmm1)
MVEX.512.66.0F38.W0 D5 /r
KNC
64-bit
VPACKSTOREHPD mt {k1}, Df64(zmm1)
MVEX.512.66.0F38.W1 D5 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.0F38.W0 D6 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.66.0F38.W0 D6 /r
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt
MVEX.512.0F38.W0 D7 /r
KNC
64-bit
VALIGND zmm1 {k1}, zmm2, zmm3/mt, imm8
MVEX.NDS.512.66.0F3A.W0 03 /r ib
KNC
64-bit
VPERMF32X4 zmm1 {k1}, zmm2/mt, imm8
MVEX.512.66.0F3A.W0 07 /r ib
KNC
64-bit
VPCMPUD k2 {k1}, zmm1, Si32(zmm2/mt), imm8
MVEX.NDS.512.66.0F3A.W0 1E /r ib
KNC
64-bit
VPCMPD k2 {k1}, zmm1, Si32(zmm2/mt), imm8
MVEX.NDS.512.66.0F3A.W0 1F /r ib
KNC
64-bit
VGETMANTPS zmm1 {k1}, Sf32(zmm2/mt), imm8
MVEX.512.66.0F3A.W0 26 /r ib
KNC
64-bit
VGETMANTPD zmm1 {k1}, Sf64(zmm2/mt), imm8
MVEX.512.66.0F3A.W1 26 /r ib
KNC
64-bit
VRNDFXPNTPS zmm1 {k1}, Sf32(zmm2/mt), imm8
MVEX.512.66.0F3A.W0 52 /r ib
KNC
64-bit
VRNDFXPNTPD zmm1 {k1}, Sf64(zmm2/mt), imm8
MVEX.512.66.0F3A.W1 52 /r ib
KNC
64-bit
VCVTFXPNTUDQ2PS zmm1 {k1}, Si32(zmm2/mt), imm8
MVEX.512.0F3A.W0 CA /r ib
KNC
64-bit
VCVTFXPNTPS2UDQ zmm1 {k1}, Sf32(zmm2/mt), imm8
MVEX.512.66.0F3A.W0 CA /r ib
KNC
64-bit
VCVTFXPNTPD2UDQ zmm1 {k1}, Sf64(zmm2/mt), imm8
MVEX.512.F2.0F3A.W1 CA /r ib
KNC
64-bit
VCVTFXPNTDQ2PS zmm1 {k1}, Si32(zmm2/mt), imm8
MVEX.512.0F3A.W0 CB /r ib
KNC
64-bit
VCVTFXPNTPS2DQ zmm1 {k1}, Sf32(zmm2/mt), imm8
MVEX.512.66.0F3A.W0 CB /r ib
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt, imm8
MVEX.512.66.0F3A.W0 D0 /r ib
KNC
64-bit
UNDOC zmm1 {k1}, zmm2/mt, imm8
MVEX.512.66.0F3A.W0 D1 /r ib
KNC
64-bit
VCVTFXPNTPD2DQ zmm1 {k1}, Sf64(zmm2/mt), imm8
MVEX.512.F2.0F3A.W1 E6 /r ib
KNC
64-bit
UNDOC
a16 F3 0F A6 F0
PADLOCK_UNDOC
16/32-bit
UNDOC
a32 F3 0F A6 F0
PADLOCK_UNDOC
16/32/64-bit
UNDOC
a64 F3 0F A6 F0
PADLOCK_UNDOC
64-bit
UNDOC
a16 F3 0F A6 F8
PADLOCK_UNDOC
16/32-bit
UNDOC
a32 F3 0F A6 F8
PADLOCK_UNDOC
16/32/64-bit
UNDOC
a64 F3 0F A6 F8
PADLOCK_UNDOC
64-bit
XSHA512
a16 F3 0F A6 E0
PADLOCK_PHE
16/32-bit
XSHA512
a32 F3 0F A6 E0
PADLOCK_PHE
16/32/64-bit
XSHA512
a64 F3 0F A6 E0
PADLOCK_PHE
64-bit
XSTORE_ALT
a16 F3 0F A7 F8
PADLOCK_RNG
16/32-bit
XSTORE_ALT
a32 F3 0F A7 F8
PADLOCK_RNG
16/32/64-bit
XSTORE_ALT
a64 F3 0F A7 F8
PADLOCK_RNG
64-bit
XSHA512_ALT
a16 F3 0F A6 D8
PADLOCK_PHE
16/32-bit
XSHA512_ALT
a32 F3 0F A6 D8
PADLOCK_PHE
16/32/64-bit
XSHA512_ALT
a64 F3 0F A6 D8
PADLOCK_PHE
64-bit
A zero-sized instruction. Can be used as a label.
WRMSRNS
NP 0F 01 C6
WRMSRNS
16/32/64-bit
WRMSRLIST
F3 0F 01 C6
MSRLIST
64-bit
RDMSRLIST
F2 0F 01 C6
MSRLIST
64-bit
RMPQUERY
F3 0F 01 FD
RMPQUERY
64-bit
PREFETCHIT1 m8
0F 18 /6
PREFETCHITI
16/32/64-bit
PREFETCHIT0 m8
0F 18 /7
PREFETCHITI
16/32/64-bit
AADD m32, r32
NP 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
AADD m64, r64
NP o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
AAND m32, r32
66 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
AAND m64, r64
66 o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
AXOR m32, r32
F3 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
AXOR m64, r64
F3 o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
AOR m32, r32
F2 0F 38 FC !(11):rrr:bbb
RAO-INT
16/32/64-bit
AOR m64, r64
F2 o64 0F 38 FC !(11):rrr:bbb
RAO-INT
64-bit
VPDPBUUD xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBUUD ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSUD xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSUD ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSSD xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSSD ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 50 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBUUDS xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBUUDS ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSUDS xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSUDS ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSSDS xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
VPDPBSSDS ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 51 /r
AVX-VNNI-INT8
16/32/64-bit
TDPFP16PS tmm1, tmm2, tmm3
VEX.128.F2.0F38.W0 5C 11:rrr:bbb
AMX-FP16
64-bit
VCVTNEPS2BF16 xmm1, xmm2/m128
VEX.128.F3.0F38.W0 72 /r
AVX-NE-CONVERT
16/32/64-bit
VCVTNEPS2BF16 xmm1, ymm2/m256
VEX.256.F3.0F38.W0 72 /r
AVX-NE-CONVERT
16/32/64-bit
VCVTNEOPH2PS xmm1, m128
VEX.128.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VCVTNEOPH2PS ymm1, m256
VEX.256.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VCVTNEEPH2PS xmm1, m128
VEX.128.66.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VCVTNEEPH2PS ymm1, m256
VEX.256.66.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VCVTNEEBF162PS xmm1, m128
VEX.128.F3.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VCVTNEEBF162PS ymm1, m256
VEX.256.F3.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VCVTNEOBF162PS xmm1, m128
VEX.128.F2.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VCVTNEOBF162PS ymm1, m256
VEX.256.F2.0F38.W0 B0 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VBCSTNESH2PS xmm1, m16
VEX.128.66.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VBCSTNESH2PS ymm1, m16
VEX.256.66.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VBCSTNEBF162PS xmm1, m16
VEX.128.F3.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VBCSTNEBF162PS ymm1, m16
VEX.256.F3.0F38.W0 B1 !(11):rrr:bbb
AVX-NE-CONVERT
16/32/64-bit
VPMADD52LUQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B4 /r
AVX-IFMA
16/32/64-bit
VPMADD52LUQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B4 /r
AVX-IFMA
16/32/64-bit
VPMADD52HUQ xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W1 B5 /r
AVX-IFMA
16/32/64-bit
VPMADD52HUQ ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W1 B5 /r
AVX-IFMA
16/32/64-bit
CMPOXADD m32, r32, r32
VEX.128.66.0F38.W0 E0 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPOXADD m64, r64, r64
VEX.128.66.0F38.W1 E0 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNOXADD m32, r32, r32
VEX.128.66.0F38.W0 E1 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNOXADD m64, r64, r64
VEX.128.66.0F38.W1 E1 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPBXADD m32, r32, r32
VEX.128.66.0F38.W0 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPBXADD m64, r64, r64
VEX.128.66.0F38.W1 E2 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNBXADD m32, r32, r32
VEX.128.66.0F38.W0 E3 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNBXADD m64, r64, r64
VEX.128.66.0F38.W1 E3 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPZXADD m32, r32, r32
VEX.128.66.0F38.W0 E4 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPZXADD m64, r64, r64
VEX.128.66.0F38.W1 E4 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNZXADD m32, r32, r32
VEX.128.66.0F38.W0 E5 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNZXADD m64, r64, r64
VEX.128.66.0F38.W1 E5 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPBEXADD m32, r32, r32
VEX.128.66.0F38.W0 E6 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPBEXADD m64, r64, r64
VEX.128.66.0F38.W1 E6 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNBEXADD m32, r32, r32
VEX.128.66.0F38.W0 E7 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNBEXADD m64, r64, r64
VEX.128.66.0F38.W1 E7 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPSXADD m32, r32, r32
VEX.128.66.0F38.W0 E8 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPSXADD m64, r64, r64
VEX.128.66.0F38.W1 E8 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNSXADD m32, r32, r32
VEX.128.66.0F38.W0 E9 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNSXADD m64, r64, r64
VEX.128.66.0F38.W1 E9 !(11):rrr:bbb
CMPCCXADD
64-bit
CMPPXADD m32, r32, r32
VEX.128.66.0F38.W0 EA !(11):rrr:bbb
CMPCCXADD
64-bit
CMPPXADD m64, r64, r64
VEX.128.66.0F38.W1 EA !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNPXADD m32, r32, r32
VEX.128.66.0F38.W0 EB !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNPXADD m64, r64, r64
VEX.128.66.0F38.W1 EB !(11):rrr:bbb
CMPCCXADD
64-bit
CMPLXADD m32, r32, r32
VEX.128.66.0F38.W0 EC !(11):rrr:bbb
CMPCCXADD
64-bit
CMPLXADD m64, r64, r64
VEX.128.66.0F38.W1 EC !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNLXADD m32, r32, r32
VEX.128.66.0F38.W0 ED !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNLXADD m64, r64, r64
VEX.128.66.0F38.W1 ED !(11):rrr:bbb
CMPCCXADD
64-bit
CMPLEXADD m32, r32, r32
VEX.128.66.0F38.W0 EE !(11):rrr:bbb
CMPCCXADD
64-bit
CMPLEXADD m64, r64, r64
VEX.128.66.0F38.W1 EE !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNLEXADD m32, r32, r32
VEX.128.66.0F38.W0 EF !(11):rrr:bbb
CMPCCXADD
64-bit
CMPNLEXADD m64, r64, r64
VEX.128.66.0F38.W1 EF !(11):rrr:bbb
CMPCCXADD
64-bit
TCMMRLFP16PS tmm1, tmm2, tmm3
VEX.128.0F38.W0 6C 11:rrr:bbb
AMX-COMPLEX
64-bit
TCMMIMFP16PS tmm1, tmm2, tmm3
VEX.128.66.0F38.W0 6C 11:rrr:bbb
AMX-COMPLEX
64-bit
PBNDKB
NP 0F 01 C7
TSE
64-bit
VSHA512RNDS2 ymm1, ymm2, xmm3
VEX.256.F2.0F38.W0 CB 11:rrr:bbb
AVX and SHA512
16/32/64-bit
VSHA512MSG1 ymm1, xmm2
VEX.256.F2.0F38.W0 CC 11:rrr:bbb
AVX and SHA512
16/32/64-bit
VSHA512MSG2 ymm1, ymm2
VEX.256.F2.0F38.W0 CD 11:rrr:bbb
AVX and SHA512
16/32/64-bit
VPDPWUUD xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWUUD ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWUSD xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWUSD ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWSUD xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWSUD ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 D2 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWUUDS xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWUUDS ymm1, ymm2, ymm3/m256
VEX.256.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWUSDS xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWUSDS ymm1, ymm2, ymm3/m256
VEX.256.66.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWSUDS xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
VPDPWSUDS ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 D3 /r
AVX-VNNI-INT16
16/32/64-bit
VSM3MSG1 xmm1, xmm2, xmm3/m128
VEX.128.0F38.W0 DA /r
AVX and SM3
16/32/64-bit
VSM3MSG2 xmm1, xmm2, xmm3/m128
VEX.128.66.0F38.W0 DA /r
AVX and SM3
16/32/64-bit
VSM4KEY4 xmm1, xmm2, xmm3/m128
VEX.128.F3.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
VSM4KEY4 ymm1, ymm2, ymm3/m256
VEX.256.F3.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
VSM4RNDS4 xmm1, xmm2, xmm3/m128
VEX.128.F2.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
VSM4RNDS4 ymm1, ymm2, ymm3/m256
VEX.256.F2.0F38.W0 DA /r
AVX and SM4
16/32/64-bit
VSM3RNDS2 xmm1, xmm2, xmm3/m128, imm8
VEX.128.66.0F3A.W0 DE /r ib
AVX and SM3
16/32/64-bit
Reads instruction bytes
Reads the next byte or returns less than 0 if there are no more bytes
The code size (16/32/64) that was used when an instruction was decoded
Unknown size
16-bit code
32-bit code
64-bit code
Used by an to write encoded instructions
Writes the next byte
Value
Instruction condition code (used by Jcc, SETcc, CMOVcc, CMPccXADD, LOOPcc)
The instruction doesn't have a condition code
Overflow (OF=1)
Not overflow (OF=0)
Below (unsigned) (CF=1)
Above or equal (unsigned) (CF=0)
Equal / zero (ZF=1)
Not equal / zero (ZF=0)
Below or equal (unsigned) (CF=1 or ZF=1)
Above (unsigned) (CF=0 and ZF=0)
Signed (SF=1)
Not signed (SF=0)
Parity (PF=1)
Not parity (PF=0)
Less (signed) (SF!=OF)
Greater than or equal (signed) (SF=OF)
Less than or equal (signed) (ZF=1 or SF!=OF)
Greater (signed) (ZF=0 and SF=OF)
Contains the offsets of the displacement and immediate. Call the decoder's GetConstantOffsets() method
to get the offsets of the constants after the instruction has been decoded. The encoder has a similar method.
The offset of the displacement, if any
Size in bytes of the displacement, or 0 if there's no displacement
The offset of the first immediate, if any.
This field can be invalid even if the operand has an immediate if it's an immediate that isn't part
of the instruction stream, eg. SHL AL,1.
Size in bytes of the first immediate, or 0 if there's no immediate
The offset of the second immediate, if any.
Size in bytes of the second immediate, or 0 if there's no second immediate
if and are valid
if and are valid
if and are valid
CPUID feature flags
8086 or later
8086 only
80186 or later
80286 or later
80286 only
80386 or later
80386 only
80386 A0-B0 stepping only (XBTS, IBTS instructions)
Intel486 or later
Intel486 A stepping only (CMPXCHG)
UMOV (80386 and Intel486)
IA-64
CPUID.80000001H:EDX.LM[bit 29]
CPUID.(EAX=07H, ECX=0H):EBX.ADX[bit 19]
CPUID.01H:ECX.AES[bit 25]
CPUID.01H:ECX.AVX[bit 28]
CPUID.(EAX=07H, ECX=0H):EBX.AVX2[bit 5]
CPUID.(EAX=07H, ECX=0H):EDX.AVX512_4FMAPS[bit 3]
CPUID.(EAX=07H, ECX=0H):EDX.AVX512_4VNNIW[bit 2]
CPUID.(EAX=07H, ECX=1H):EAX.AVX512_BF16[bit 5]
CPUID.(EAX=07H, ECX=0H):ECX.AVX512_BITALG[bit 12]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512_IFMA[bit 21]
CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VBMI[bit 1]
CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VBMI2[bit 6]
CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VNNI[bit 11]
CPUID.(EAX=07H, ECX=0H):EDX.AVX512_VP2INTERSECT[bit 08]
CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VPOPCNTDQ[bit 14]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512BW[bit 30]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512CD[bit 28]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512DQ[bit 17]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512ER[bit 27]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512F[bit 16]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512PF[bit 26]
CPUID.(EAX=07H, ECX=0H):EBX.AVX512VL[bit 31]
CPUID.(EAX=07H, ECX=0H):EBX.BMI1[bit 3]
CPUID.(EAX=07H, ECX=0H):EBX.BMI2[bit 8]
CPUID.(EAX=07H, ECX=0H):EDX.CET_IBT[bit 20]
CPUID.(EAX=07H, ECX=0H):ECX.CET_SS[bit 7]
CL1INVMB instruction (Intel SCC = Single-Chip Computer)
CPUID.(EAX=07H, ECX=0H):ECX.CLDEMOTE[bit 25]
CPUID.(EAX=07H, ECX=0H):EBX.CLFLUSHOPT[bit 23]
CPUID.01H:EDX.CLFSH[bit 19]
CPUID.(EAX=07H, ECX=0H):EBX.CLWB[bit 24]
CPUID.80000008H:EBX.CLZERO[bit 0]
CPUID.01H:EDX.CMOV[bit 15]
CPUID.01H:ECX.CMPXCHG16B[bit 13]
RFLAGS.ID can be toggled
CPUID.01H:EDX.CX8[bit 8]
CPUID.80000001H:EDX.3DNOW[bit 31]
CPUID.80000001H:EDX.3DNOWEXT[bit 30]
CPUID.(EAX=12H, ECX=0H):EAX.OSS[bit 5]
CPUID.(EAX=07H, ECX=0H):ECX.ENQCMD[bit 29]
CPUID.01H:ECX.F16C[bit 29]
CPUID.01H:ECX.FMA[bit 12]
CPUID.80000001H:ECX.FMA4[bit 16]
8087 or later (CPUID.01H:EDX.FPU[bit 0])
80287 or later
80287XL only
80387 or later
80387SL only
CPUID.(EAX=07H, ECX=0H):EBX.FSGSBASE[bit 0]
CPUID.01H:EDX.FXSR[bit 24]
Cyrix (AMD Geode GX/LX) 3DNow! instructions
CPUID.(EAX=07H, ECX=0H):ECX.GFNI[bit 8]
CPUID.(EAX=07H, ECX=0H):EBX.HLE[bit 4]
or
IA32_VMX_EPT_VPID_CAP[bit 20]
CPUID.(EAX=07H, ECX=0H):EBX.INVPCID[bit 10]
IA32_VMX_EPT_VPID_CAP[bit 32]
CPUID.80000001H:ECX.LWP[bit 15]
CPUID.80000001H:ECX.LZCNT[bit 5]
CPUID.80000008H:EBX.MCOMMIT[bit 8]
CPUID.01H:EDX.MMX[bit 23]
CPUID.01H:ECX.MONITOR[bit 3]
CPUID.80000001H:ECX.MONITORX[bit 29]
CPUID.01H:ECX.MOVBE[bit 22]
CPUID.(EAX=07H, ECX=0H):ECX.MOVDIR64B[bit 28]
CPUID.(EAX=07H, ECX=0H):ECX.MOVDIRI[bit 27]
CPUID.(EAX=07H, ECX=0H):EBX.MPX[bit 14]
CPUID.01H:EDX.MSR[bit 5]
Multi-byte nops (0F1F /0): CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B
CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.ACE[Bits 7:6] = 11B ([6] = exists, [7] = enabled)
CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.PHE[Bits 11:10] = 11B ([10] = exists, [11] = enabled)
CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.PMM[Bits 13:12] = 11B ([12] = exists, [13] = enabled)
CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.RNG[Bits 3:2] = 11B ([2] = exists, [3] = enabled)
PAUSE instruction (Pentium 4 or later)
CPUID.01H:ECX.PCLMULQDQ[bit 1]
CPUID.(EAX=07H, ECX=0H):EBX.PCOMMIT[bit 22]
CPUID.(EAX=07H, ECX=0H):EDX.PCONFIG[bit 18]
CPUID.(EAX=07H, ECX=0H):ECX.PKU[bit 3]
CPUID.01H:ECX.POPCNT[bit 23]
CPUID.80000001H:ECX.PREFETCHW[bit 8]
CPUID.(EAX=07H, ECX=0H):ECX.PREFETCHWT1[bit 0]
CPUID.(EAX=14H, ECX=0H):EBX.PTWRITE[bit 4]
CPUID.(EAX=07H, ECX=0H):ECX.RDPID[bit 22]
RDPMC instruction (Pentium MMX or later, or Pentium Pro or later)
CPUID.80000008H:EBX.RDPRU[bit 4]
CPUID.01H:ECX.RDRAND[bit 30]
CPUID.(EAX=07H, ECX=0H):EBX.RDSEED[bit 18]
CPUID.80000001H:EDX.RDTSCP[bit 27]
CPUID.(EAX=07H, ECX=0H):EBX.RTM[bit 11]
CPUID.01H:EDX.SEP[bit 11]
CPUID.(EAX=12H, ECX=0H):EAX.SGX1[bit 0]
CPUID.(EAX=07H, ECX=0H):EBX.SHA[bit 29]
CPUID.80000001H:ECX.SKINIT[bit 12]
or
CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20]
CPUID.01H:ECX.SMX[bit 6]
CPUID.01H:EDX.SSE[bit 25]
CPUID.01H:EDX.SSE2[bit 26]
CPUID.01H:ECX.SSE3[bit 0]
CPUID.01H:ECX.SSE4_1[bit 19]
CPUID.01H:ECX.SSE4_2[bit 20]
CPUID.80000001H:ECX.SSE4A[bit 6]
CPUID.01H:ECX.SSSE3[bit 9]
CPUID.80000001H:ECX.SVM[bit 2]
CPUID.8000001FH:EAX.SEV-ES[bit 3]
CPUID.80000001H:EDX.SYSCALL[bit 11]
CPUID.80000001H:ECX.TBM[bit 21]
CPUID.01H:EDX.TSC[bit 4]
CPUID.(EAX=07H, ECX=0H):ECX.VAES[bit 9]
CPUID.01H:ECX.VMX[bit 5]
CPUID.(EAX=07H, ECX=0H):ECX.VPCLMULQDQ[bit 10]
CPUID.(EAX=07H, ECX=0H):ECX.WAITPKG[bit 5]
CPUID.(EAX=80000008H, ECX=0H):EBX.WBNOINVD[bit 9]
CPUID.80000001H:ECX.XOP[bit 11]
CPUID.01H:ECX.XSAVE[bit 26]
CPUID.(EAX=0DH, ECX=1H):EAX.XSAVEC[bit 1]
CPUID.(EAX=0DH, ECX=1H):EAX.XSAVEOPT[bit 0]
CPUID.(EAX=0DH, ECX=1H):EAX.XSAVES[bit 3]
CPUID.8000001FH:EAX.SEV-SNP[bit 4]
CPUID.(EAX=07H, ECX=0H):EDX.SERIALIZE[bit 14]
CPUID.(EAX=07H, ECX=0H):EDX.TSXLDTRK[bit 16]
CPUID.80000008H:EBX.INVLPGB[bit 3]
CPUID.(EAX=07H, ECX=0H):EDX.AMX-BF16[bit 22]
CPUID.(EAX=07H, ECX=0H):EDX.AMX-TILE[bit 24]
CPUID.(EAX=07H, ECX=0H):EDX.AMX-INT8[bit 25]
Cyrix FPU instructions (Cyrix, AMD Geode GX/LX)
Cyrix SMM instructions: SVDC, RSDC, SVLDT, RSLDT, SVTS, RSTS (Cyrix, AMD Geode GX/LX)
Cyrix SMINT 0F38 (6x86MX and later, AMD Geode GX/LX)
Cyrix SMINT 0F7E (6x86 or earlier)
Cyrix SMM instructions: RDSHR, WRSHR (6x86MX, M II, Cyrix III)
Cyrix DDI instructions: BB0_Reset, BB1_Reset, CPU_READ, CPU_WRITE (MediaGX, GXm, GXLV, GX1)
Cyrix AND CPUID.80000001H:EDX.EMMI[bit 24]
Cyrix DMI instructions: DMINT, RDM (AMD Geode GX/LX)
CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.AIS[Bits 1:0] = 11B ([0] = exists, [1] = enabled)
MOV to/from TR (80386, Intel486, Cyrix, Geode)
RSM instruction (some 386s, some 486s, Pentium and later)
CPUID.(EAX=??H, ECX=?H):???.????[bit ??]
CPUID.(EAX=07H, ECX=0H):ECX.KL[bit 23]
CPUID.19H:EBX.AESKLE[bit 0]
CPUID.19H:EBX.WIDE_KL[bit 2]
CPUID.(EAX=07H, ECX=0H):EDX.UINTR[bit 5]
CPUID.(EAX=07H, ECX=01H):EAX.HRESET[bit 22]
CPUID.(EAX=07H, ECX=01H):EAX.AVX-VNNI[bit 4]
CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.GMI[Bits 5:4] = 11B ([4] = exists, [5] = enabled)
CPUID.(EAX=07H, ECX=01H):EAX.FRED[bit 17]
CPUID.(EAX=07H, ECX=01H):EAX.LKGS[bit 18]
CPUID.(EAX=07H, ECX=0H):EDX.AVX512-FP16[bit 23]
Undocumented Intel RDUDBG and WRUDBG instructions
Intel Knights Corner
Undocumented instruction
CPUID.8000001FH:EAX.RMPQUERY[bit 6]
CPUID.(EAX=07H, ECX=1H):EAX.RAO-INT[bit 3]
CPUID.(EAX=07H, ECX=1H):EDX.PREFETCHITI[bit 14]
CPUID.(EAX=07H, ECX=1H):EAX.AMX-FP16[bit 21]
CPUID.(EAX=07H, ECX=1H):EAX.CMPCCXADD[bit 7]
CPUID.(EAX=07H, ECX=1H):EAX.AVX-IFMA[bit 23]
CPUID.(EAX=07H, ECX=1H):EDX.AVX-NE-CONVERT[bit 5]
CPUID.(EAX=07H, ECX=1H):EDX.AVX-VNNI-INT8[bit 4]
CPUID.(EAX=07H, ECX=1H):EAX.MSRLIST[bit 27]
CPUID.(EAX=07H, ECX=1H):EAX.WRMSRNS[bit 19]
CPUID.(EAX=07H, ECX=1H):EDX.AMX-COMPLEX[bit 8]
CPUID.(EAX=07H, ECX=1H):EAX.SHA512[bit 0]
CPUID.(EAX=07H, ECX=1H):EAX.SM3[bit 1]
CPUID.(EAX=07H, ECX=1H):EAX.SM4[bit 2]
CPUID.(EAX=07H, ECX=1H):EBX.TSE[bit 1]
CPUID.(EAX=07H, ECX=1H):EDX.AVX-VNNI-INT16[bit 10]
Decodes 16/32/64-bit x86 instructions
Current IP/EIP/RIP value.
Writing to this property only updates the IP value, it does not change a 's byte position.
You can use to change its position.
Gets the bitness (16, 32 or 64)
Creates a decoder
16, 32 or 64
Code reader
RIP value
Decoder options
Creates a decoder
16, 32 or 64
Data to decode
RIP value
Decoder options
Creates a decoder
16, 32 or 64
Code reader
Decoder options
Creates a decoder
16, 32 or 64
Data to decode
Decoder options
Gets the last decoder error. Unless you need to know the reason it failed,
it's better to check .
Decodes the next instruction, see also which is faster
if you already have an local, array element or field.
See also
Decodes the next instruction, see also
Decoded instruction
Gets the offsets of the constants (memory displacement and immediate) in the decoded instruction.
The caller can check if there are any relocations at those addresses.
The latest instruction that was decoded by this decoder
An enumerator
Gets the current instruction
Decodes the next instruction
Disposes of this instance
Gets the enumerator
Decoder error
No error. The last decoded instruction is a valid instruction
It's an invalid instruction or an invalid encoding of an existing instruction (eg. some reserved bit is set/cleared)
There's not enough bytes left to decode the instruction
Decoder options
No option is enabled
Disable some checks for invalid encodings of instructions, eg. most instructions can't use a LOCK prefix so if one is found, they're decoded as unless this option is enabled.
AMD decoder: allow 16-bit branch/ret instructions in 64-bit mode, no o64 CALL/JMP FAR [mem], o64 LSS/LFS/LGS, UD0 has no modr/m byte, decode LOCK MOV CR. The AMD decoder can still decode Intel instructions.
Decode opcodes 0F0D and 0F18-0F1F as reserved-nop instructions (eg. )
Decode UMOV instructions
Decode XBTS/IBTS
Decode 0FA6/0FA7 as CMPXCHG
Decode some old removed FPU instructions (eg. FRSTPM)
Decode PCOMMIT
Decode 286 STOREALL/LOADALL (0F04 and 0F05)
Decode 386 LOADALL
Decode CL1INVMB
Decode MOV r32,tr and MOV tr,r32
Decode JMPE instructions
Don't decode PAUSE, decode NOP instead
Don't decode WBNOINVD, decode WBINVD instead
Decode undocumented Intel RDUDBG and WRUDBG instructions
Don't decode TZCNT, decode BSF instead
Don't decode LZCNT, decode BSR instead
Don't decode LAHF and SAHF in 64-bit mode
Decode MPX instructions
Decode most Cyrix instructions: FPU, EMMI, SMM, DDI
Decode Cyrix SMINT 0F7E (Cyrix 6x86 or earlier)
Decode Cyrix DMI instructions (AMD Geode GX/LX)
Decode Centaur ALTINST
Decode Intel Knights Corner instructions
Encodes instructions decoded by the decoder or instructions created by other code.
See also BlockEncoder which can encode any number of instructions.
Disables 2-byte VEX encoding and encodes all VEX instructions with the 3-byte VEX encoding
Value of the VEX.W bit to use if it's an instruction that ignores the bit. Default is 0.
Value of the VEX.L bit to use if it's an instruction that ignores the bit. Default is 0.
Value of the EVEX.W bit to use if it's an instruction that ignores the bit. Default is 0.
Value of the EVEX.L'L bits to use if it's an instruction that ignores the bits. Default is 0.
Value of the MVEX.W bit to use if it's an instruction that ignores the bit. Default is 0.
Gets the bitness (16, 32 or 64)
Creates an encoder
16, 32 or 64
Destination
Encodes an instruction and returns the size of the encoded instruction.
A is thrown if it failed to encode the instruction.
Instruction to encode
RIP of the encoded instruction
Encodes an instruction
Instruction to encode
RIP of the encoded instruction
Updated with length of encoded instruction if successful
Set to the error message if we couldn't encode the instruction
Writes a byte to the output buffer
Value to write
Gets the offsets of the constants (memory displacement and immediate) in the encoded instruction.
The caller can use this information to add relocations if needed.
Extensions
Gets a
Code value
Thrown if the encoder can't encode an instruction
The instruction that couldn't be encoded
Constructor
Exception message
Instruction
Constructor
ENTER xxxx,yy
EXTRQ/INSERTQ xx,yy
CALL16 FAR x:y
CALL32 FAR x:y
EVEX.R'
.128, .256, .512
.L0, .L1
.LZ
If this is an immediate operand, it returns the value, else it returns -1
If this is a near branch operand, it returns the value, else it returns -1
If this is a far branch operand, it returns the value, else it returns -1
Instruction encoding
Legacy encoding
VEX encoding
EVEX encoding
XOP encoding
3DNow! encoding
MVEX encoding
Fast formatter with less formatting options and with a masm-like syntax.
Use it if formatting speed is more important than being able to re-assemble formatted instructions.
This formatter is ~2.3x faster than the other formatters (the time includes decoding + formatting).
Gets the formatter options
Constructor
Constructor
Symbol resolver or null
Formats the whole instruction: prefixes, mnemonic, operands
Instruction
Output
Fast formatter options
Add a space after the operand separator
Default:
: mov rax, rcx
: mov rax,rcx
Show RIP+displ or the virtual address
Default:
: mov eax,[rip+12345678h]
: mov eax,[1029384756AFBECDh]
Use pseudo instructions
Default:
: vcmpnltsd xmm2,xmm6,xmm3
: vcmpsd xmm2,xmm6,xmm3,5
Show the original value after the symbol name
Default:
: mov eax,[myfield (12345678)]
: mov eax,[myfield]
Always show the effective segment register. If the option is , only show the segment register if
there's a segment override prefix.
Default:
: mov eax,ds:[ecx]
: mov eax,[ecx]
Always show memory operands' size
Default:
: mov eax,dword ptr [ebx] / add byte ptr [eax],0x12
: mov eax,[ebx] / add byte ptr [eax],0x12
Use uppercase hex digits
Default:
: 0xFF
: 0xff
Use a hex prefix (0x) or a hex suffix (h)
Default:
: 0x5A
: 5Ah
output
Gets the current length
Constructor
Constructor
Initial capacity
Append a char
Character to append
Append a string
String to append
Copies all data to
Destination array
Destination array index
Resets the buffer to an empty string
Gets the current string
Control flow
The next instruction that will be executed is the next instruction in the instruction stream
It's an unconditional branch instruction: JMP NEAR, JMP FAR
It's an unconditional indirect branch: JMP NEAR reg, JMP NEAR [mem], JMP FAR [mem]
It's a conditional branch instruction: Jcc SHORT, Jcc NEAR, LOOP, LOOPcc, JRCXZ, JKccD SHORT, JKccD NEAR
It's a return instruction: RET NEAR, RET FAR, IRET, SYSRET, SYSEXIT, RSM, SKINIT, RDM, UIRET
It's a call instruction: CALL NEAR, CALL FAR, SYSCALL, SYSENTER, VMLAUNCH, VMRESUME, VMCALL, VMMCALL, VMGEXIT, VMRUN, TDCALL, SEAMCALL, SEAMRET
It's an indirect call instruction: CALL NEAR reg, CALL NEAR [mem], CALL FAR [mem]
It's an interrupt instruction: INT n, INT3, INT1, INTO, SMINT, DMINT
It's XBEGIN
It's an invalid instruction, eg. , UD0, UD1, UD2
Formats instructions
Gets the formatter options
Formats the mnemonic and any prefixes
Instruction
Output
Formats the mnemonic and/or any prefixes
Instruction
Output
Options
Gets the number of operands that will be formatted. A formatter can add and remove operands
Instruction
Returns the operand access but only if it's an operand added by the formatter. If it's an
operand that is part of , you should call eg. .
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Updated with operand access if successful
Converts a formatter operand index to an instruction operand index. Returns -1 if it's an operand added by the formatter
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Converts an instruction operand index to a formatter operand index. Returns -1 if the instruction operand isn't used by the formatter
Instruction
Instruction operand
Formats an operand. This is a formatter operand and not necessarily a real instruction operand.
A formatter can add and remove operands.
Instruction
Output
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Formats an operand separator
Instruction
Output
Formats all operands
Instruction
Output
Formats the whole instruction: prefixes, mnemonic, operands
Instruction
Output
Formats a register
Register
Formats a
Value
Formats a
Value
Formats a
Value
Formats a
Value
Formats a
Value
Formats a
Value
Formats a
Value
Formats a
Value
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Format mnemonic options
No option is set
Don't add any prefixes
Don't add the mnemonic
Formatter options
Constructor
Prefixes are uppercased
Default:
: REP stosd
: rep stosd
Mnemonics are uppercased
Default:
: MOV rcx,rax
: mov rcx,rax
Registers are uppercased
Default:
: mov RCX,[RAX+RDX*8]
: mov rcx,[rax+rdx*8]
Keywords are uppercased (eg. BYTE PTR, SHORT)
Default:
: mov BYTE PTR [rcx],12h
: mov byte ptr [rcx],12h
Uppercase decorators, eg. {z}, {sae}, {rd-sae} (but not opmask registers: {k1})
Default:
: vunpcklps xmm2{k5}{Z},xmm6,dword bcst [rax+4]
: vunpcklps xmm2{k5}{z},xmm6,dword bcst [rax+4]
Everything is uppercased, except numbers and their prefixes/suffixes
Default:
: MOV EAX,GS:[RCX*4+0ffh]
: mov eax,gs:[rcx*4+0ffh]
Character index (0-based) where the first operand is formatted. Can be set to 0 to format it immediately after the mnemonic.
At least one space or tab is always added between the mnemonic and the first operand.
Default: 0
0: mov•rcx,rbp
8: mov•••••rcx,rbp
Size of a tab character or <= 0 to use spaces
Default: 0
Add a space after the operand separator
Default:
: mov rax, rcx
: mov rax,rcx
Add a space between the memory expression and the brackets
Default:
: mov eax,[ rcx+rdx ]
: mov eax,[rcx+rdx]
Add spaces between memory operand + and - operators
Default:
: mov eax,[rcx + rdx*8 - 80h]
: mov eax,[rcx+rdx*8-80h]
Add spaces between memory operand * operator
Default:
: mov eax,[rcx+rdx * 8-80h]
: mov eax,[rcx+rdx*8-80h]
Show memory operand scale value before the index register
Default:
: mov eax,[8*rdx]
: mov eax,[rdx*8]
Always show the scale value even if it's *1
Default:
: mov eax,[rbx+rcx*1]
: mov eax,[rbx+rcx]
Always show the effective segment register. If the option is , only show the segment register if
there's a segment override prefix.
Default:
: mov eax,ds:[ecx]
: mov eax,[ecx]
Show zero displacements
Default:
: mov eax,[rcx*2+0]
: mov eax,[rcx*2]
Hex number prefix or /empty string, eg. "0x"
Default: (masm/nasm/intel), "0x" (gas)
Hex number suffix or /empty string, eg. "h"
Default: "h" (masm/nasm/intel), (gas)
Size of a digit group, see also
Default: 4
0: 0x12345678
4: 0x1234_5678
Decimal number prefix or /empty string
Default:
Decimal number suffix or /empty string
Default:
Size of a digit group, see also
Default: 3
0: 12345678
3: 12_345_678
Octal number prefix or /empty string
Default: (masm/nasm/intel), "0" (gas)
Octal number suffix or /empty string
Default: "o" (masm/nasm/intel), (gas)
Size of a digit group, see also
Default: 4
0: 12345670
4: 1234_5670
Binary number prefix or /empty string
Default: (masm/nasm/intel), "0b" (gas)
Binary number suffix or /empty string
Default: "b" (masm/nasm/intel), (gas)
Size of a digit group, see also
Default: 4
0: 11010111
4: 1101_0111
Digit separator or /empty string. See also eg. .
Default:
"": 0x12345678
"_": 0x1234_5678
Add leading zeros to hexadecimal/octal/binary numbers.
This option has no effect on branch targets and displacements, use
and .
Default:
: 0x0000000A/0000000Ah
: 0xA/0Ah
Add leading zeros to hexadecimal/octal/binary numbers.
This option has no effect on branch targets and displacements, use
and .
Default:
: 0x0000000A/0000000Ah
: 0xA/0Ah
Use uppercase hex digits
Default:
: 0xFF
: 0xff
Small hex numbers (-9 .. 9) are shown in decimal
Default:
: 9
: 0x9
Add a leading zero to hex numbers if there's no prefix and the number starts with hex digits A-F
Default:
: 0FFh
: FFh
Number base
Default:
Add leading zeros to branch offsets. Used by CALL NEAR, CALL FAR, JMP NEAR, JMP FAR, Jcc, LOOP, LOOPcc, XBEGIN
Default:
: je 00000123h
: je 123h
Add leading zeros to branch offsets. Used by CALL NEAR, CALL FAR, JMP NEAR, JMP FAR, Jcc, LOOP, LOOPcc, XBEGIN
Default:
: je 00000123h
: je 123h
Show immediate operands as signed numbers
Default:
: mov eax,-1
: mov eax,FFFFFFFF
Displacements are signed numbers
Default:
: mov al,[eax-2000h]
: mov al,[eax+0FFFFE000h]
Add leading zeros to displacements
Default:
: mov al,[eax+00000012h]
: mov al,[eax+12h]
Add leading zeros to displacements
Default:
: mov al,[eax+00000012h]
: mov al,[eax+12h]
Options that control if the memory size (eg. DWORD PTR) is shown or not.
This is ignored by the gas (AT&T) formatter.
Default:
Show RIP+displ or the virtual address
Default:
: mov eax,[rip+12345678h]
: mov eax,[1029384756AFBECDh]
Show NEAR, SHORT, etc if it's a branch instruction
Default:
: je short 1234h
: je 1234h
Use pseudo instructions
Default:
: vcmpnltsd xmm2,xmm6,xmm3
: vcmpsd xmm2,xmm6,xmm3,5
Show the original value after the symbol name
Default:
: mov eax,[myfield (12345678)]
: mov eax,[myfield]
(gas only): If , the formatter doesn't add % to registers
Default:
: mov eax,ecx
: mov %eax,%ecx
(gas only): Shows the mnemonic size suffix even when not needed
Default:
: movl %eax,%ecx
: mov %eax,%ecx
(gas only): Add a space after the comma if it's a memory operand
Default:
: (%eax, %ecx, 2)
: (%eax,%ecx,2)
(masm only): Add a DS segment override even if it's not present. Used if it's 16/32-bit code and mem op is a displ
Default:
: mov eax,ds:[12345678]
: mov eax,[12345678]
(masm only): Show symbols in brackets
Default:
: [ecx+symbol] / [symbol]
: symbol[ecx] / symbol
(masm only): Show displacements in brackets
Default:
: [ecx+1234h]
: 1234h[ecx]
(nasm only): Shows BYTE, WORD, DWORD or QWORD if it's a sign extended immediate operand value
Default:
: or rcx,byte -1
: or rcx,-1
Use st(0) instead of st if st can be used. Ignored by the nasm formatter.
Default:
: fadd st(0),st(3)
: fadd st,st(3)
Show useless prefixes. If it has useless prefixes, it could be data and not code.
Default:
: es rep add eax,ecx
: add eax,ecx
Mnemonic condition code selector (eg. JB / JC / JNAE)
Default: JB, CMOVB, SETB
Mnemonic condition code selector (eg. JAE / JNB / JNC)
Default: JAE, CMOVAE, SETAE
Mnemonic condition code selector (eg. JE / JZ)
Default: JE, CMOVE, SETE, LOOPE, REPE
Mnemonic condition code selector (eg. JNE / JNZ)
Default: JNE, CMOVNE, SETNE, LOOPNE, REPNE
Mnemonic condition code selector (eg. JBE / JNA)
Default: JBE, CMOVBE, SETBE
Mnemonic condition code selector (eg. JA / JNBE)
Default: JA, CMOVA, SETA
Mnemonic condition code selector (eg. JP / JPE)
Default: JP, CMOVP, SETP
Mnemonic condition code selector (eg. JNP / JPO)
Default: JNP, CMOVNP, SETNP
Mnemonic condition code selector (eg. JL / JNGE)
Default: JL, CMOVL, SETL
Mnemonic condition code selector (eg. JGE / JNL)
Default: JGE, CMOVGE, SETGE
Mnemonic condition code selector (eg. JLE / JNG)
Default: JLE, CMOVLE, SETLE
Mnemonic condition code selector (eg. JG / JNLE)
Default: JG, CMOVG, SETG
Creates GNU assembler (AT&T) formatter options
Creates Intel (XED) formatter options
Creates masm formatter options
Creates nasm formatter options
Number base
Hex numbers (base 16)
Decimal numbers (base 10)
Octal numbers (base 8)
Binary numbers (base 2)
Mnemonic condition code selector (eg. JB / JC / JNAE)
JB, CMOVB, SETB
JC, CMOVC, SETC
JNAE, CMOVNAE, SETNAE
Mnemonic condition code selector (eg. JAE / JNB / JNC)
JAE, CMOVAE, SETAE
JNB, CMOVNB, SETNB
JNC, CMOVNC, SETNC
Mnemonic condition code selector (eg. JE / JZ)
JE, CMOVE, SETE, LOOPE, REPE
JZ, CMOVZ, SETZ, LOOPZ, REPZ
Mnemonic condition code selector (eg. JNE / JNZ)
JNE, CMOVNE, SETNE, LOOPNE, REPNE
JNZ, CMOVNZ, SETNZ, LOOPNZ, REPNZ
Mnemonic condition code selector (eg. JBE / JNA)
JBE, CMOVBE, SETBE
JNA, CMOVNA, SETNA
Mnemonic condition code selector (eg. JA / JNBE)
JA, CMOVA, SETA
JNBE, CMOVNBE, SETNBE
Mnemonic condition code selector (eg. JP / JPE)
JP, CMOVP, SETP
JPE, CMOVPE, SETPE
Mnemonic condition code selector (eg. JNP / JPO)
JNP, CMOVNP, SETNP
JPO, CMOVPO, SETPO
Mnemonic condition code selector (eg. JL / JNGE)
JL, CMOVL, SETL
JNGE, CMOVNGE, SETNGE
Mnemonic condition code selector (eg. JGE / JNL)
JGE, CMOVGE, SETGE
JNL, CMOVNL, SETNL
Mnemonic condition code selector (eg. JLE / JNG)
JLE, CMOVLE, SETLE
JNG, CMOVNG, SETNG
Mnemonic condition code selector (eg. JG / JNLE)
JG, CMOVG, SETG
JNLE, CMOVNLE, SETNLE
Used by a to write all text
Writes text and text kind
Text
Text kind
Writes a prefix
Instruction
Prefix text
Prefix
Writes a mnemonic (see )
Instruction
Mnemonic text
Writes a number
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
Instruction operand number, 0-based, or -1 if it's an operand created by the formatter.
Number text
Value
Number kind
Text kind
Writes a decorator
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
Instruction operand number, 0-based, or -1 if it's an operand created by the formatter.
Decorator text
Decorator
Writes a register
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
Instruction operand number, 0-based, or -1 if it's an operand created by the formatter.
Register text
Register
Writes a symbol
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
Instruction operand number, 0-based, or -1 if it's an operand created by the formatter.
Address
Symbol
Prefix
Decorator
Broadcast decorator, eg. {1to4}
Rounding control, eg. {rd-sae}
Suppress all exceptions: {sae}
Zeroing masking: {z}
MVEX swizzle or memory up/down conversion: {dacb} or {sint16}
MVEX eviction hint: {eh}
Number kind
Formatter text kind
Normal text
Assembler directive
Any prefix
Any mnemonic
Any keyword
Any operator
Any punctuation
Number
Any register
A decorator, eg. sae in {sae}
Selector value (eg. far JMP/CALL)
Label address (eg. JE XXXXXX)
Function address (eg. CALL XXXXXX)
Data symbol
Label symbol
Function symbol
GNU assembler (AT&T) formatter
Gets the formatter options
Constructor
Constructor
Symbol resolver or null
Operand options provider or null
Constructor
Formatter options or null
Symbol resolver or null
Operand options provider or null
Formats the mnemonic and any prefixes
Instruction
Output
Options
Gets the number of operands that will be formatted. A formatter can add and remove operands
Instruction
Returns the operand access but only if it's an operand added by the formatter. If it's an
operand that is part of , you should call eg. .
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Updated with operand access if successful
Converts a formatter operand index to an instruction operand index. Returns -1 if it's an operand added by the formatter
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Converts an instruction operand index to a formatter operand index. Returns -1 if the instruction operand isn't used by the formatter
Instruction
Instruction operand
Formats an operand. This is a formatter operand and not necessarily a real instruction operand.
A formatter can add and remove operands.
Instruction
Output
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Formats an operand separator
Instruction
Output
Formats all operands
Instruction
Output
Formats the whole instruction: prefixes, mnemonic, operands
Instruction
Output
Formats a register
Register
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Gets the available features
if the gas (AT&T) formatter is available
if the Intel (xed) formatter is available
if the masm formatter is available
if the nasm formatter is available
if the fast formatter is available
if the decoder is available
if the encoder is available
if the block encoder is available
if the opcode info is available
if the instruction info code is available
Initializes some static constructors related to the decoder and instruction info. If those
static constructors are initialized, the jitter generates faster code since it doesn't have
to add runtime checks to see if those static constructors must be called.
This method should be called before using the decoder and instruction info classes and
should *not* be called from the same method as any code that uses the decoder / instruction
info classes. Eg. call this method from Main() and decode instructions / get instruction info
in a method called by Main().
Can override options used by a
Called by the formatter. The method can override any options before the formatter uses them.
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
Instruction operand number, 0-based, or -1 if it's an operand created by the formatter.
Options. Only those options that will be used by the formatter are initialized.
Number formatting options
Operand options
Show branch size (eg. SHORT, NEAR PTR)
If , show RIP relative addresses as [rip+12345678h], else show the linear address eg. [1029384756AFBECDh]
Memory size options
Gets initialized with the default options and can be overridden by a
Digit separator or /empty string to not use a digit separator
Number prefix or /empty string
Number suffix or /empty string
Size of a digit group or 0 to not use a digit separator
Number base
Use uppercase hex digits
Small hex numbers (-9 .. 9) are shown in decimal
Add a leading zero to hex numbers if there's no prefix and the number starts with hex digits A-F
If , add leading zeros to numbers, eg. '1h' vs '00000001h'
If , the number is signed, and if it's an unsigned number
Add leading zeros to displacements
Creates options used when formatting immediate values
Formatter options to use
Creates options used when formatting displacements
Formatter options to use
Creates options used when formatting branch operands
Formatter options to use
Constructor
Formatter options to use
Add leading zeros to numbers, eg. 1h vs 00000001h
Signed numbers if , and unsigned numbers if
Add leading zeros to displacements
REP/REPE/REPNE prefix
No REP/REPE/REPNE prefix
REP/REPE prefix
REPNE prefix
A 16/32/64-bit instruction. Created by Decoder or by Instruction.Create() methods.
Creates an instruction with no operands
Code value
Creates an instruction with 1 operand
Code value
op0: Register
Creates an instruction with 1 operand
Code value
op0: Immediate value
Creates an instruction with 1 operand
Code value
op0: Immediate value
Creates an instruction with 1 operand
Code value
op0: Memory operand
Creates an instruction with 2 operands
Code value
op0: Register
op1: Register
Creates an instruction with 2 operands
Code value
op0: Register
op1: Immediate value
Creates an instruction with 2 operands
Code value
op0: Register
op1: Immediate value
Creates an instruction with 2 operands
Code value
op0: Register
op1: Immediate value
Creates an instruction with 2 operands
Code value
op0: Register
op1: Immediate value
Creates an instruction with 2 operands
Code value
op0: Register
op1: Memory operand
Creates an instruction with 2 operands
Code value
op0: Immediate value
op1: Register
Creates an instruction with 2 operands
Code value
op0: Immediate value
op1: Register
Creates an instruction with 2 operands
Code value
op0: Immediate value
op1: Immediate value
Creates an instruction with 2 operands
Code value
op0: Immediate value
op1: Immediate value
Creates an instruction with 2 operands
Code value
op0: Memory operand
op1: Register
Creates an instruction with 2 operands
Code value
op0: Memory operand
op1: Immediate value
Creates an instruction with 2 operands
Code value
op0: Memory operand
op1: Immediate value
Creates an instruction with 3 operands
Code value
op0: Register
op1: Register
op2: Register
Creates an instruction with 3 operands
Code value
op0: Register
op1: Register
op2: Immediate value
Creates an instruction with 3 operands
Code value
op0: Register
op1: Register
op2: Immediate value
Creates an instruction with 3 operands
Code value
op0: Register
op1: Register
op2: Memory operand
Creates an instruction with 3 operands
Code value
op0: Register
op1: Immediate value
op2: Immediate value
Creates an instruction with 3 operands
Code value
op0: Register
op1: Immediate value
op2: Immediate value
Creates an instruction with 3 operands
Code value
op0: Register
op1: Memory operand
op2: Register
Creates an instruction with 3 operands
Code value
op0: Register
op1: Memory operand
op2: Immediate value
Creates an instruction with 3 operands
Code value
op0: Register
op1: Memory operand
op2: Immediate value
Creates an instruction with 3 operands
Code value
op0: Memory operand
op1: Register
op2: Register
Creates an instruction with 3 operands
Code value
op0: Memory operand
op1: Register
op2: Immediate value
Creates an instruction with 3 operands
Code value
op0: Memory operand
op1: Register
op2: Immediate value
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Register
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Immediate value
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Immediate value
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Memory operand
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Immediate value
op3: Immediate value
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Immediate value
op3: Immediate value
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Memory operand
op3: Register
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Memory operand
op3: Immediate value
Creates an instruction with 4 operands
Code value
op0: Register
op1: Register
op2: Memory operand
op3: Immediate value
Creates an instruction with 5 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Register
op4: Immediate value
Creates an instruction with 5 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Register
op4: Immediate value
Creates an instruction with 5 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Memory operand
op4: Immediate value
Creates an instruction with 5 operands
Code value
op0: Register
op1: Register
op2: Register
op3: Memory operand
op4: Immediate value
Creates an instruction with 5 operands
Code value
op0: Register
op1: Register
op2: Memory operand
op3: Register
op4: Immediate value
Creates an instruction with 5 operands
Code value
op0: Register
op1: Register
op2: Memory operand
op3: Register
op4: Immediate value
Creates a new near/short branch instruction
Code value
Target address
Creates a new far branch instruction
Code value
Selector/segment value
Offset
Creates a new XBEGIN instruction
16, 32, or 64
Target address
Creates a OUTSB instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP OUTSB instruction
16, 32, or 64
Creates a OUTSW instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP OUTSW instruction
16, 32, or 64
Creates a OUTSD instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP OUTSD instruction
16, 32, or 64
Creates a LODSB instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP LODSB instruction
16, 32, or 64
Creates a LODSW instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP LODSW instruction
16, 32, or 64
Creates a LODSD instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP LODSD instruction
16, 32, or 64
Creates a LODSQ instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP LODSQ instruction
16, 32, or 64
Creates a SCASB instruction
16, 32, or 64
Rep prefix or
Creates a REPE SCASB instruction
16, 32, or 64
Creates a REPNE SCASB instruction
16, 32, or 64
Creates a SCASW instruction
16, 32, or 64
Rep prefix or
Creates a REPE SCASW instruction
16, 32, or 64
Creates a REPNE SCASW instruction
16, 32, or 64
Creates a SCASD instruction
16, 32, or 64
Rep prefix or
Creates a REPE SCASD instruction
16, 32, or 64
Creates a REPNE SCASD instruction
16, 32, or 64
Creates a SCASQ instruction
16, 32, or 64
Rep prefix or
Creates a REPE SCASQ instruction
16, 32, or 64
Creates a REPNE SCASQ instruction
16, 32, or 64
Creates a INSB instruction
16, 32, or 64
Rep prefix or
Creates a REP INSB instruction
16, 32, or 64
Creates a INSW instruction
16, 32, or 64
Rep prefix or
Creates a REP INSW instruction
16, 32, or 64
Creates a INSD instruction
16, 32, or 64
Rep prefix or
Creates a REP INSD instruction
16, 32, or 64
Creates a STOSB instruction
16, 32, or 64
Rep prefix or
Creates a REP STOSB instruction
16, 32, or 64
Creates a STOSW instruction
16, 32, or 64
Rep prefix or
Creates a REP STOSW instruction
16, 32, or 64
Creates a STOSD instruction
16, 32, or 64
Rep prefix or
Creates a REP STOSD instruction
16, 32, or 64
Creates a STOSQ instruction
16, 32, or 64
Rep prefix or
Creates a REP STOSQ instruction
16, 32, or 64
Creates a CMPSB instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REPE CMPSB instruction
16, 32, or 64
Creates a REPNE CMPSB instruction
16, 32, or 64
Creates a CMPSW instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REPE CMPSW instruction
16, 32, or 64
Creates a REPNE CMPSW instruction
16, 32, or 64
Creates a CMPSD instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REPE CMPSD instruction
16, 32, or 64
Creates a REPNE CMPSD instruction
16, 32, or 64
Creates a CMPSQ instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REPE CMPSQ instruction
16, 32, or 64
Creates a REPNE CMPSQ instruction
16, 32, or 64
Creates a MOVSB instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP MOVSB instruction
16, 32, or 64
Creates a MOVSW instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP MOVSW instruction
16, 32, or 64
Creates a MOVSD instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP MOVSD instruction
16, 32, or 64
Creates a MOVSQ instruction
16, 32, or 64
Segment override or
Rep prefix or
Creates a REP MOVSQ instruction
16, 32, or 64
Creates a MASKMOVQ instruction
16, 32, or 64
Register
Register
Segment override or
Creates a MASKMOVDQU instruction
16, 32, or 64
Register
Register
Segment override or
Creates a VMASKMOVDQU instruction
16, 32, or 64
Register
Register
Segment override or
Creates a db/.byte asm directive
Byte 0
Creates a db/.byte asm directive
Byte 0
Byte 1
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11
Byte 12
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11
Byte 12
Byte 13
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11
Byte 12
Byte 13
Byte 14
Creates a db/.byte asm directive
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11
Byte 12
Byte 13
Byte 14
Byte 15
Creates a db/.byte asm directive
Data
Creates a db/.byte asm directive
Data
Start index
Number of bytes
Creates a dw/.word asm directive
Word 0
Creates a dw/.word asm directive
Word 0
Word 1
Creates a dw/.word asm directive
Word 0
Word 1
Word 2
Creates a dw/.word asm directive
Word 0
Word 1
Word 2
Word 3
Creates a dw/.word asm directive
Word 0
Word 1
Word 2
Word 3
Word 4
Creates a dw/.word asm directive
Word 0
Word 1
Word 2
Word 3
Word 4
Word 5
Creates a dw/.word asm directive
Word 0
Word 1
Word 2
Word 3
Word 4
Word 5
Word 6
Creates a dw/.word asm directive
Word 0
Word 1
Word 2
Word 3
Word 4
Word 5
Word 6
Word 7
Creates a dw/.word asm directive
Data
Creates a dw/.word asm directive
Data
Start index
Number of bytes
Creates a dw/.word asm directive
Data
Creates a dw/.word asm directive
Data
Start index
Number of elements
Creates a dd/.int asm directive
Dword 0
Creates a dd/.int asm directive
Dword 0
Dword 1
Creates a dd/.int asm directive
Dword 0
Dword 1
Dword 2
Creates a dd/.int asm directive
Dword 0
Dword 1
Dword 2
Dword 3
Creates a dd/.int asm directive
Data
Creates a dd/.int asm directive
Data
Start index
Number of bytes
Creates a dd/.int asm directive
Data
Creates a dd/.int asm directive
Data
Start index
Number of elements
Creates a dq/.quad asm directive
Qword 0
Creates a dq/.quad asm directive
Qword 0
Qword 1
Creates a dq/.quad asm directive
Data
Creates a dq/.quad asm directive
Data
Start index
Number of bytes
Creates a dq/.quad asm directive
Data
Creates a dq/.quad asm directive
Data
Start index
Number of elements
Checks if this instance equals
Other instruction
Gets the hash code
Checks if this instance equals
Other instruction
Checks if two instructions are equal, comparing all bits, not ignoring anything
Instruction #1
Instruction #2
16-bit IP of the instruction
32-bit IP of the instruction
64-bit IP of the instruction
16-bit IP of the next instruction
32-bit IP of the next instruction
64-bit IP of the next instruction
Gets the code size when the instruction was decoded. This value is informational and can
be used by a formatter.
Checks if it's an invalid instruction ( == )
Instruction code, see also
Gets the mnemonic, see also
Gets the operand count. An instruction can have 0-5 operands.
Gets the length of the instruction, 0-15 bytes. This is just informational. If you modify the instruction
or create a new one, this property could return the wrong value.
if the instruction has the XACQUIRE prefix (F2)
if the instruction has the XRELEASE prefix (F3)
if the instruction has the REPE or REP prefix (F3)
if the instruction has the REPE or REP prefix (F3)
if the instruction has the REPNE prefix (F2)
if the instruction has the LOCK prefix (F0)
Gets operand #0's kind if the operand exists (see and )
Gets operand #1's kind if the operand exists (see and )
Gets operand #2's kind if the operand exists (see and )
Gets operand #3's kind if the operand exists (see and )
Gets operand #4's kind if the operand exists (see and )
Gets an operand's kind if it exists (see )
Operand number, 0-4
Gets whether a specific operand's kind exists
Operand kind
Sets an operand's kind
Operand number, 0-4
Operand kind
Checks if the instruction has a segment override prefix, see
Gets the segment override prefix or if none. See also .
Use this property if the operand has kind ,
, ,
Gets the effective segment register used to reference the memory location.
Use this property if the operand has kind ,
, ,
Gets the size of the memory displacement in bytes. Valid values are 0, 1 (16/32/64-bit), 2 (16-bit), 4 (32-bit), 8 (64-bit).
Note that the return value can be 1 and may still not fit in
a signed byte if it's an EVEX/MVEX encoded instruction.
Use this property if the operand has kind
if the data is broadcast (EVEX instructions only)
if eviction hint bit is set ({eh}) (MVEX instructions only)
(MVEX) Register/memory operand conversion function
Gets the size of the memory location that is referenced by the operand. See also .
Use this property if the operand has kind ,
, , ,
, ,
Gets the index register scale value, valid values are *1, *2, *4, *8. Use this property if the operand has kind
Gets the memory operand's displacement or the 32-bit absolute address if it's
an EIP or RIP relative memory operand.
Use this property if the operand has kind
Gets the memory operand's displacement or the 64-bit absolute address if it's
an EIP or RIP relative memory operand.
Use this property if the operand has kind
Gets an operand's immediate value
Operand number, 0-4
Sets an operand's immediate value
Operand number, 0-4
New immediate
Sets an operand's immediate value
Operand number, 0-4
New immediate
Sets an operand's immediate value
Operand number, 0-4
New immediate
Sets an operand's immediate value
Operand number, 0-4
New immediate
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's immediate value. Use this property if the operand has kind
Gets the operand's branch target. Use this property if the operand has kind
Gets the operand's branch target. Use this property if the operand has kind
Gets the operand's branch target. Use this property if the operand has kind
Gets the near branch target if it's a CALL/JMP/Jcc near branch instruction
(i.e., if is , or )
Gets the operand's branch target. Use this property if the operand has kind
Gets the operand's branch target. Use this property if the operand has kind
Gets the operand's branch target selector. Use this property if the operand has kind or
Gets the memory operand's base register or if none. Use this property if the operand has kind
Gets the memory operand's index register or if none. Use this property if the operand has kind
Gets operand #0's register value. Use this property if operand #0 () has kind , see and
Gets operand #1's register value. Use this property if operand #1 () has kind , see and
Gets operand #2's register value. Use this property if operand #2 () has kind , see and
Gets operand #3's register value. Use this property if operand #3 () has kind , see and
Gets operand #4's register value. Use this property if operand #4 () has kind , see and
Gets the operand's register value. Use this property if the operand has kind
Operand number, 0-4
Sets the operand's register value. Use this property if the operand has kind
Operand number, 0-4
Register
Gets the opmask register ( - ) or if none
if there's an opmask register ()
if zeroing-masking, if merging-masking.
Only used by most EVEX encoded instructions that use opmask registers.
if merging-masking, if zeroing-masking.
Only used by most EVEX encoded instructions that use opmask registers.
Rounding control (SAE is implied but still returns )
or if the instruction doesn't use it.
Number of elements in a db/dw/dd/dq directive: db: 1-16; dw: 1-8; dd: 1-4; dq: 1-2.
Can only be called if is , , ,
Sets a new 'db' value, see also .
Can only be called if is
Index (0-15)
New value
Sets a new 'db' value, see also .
Can only be called if is
Index (0-15)
New value
Gets a 'db' value, see also .
Can only be called if is
Index (0-15)
Sets a new 'dw' value, see also .
Can only be called if is
Index (0-7)
New value
Sets a new 'dw' value, see also .
Can only be called if is
Index (0-7)
New value
Gets a 'dw' value, see also .
Can only be called if is
Index (0-7)
Sets a new 'dd' value, see also .
Can only be called if is
Index (0-3)
New value
Sets a new 'dd' value, see also .
Can only be called if is
Index (0-3)
New value
Gets a 'dd' value, see also .
Can only be called if is
Index (0-3)
Sets a new 'dq' value, see also .
Can only be called if is
Index (0-1)
New value
Sets a new 'dq' value, see also .
Can only be called if is
Index (0-1)
New value
Gets a 'dq' value, see also .
Can only be called if is
Index (0-1)
Checks if this is a VSIB instruction, see also ,
VSIB instructions only (): if it's using 32-bit indexes, if it's using 64-bit indexes
VSIB instructions only (): if it's using 64-bit indexes, if it's using 32-bit indexes
Checks if it's a VSIB instruction. If it's a VSIB instruction, it sets to if it's
a VSIB instruction with 64-bit indexes, and clears it if it's using 32-bit indexes.
If it's a VSIB instruction, set to if it's using 64-bit indexes, set to if it's using 32-bit indexes
Suppress all exceptions (EVEX/MVEX encoded instructions). Note that if is
not , SAE is implied but this property will still return .
Checks if the memory operand is RIP/EIP relative
Gets the RIP/EIP releative address ( or ).
This property is only valid if there's a memory operand with RIP/EIP relative addressing, see
Gets the
Formats the instruction using the default formatter with default formatter options
Gets the number of bytes added to SP/ESP/RSP or 0 if it's not an instruction that pushes or pops data. This method assumes
the instruction doesn't change the privilege level (eg. IRET/D/Q). If it's the LEAVE instruction, this method returns 0.
Gets the FPU status word's TOP increment value and whether it's a conditional or unconditional push/pop
and whether TOP is written.
Instruction encoding, eg. Legacy, 3DNow!, VEX, EVEX, XOP
Gets the CPU or CPUID feature flags
Control flow info
if it's a privileged instruction (all CPL=0 instructions (except VMCALL) and IOPL instructions IN, INS, OUT, OUTS, CLI, STI)
if this is an instruction that implicitly uses the stack pointer (SP/ESP/RSP), eg. CALL, PUSH, POP, RET, etc.
See also
if it's an instruction that saves or restores too many registers (eg. FXRSTOR, XSAVE, etc).
All flags that are read by the CPU when executing the instruction. See also
All flags that are written by the CPU, except those flags that are known to be undefined, always set or always cleared. See also
All flags that are always cleared by the CPU. See also
All flags that are always set by the CPU. See also
All flags that are undefined after executing the instruction. See also
All flags that are modified by the CPU. This is + + +
Checks if it's a Jcc SHORT or Jcc NEAR instruction
Checks if it's a Jcc NEAR instruction
Checks if it's a Jcc SHORT instruction
Checks if it's a JMP SHORT instruction
Checks if it's a JMP NEAR instruction
Checks if it's a JMP SHORT or a JMP NEAR instruction
Checks if it's a JMP FAR instruction
Checks if it's a CALL NEAR instruction
Checks if it's a CALL FAR instruction
Checks if it's a JMP NEAR reg/[mem] instruction
Checks if it's a JMP FAR [mem] instruction
Checks if it's a CALL NEAR reg/[mem] instruction
Checks if it's a CALL FAR [mem] instruction
Checks if it's a JKccD SHORT or JKccD NEAR instruction
Checks if it's a JKccD NEAR instruction
Checks if it's a JKccD SHORT instruction
Checks if it's a JCXZ SHORT, JECXZ SHORT or JRCXZ SHORT instruction
Checks if it's a LOOPcc SHORT instruction
Checks if it's a LOOP SHORT instruction
Negates the condition code, eg. JE -> JNE. Can be used if it's Jcc, SETcc, CMOVcc, CMPccXADD, LOOPcc
and does nothing if the instruction doesn't have a condition code.
Converts Jcc/JMP NEAR to Jcc/JMP SHORT and does nothing if it's not a Jcc/JMP NEAR instruction
Converts Jcc/JMP SHORT to Jcc/JMP NEAR and does nothing if it's not a Jcc/JMP SHORT instruction
Gets the condition code if it's Jcc, SETcc, CMOVcc, CMPccXADD, LOOPcc else is returned
Checks if it's a string instruction such as MOVS, LODS, STOS, etc.
Gets the virtual address of a memory operand
Operand number, must be a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Delegate that returns the value of a register or the base address of a segment register
Gets the virtual address of a memory operand
Operand number, must be a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Returns values of registers and segment base addresses
Gets the virtual address of a memory operand
Operand number, must be a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Result if this method returns
Returns values of registers and segment base addresses
Gets the virtual address of a memory operand
Operand number, must be a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Returns values of registers and segment base addresses
Result if this method returns
Contains the FPU TOP increment, whether it's conditional and whether the instruction writes to TOP
Used if is :
Value added to TOP.
This is negative if it pushes one or more values and positive if it pops one or more values
and 0 if it writes to TOP (eg. FLDENV, etc) without pushing/popping anything.
if it's a conditional push/pop (eg. FPTAN or FSINCOS)
if TOP is written (it's a conditional/unconditional push/pop, FNSAVE, FLDENV, etc)
Constructor
Gets a register value. If is a segment register, this method should return the segment's base address,
not the segment's register value.
Register (GPR8, GPR16, GPR32, GPR64, XMM, YMM, ZMM, seg)
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Only used if it's a vsib memory operand. Size in bytes of elements in vector index register (4 or 8).
Called when calculating the virtual address of a memory operand
Gets a register value. If is a segment register, this method should return the segment's base address,
not the segment's register value.
Register (GPR8, GPR16, GPR32, GPR64, XMM, YMM, ZMM, seg)
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Only used if it's a vsib memory operand. Size in bytes of elements in vector index register (4 or 8).
Gets a register value. If is a segment register, this method should return the segment's base address,
not the segment's register value.
Register (GPR8, GPR16, GPR32, GPR64, XMM, YMM, ZMM, seg)
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Only used if it's a vsib memory operand. Size in bytes of elements in vector index register (4 or 8).
Updated with the register value if successful
Called when calculating the virtual address of a memory operand
Gets a register value. If is a segment register, this method should return the segment's base address,
not the segment's register value.
Register (GPR8, GPR16, GPR32, GPR64, XMM, YMM, ZMM, seg)
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Only used if it's a vsib memory operand. Size in bytes of elements in vector index register (4 or 8).
Updated with the register value if successful
Contains information about an instruction, eg. read/written registers and memory locations, operand accesses
Gets a struct iterator that returns all accessed registers. This method doesn't return all accessed registers if is .
Some instructions have a r16/r32 operand but only use the low 8 bits of the register. In that case
this method returns the 8-bit register even if it's SPL, BPL, SIL, DIL and the
instruction was decoded in 16 or 32-bit mode. This is more accurate than returning the r16/r32
register. Example instructions that do this: PINSRB, ARPL
Gets a struct iterator that returns all accessed memory locations
Operand #0 access
Operand #1 access
Operand #2 access
Operand #3 access
Operand #4 access
Gets operand access
Operand number, 0-4
Extension methods
Extension methods
Extension methods
Gets the encoding, eg. Legacy, 3DNow!, VEX, EVEX, XOP
Code value
Gets the CPU or CPUID feature flags
Code value
Gets control flow info
Code value
Checks if it's a privileged instruction (all CPL=0 instructions (except VMCALL) and IOPL instructions IN, INS, OUT, OUTS, CLI, STI)
Code value
Checks if this is an instruction that implicitly uses the stack pointer (SP/ESP/RSP), eg. CALL, PUSH, POP, RET, etc.
See also
Code value
Checks if it's an instruction that saves or restores too many registers (eg. FXRSTOR, XSAVE, etc).
Code value
Checks if it's a Jcc NEAR instruction
Code value
Checks if it's a Jcc SHORT instruction
Code value
Checks if it's a JMP SHORT instruction
Code value
Checks if it's a JMP NEAR instruction
Code value
Checks if it's a JMP SHORT or a JMP NEAR instruction
Code value
Checks if it's a JMP FAR instruction
Code value
Checks if it's a CALL NEAR instruction
Code value
Checks if it's a CALL FAR instruction
Code value
Checks if it's a JMP NEAR reg/[mem] instruction
Code value
Checks if it's a JMP FAR [mem] instruction
Code value
Checks if it's a CALL NEAR reg/[mem] instruction
Code value
Checks if it's a CALL FAR [mem] instruction
Code value
Checks if it's a JKccD SHORT or JKccD NEAR instruction
Code value
Checks if it's a JKccD NEAR instruction
Code value
Checks if it's a JKccD SHORT instruction
Code value
Gets the condition code if it's Jcc, SETcc, CMOVcc, CMPccXADD, LOOPcc else
is returned
Code value
Checks if it's a string instruction such as MOVS, LODS, STOS, etc.
Checks if it's a JCXZ SHORT, JECXZ SHORT or JRCXZ SHORT instruction
Code value
Checks if it's a LOOPcc SHORT instruction
Code value
Checks if it's a LOOP SHORT instruction
Code value
Negates the condition code, eg. JE -> JNE. Can be used if it's Jcc, SETcc, CMOVcc, CMPccXADD, LOOPcc
and returns the original value if it's none of those instructions.
Code value
Converts Jcc/JMP NEAR to Jcc/JMP SHORT. Returns the input if it's not a Jcc/JMP NEAR instruction.
Code value
Converts Jcc/JMP SHORT to Jcc/JMP NEAR. Returns the input if it's not a Jcc/JMP SHORT instruction.
Code value
Checks if it's a Jcc SHORT or Jcc NEAR instruction
Code value
Instruction info options used by
No option is enabled
Don't include memory usage, i.e., will return an empty iterator. All
registers that are used by memory operands are still returned by .
Don't include register usage, i.e., will return an empty iterator
Creates s.
Constructor
Creates an . The return value is only valid until this instance creates a new value.
Instruction
Creates an . The return value is only valid until this instance creates a new value.
Instruction
Options
A list of s. It's faster than and has
methods to get references to the elements so no gets copied.
Use 'foreach (ref var instr in list)' to use the foreach ref iterator.
Gets the number of valid elements
Gets the size of the internal array
Gets a reference to an element. The returned reference is valid until the internal array is resized.
Index of element
Constructor
Constructor
Initial size of the internal array
Constructor
List that will be copied to this instance
Constructor
Collection that will be copied to this instance
Allocates an uninitialized element at the end of the list and returns a reference to it.
The return value can be passed to eg. Decoder.Decode(out Instruction).
The returned reference is valid until the internal array is resized.
Inserts an element
Index of element
Instruction to add
Removes an element from the list
Index of element to remove
Adds a collection to the end of this list
Collection to add
Inserts elements
Index of element
Items to insert
Removes elements
Index of element
Number of elements to remove
Adds a new instruction to the end of the list
Instruction to add
Clears the list
Checks if exists in the list
Instruction
Gets the index of or -1 if it doesn't exist in the list
Instruction
Gets the index of or -1 if it doesn't exist in the list
Instruction
Start index
Gets the index of or -1 if it doesn't exist in the list
Instruction
Start index
Number of instructions to check
Gets the last index of or -1 if it doesn't exist in the list
Instruction
Gets the last index of or -1 if it doesn't exist in the list
Instruction
Start index
Gets the last index of or -1 if it doesn't exist in the list
Instruction
Start index
Number of instructions to check
Removes the first copy of and returns if it was removed
Instruction
Copies this collection to
Destination array
Copies this collection to
Destination array
Start index in
Copies this collection to
Index in this collection
Destination array
Destination index
Number of elements to copy
Creates a new list that contains some of the instructions in this list
Index of first instruction
Number of instructions
Gets a ref iterator (use 'foreach ref')
Returns a read-only wrapper for this list
Creates a new array with all instructions and returns it
Intel (XED) formatter
Gets the formatter options
Constructor
Constructor
Symbol resolver or null
Operand options provider or null
Constructor
Formatter options or null
Symbol resolver or null
Operand options provider or null
Formats the mnemonic and/or any prefixes
Instruction
Output
Options
Gets the number of operands that will be formatted. A formatter can add and remove operands
Instruction
Returns the operand access but only if it's an operand added by the formatter. If it's an
operand that is part of , you should call eg. .
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Updated with operand access if successful
Converts a formatter operand index to an instruction operand index. Returns -1 if it's an operand added by the formatter
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Converts an instruction operand index to a formatter operand index. Returns -1 if the instruction operand isn't used by the formatter
Instruction
Instruction operand
Formats an operand. This is a formatter operand and not necessarily a real instruction operand.
A formatter can add and remove operands.
Instruction
Output
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Formats an operand separator
Instruction
Output
Formats all operands
Instruction
Output
Formats the whole instruction: prefixes, mnemonic, operands
Instruction
Output
Formats a register
Register
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Used by a formatter to resolve symbols
Tries to resolve a symbol. It returns if was updated.
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
Instruction operand number, 0-based, or -1 if it's an operand created by the formatter.
Address
Size of in bytes (eg. 1, 2, 4 or 8)
Updated with symbol information if this method returns
Symbol flags
No bit is set
It's a symbol relative to a register, eg. a struct offset [ebx+some_struct.field1]. If this is cleared, it's the address of a symbol.
It's a signed symbol and it should be displayed as -symbol or reg-symbol instead of symbol or reg+symbol
Set if is valid
Created by a
The address of the symbol
Contains the symbol
Symbol flags
Checks whether is valid
Symbol size if is
Constructor
The address of the symbol
Symbol
Constructor
The address of the symbol
Symbol
Symbol size
Constructor
The address of the symbol
Symbol
Color
Constructor
The address of the symbol
Symbol
Color
Symbol flags
Constructor
The address of the symbol
Symbol
Constructor
The address of the symbol
Symbol
Symbol size
Constructor
The address of the symbol
Symbol
Symbol flags
Constructor
The address of the symbol
Symbol
Symbol flags
Symbol size
Contains one or more s (text and color)
if this is the default instance
The text and color unless is non-null
Text and color or null if should be used
Constructor
Text
Color
Constructor
Text
Constructor
All text parts
Contains text and colors
Text
Color
Constructor
Text
Color
Mandatory prefix
No mandatory prefix (legacy and 3DNow! tables only)
Empty mandatory prefix (no 66, F3 or F2 prefix)
66 prefix
F3 prefix
F2 prefix
Masm formatter
Gets the formatter options
Constructor
Constructor
Symbol resolver or null
Operand options provider or null
Constructor
Formatter options or null
Symbol resolver or null
Operand options provider or null
Formats the mnemonic and any prefixes
Instruction
Output
Options
Gets the number of operands that will be formatted. A formatter can add and remove operands
Instruction
Returns the operand access but only if it's an operand added by the formatter. If it's an
operand that is part of , you should call eg. .
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Updated with operand access if successful
Converts a formatter operand index to an instruction operand index. Returns -1 if it's an operand added by the formatter
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Converts an instruction operand index to a formatter operand index. Returns -1 if the instruction operand isn't used by the formatter
Instruction
Instruction operand
Formats an operand. This is a formatter operand and not necessarily a real instruction operand.
A formatter can add and remove operands.
Instruction
Output
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Formats an operand separator
Instruction
Output
Formats all operands
Instruction
Output
Formats the whole instruction: prefixes, mnemonic, operands
Instruction
Output
Formats a register
Register
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Memory operand
Segment override or
Base register or
Index register or
Index register scale (1, 2, 4, or 8)
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
if it's broadcast memory (EVEX instructions)
Constructor
Base register or
Index register or
Index register scale (1, 2, 4, or 8)
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
if it's broadcast memory (EVEX instructions)
Segment override or
Constructor
Base register or
Index register or
Index register scale (1, 2, 4, or 8)
if it's broadcast memory (EVEX instructions)
Segment override or
Constructor
Base register or
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
if it's broadcast memory (EVEX instructions)
Segment override or
Constructor
Index register or
Index register scale (1, 2, 4, or 8)
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
if it's broadcast memory (EVEX instructions)
Segment override or
Constructor
Base register or
Memory displacement
if it's broadcast memory (EVEX instructions)
Segment override or
Constructor
Base register or
Index register or
Index register scale (1, 2, 4, or 8)
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
Constructor
Base register or
Index register or
Index register scale (1, 2, 4, or 8)
Constructor
Base register or
Index register or
Constructor
Base register or
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
Constructor
Index register or
Index register scale (1, 2, 4, or 8)
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
Constructor
Base register or
Memory displacement
Constructor
Base register or
Constructor
Memory displacement
0 (no displ), 1 (16/32/64-bit, but use 2/4/8 if it doesn't fit in a ), 2 (16-bit), 4 (32-bit) or 8 (64-bit)
Size of a memory reference
Unknown size or the instruction doesn't reference any memory (eg. LEA)
Memory location contains a
Memory location contains a
Memory location contains a
Memory location contains a uint52
Memory location contains a
Memory location contains a uint128
Memory location contains a uint256
Memory location contains a uint512
Memory location contains a
Memory location contains a
Memory location contains a
Memory location contains a
Memory location contains a int128
Memory location contains a int256
Memory location contains a int512
Memory location contains a seg:ptr pair, (offset) + (segment/selector)
Memory location contains a seg:ptr pair, (offset) + (segment/selector)
Memory location contains a seg:ptr pair, (offset) + (segment/selector)
Memory location contains a 16-bit offset (JMP/CALL WORD PTR [mem])
Memory location contains a 32-bit offset (JMP/CALL DWORD PTR [mem])
Memory location contains a 64-bit offset (JMP/CALL QWORD PTR [mem])
Memory location contains two s (16-bit BOUND)
Memory location contains two s (32-bit BOUND)
32-bit BNDMOV, 2 x
64-bit BNDMOV, 2 x
Memory location contains a 16-bit limit and a 32-bit address (eg. LGDTW, LGDTD)
Memory location contains a 16-bit limit and a 64-bit address (eg. LGDTQ)
Memory location contains a float16
Memory location contains a
Memory location contains a
Memory location contains a float80
Memory location contains a float128
Memory location contains a bfloat16
Memory location contains a 14-byte FPU environment (16-bit FLDENV/FSTENV)
Memory location contains a 28-byte FPU environment (32/64-bit FLDENV/FSTENV)
Memory location contains a 94-byte FPU environment (16-bit FSAVE/FRSTOR)
Memory location contains a 108-byte FPU environment (32/64-bit FSAVE/FRSTOR)
Memory location contains 512-bytes of FXSAVE/FXRSTOR data
Memory location contains 512-bytes of FXSAVE64/FXRSTOR64 data
32-bit XSAVE area
64-bit XSAVE area
Memory location contains a 10-byte bcd value (FBLD/FBSTP)
64-bit location: TILECFG (LDTILECFG/STTILECFG)
Tile data
80-bit segment descriptor and selector: 0-7 = descriptor, 8-9 = selector
384-bit AES 128 handle (Key Locker)
512-bit AES 256 handle (Key Locker)
16-bit location: 2 x
16-bit location: 2 x
32-bit location: 4 x
32-bit location: 4 x
32-bit location: 2 x
32-bit location: 2 x
32-bit location: 2 x float16
32-bit location: 2 x bfloat16
64-bit location: 8 x
64-bit location: 8 x
64-bit location: 4 x
64-bit location: 4 x
64-bit location: 2 x
64-bit location: 2 x
64-bit location: 4 x float16
64-bit location: 2 x
128-bit location: 16 x
128-bit location: 16 x
128-bit location: 8 x
128-bit location: 8 x
128-bit location: 4 x
128-bit location: 4 x
128-bit location: 2 x uint52
128-bit location: 2 x
128-bit location: 2 x
128-bit location: 8 x float16
128-bit location: 4 x
128-bit location: 2 x
128-bit location: 8 x bfloat16
128-bit location: 4 x (2 x float16)
128-bit location: 4 x (2 x bfloat16)
256-bit location: 32 x
256-bit location: 32 x
256-bit location: 16 x
256-bit location: 16 x
256-bit location: 8 x
256-bit location: 8 x
256-bit location: 4 x uint52
256-bit location: 4 x
256-bit location: 4 x
256-bit location: 2 x uint128
256-bit location: 2 x int128
256-bit location: 16 x float16
256-bit location: 8 x
256-bit location: 4 x
256-bit location: 2 x float128
256-bit location: 16 x bfloat16
256-bit location: 8 x (2 x float16)
256-bit location: 8 x (2 x bfloat16)
512-bit location: 64 x
512-bit location: 64 x
512-bit location: 32 x
512-bit location: 32 x
512-bit location: 16 x
512-bit location: 16 x
512-bit location: 8 x uint52
512-bit location: 8 x
512-bit location: 8 x
256-bit location: 4 x uint128
512-bit location: 32 x float16
512-bit location: 16 x
512-bit location: 8 x
512-bit location: 16 x (2 x float16)
512-bit location: 16 x (2 x bfloat16)
Broadcast float16 to 32-bits
Broadcast to 64-bits
Broadcast to 64-bits
Broadcast float16 to 64-bits
Broadcast to 64-bits
Broadcast to 128-bits
Broadcast to 128-bits
Broadcast to 128-bits
Broadcast to 128-bits
Broadcast uint52 to 128-bits
Broadcast to 128-bits
Broadcast to 128-bits
Broadcast float16 to 128-bits
Broadcast to 128-bits
Broadcast to 128-bits
Broadcast 2 x to 128-bits
Broadcast 2 x to 128-bits
Broadcast 2 x to 128-bits
Broadcast 2 x float16 to 128-bits
Broadcast 2 x bfloat16 to 128-bits
Broadcast to 256-bits
Broadcast to 256-bits
Broadcast to 256-bits
Broadcast to 256-bits
Broadcast uint52 to 256-bits
Broadcast to 256-bits
Broadcast to 256-bits
Broadcast float16 to 256-bits
Broadcast to 256-bits
Broadcast to 256-bits
Broadcast 2 x to 256-bits
Broadcast 2 x to 256-bits
Broadcast 2 x to 256-bits
Broadcast 2 x float16 to 256-bits
Broadcast 2 x bfloat16 to 256-bits
Broadcast to 512-bits
Broadcast to 512-bits
Broadcast to 512-bits
Broadcast to 512-bits
Broadcast uint52 to 512-bits
Broadcast to 512-bits
Broadcast to 512-bits
Broadcast float16 to 512-bits
Broadcast to 512-bits
Broadcast to 512-bits
Broadcast 2 x float16 to 512-bits
Broadcast 2 x to 512-bits
Broadcast 2 x to 512-bits
Broadcast 2 x to 512-bits
Broadcast 2 x bfloat16 to 512-bits
extension methods
Checks if is a broadcast memory type
Memory size
Gets the memory size info
Memory size
Gets the size in bytes of the memory location or 0 if it's not accessed by the instruction or unknown or variable sized
Memory size
Gets the size in bytes of the packed element. If it's not a packed data type, it's equal to .
Memory size
Gets the element type if it's packed data or if it's not packed data
Memory size
Gets the element type info if it's packed data or if it's not packed data
Memory size
if it's signed data (signed integer or a floating point value)
Memory size
if this is a packed data type, eg.
Memory size
Gets the number of elements in the packed data type or 1 if it's not packed data ()
Memory size
information
Gets the value
Size in bytes of the memory location or 0 if it's not accessed or unknown
Size in bytes of the packed element. If it's not a packed data type, it's equal to .
Element type if it's packed data or the type itself if it's not packed data
if it's signed data (signed integer or a floating point value)
if it's a broadcast memory type
if this is a packed data type, eg. . See also
Gets the number of elements in the packed data type or 1 if it's not packed data ()
Constructor
Memory size value
Size of location
Size of the packed element, or if it's not packed data
Element type if it's packed data or if it's not packed data
if signed data
if broadcast
Memory size options used by the formatters
Show memory size if the assembler requires it, else don't show anything
Always show the memory size, even if the assembler doesn't need it
Show memory size if a human can't figure out the size of the operand
Never show memory size
Mnemonic
Extension methods
Gets the mnemonic
Code value
MVEX conversion function
No conversion function
Sf32(xxx)
Sf64(xxx)
Si32(xxx)
Si64(xxx)
Uf32(xxx)
Uf64(xxx)
Ui32(xxx)
Ui64(xxx)
Df32(xxx)
Df64(xxx)
Di32(xxx)
Di64(xxx)
(MVEX) EH bit value
Not hard coded to 0 or 1 so can be used for other purposes
EH bit must be 0
EH bit must be 1
MVEX register/memory operand conversion
No operand conversion
Register swizzle: zmm0 or zmm0 {dcba}
Register swizzle: zmm0 {cdab}
Register swizzle: zmm0 {badc}
Register swizzle: zmm0 {dacb}
Register swizzle: zmm0 {aaaa}
Register swizzle: zmm0 {bbbb}
Register swizzle: zmm0 {cccc}
Register swizzle: zmm0 {dddd}
Memory Up/DownConv: [rax] / zmm0
Memory UpConv: [rax] {1to16} or [rax] {1to8}
Memory UpConv: [rax] {4to16} or [rax] {4to8}
Memory Up/DownConv: [rax] {float16} / zmm0 {float16}
Memory Up/DownConv: [rax] {uint8} / zmm0 {uint8}
Memory Up/DownConv: [rax] {sint8} / zmm0 {sint8}
Memory Up/DownConv: [rax] {uint16} / zmm0 {uint16}
Memory Up/DownConv: [rax] {sint16} / zmm0 {sint16}
MVEX tuple type lut kind used together with the MVEX.SSS bits to get the tuple type
elements, eg. Si32/Di32/Ui32
elements, eg. Si32/Di32/Ui32 with half memory size (32 bytes instead of 64 bytes, eg. VCVTUDQ2PD/VCVTDQ2PD)
elements, eg. Si32/Di32/Ui32 with built-in {4to16} broadcast
elements, eg. Si32/Di32/Ui32 with built-in {1to16} broadcast or element level
elements, eg. Si64/Di64/Ui64
elements, eg. Si64/Di64/Ui64 with built-in {4to8} broadcast
elements, eg. Si64/Di64/Ui64 with built-in {1to8} broadcast or element level
elements, eg. Sf32/Df32/Uf32
elements, eg. Sf32/Df32/Uf32 with half memory size (32 bytes instead of 64 bytes, eg. VCVTPS2PD
elements, eg. Sf32/Df32/Uf32 with built-in {4to16} broadcast
elements, eg. Sf32/Df32/Uf32 with built-in {1to16} broadcast or element level
elements, eg. Sf64/Df64/Uf64
elements, eg. Sf64/Df64/Uf64 with built-in {4to8} broadcast
elements, eg. Sf64/Df64/Uf64 with built-in {1to8} broadcast or element level
Nasm formatter
Gets the formatter options
Constructor
Constructor
Symbol resolver or null
Operand options provider or null
Constructor
Formatter options or null
Symbol resolver or null
Operand options provider or null
Formats the mnemonic and/or any prefixes
Instruction
Output
Options
Gets the number of operands that will be formatted. A formatter can add and remove operands
Instruction
Returns the operand access but only if it's an operand added by the formatter. If it's an
operand that is part of , you should call eg. .
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Updated with operand access if successful
Converts a formatter operand index to an instruction operand index. Returns -1 if it's an operand added by the formatter
Instruction
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Converts an instruction operand index to a formatter operand index. Returns -1 if the instruction operand isn't used by the formatter
Instruction
Instruction operand
Formats an operand. This is a formatter operand and not necessarily a real instruction operand.
A formatter can add and remove operands.
Instruction
Output
Operand number, 0-based. This is a formatter operand and isn't necessarily the same as an instruction operand.
See
Formats an operand separator
Instruction
Output
Formats all operands
Instruction
Output
Formats the whole instruction: prefixes, mnemonic, operands
Instruction
Output
Formats a register
Register
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Formats a
Value
Options
Operand, register and memory access
Nothing is read and nothing is written
The value is read
The value is sometimes read and sometimes not
The value is completely overwritten
Conditional write, sometimes it's written and sometimes it's not modified
The value is read and written
The value is read and sometimes written
The memory operand doesn't refer to memory (eg. LEA instruction) or it's an instruction that doesn't read the data to a register or doesn't write to the memory location, it just prefetches/invalidates it, eg. INVLPG, PREFETCHNTA, VGATHERPF0DPS, etc. Some of those instructions still check if the code can access the memory location.
Opcode info
Gets the code
Gets the mnemonic
Gets the encoding
if it's an instruction, if it's eg. , db, dw, dd, dq, zero_bytes
if it's an instruction available in 16-bit mode
if it's an instruction available in 32-bit mode
if it's an instruction available in 64-bit mode
if an FWAIT (9B) instruction is added before the instruction
(Legacy encoding) Gets the required operand size (16,32,64) or 0
(Legacy encoding) Gets the required address size (16,32,64) or 0
(VEX/XOP/EVEX) L / L'L value or default value if is
(VEX/XOP/EVEX/MVEX) W value or default value if or is
(VEX/XOP/EVEX) if the L / L'L fields are ignored.
EVEX: if reg-only ops and {er} (EVEX.b is set), L'L is the rounding control and not ignored.
(VEX/XOP/EVEX/MVEX) if the W field is ignored in 16/32/64-bit modes
(VEX/XOP/EVEX/MVEX) if the W field is ignored in 16/32-bit modes (but not 64-bit mode)
(EVEX/MVEX) Gets the tuple type
(MVEX) Gets the EH bit that's required to encode this instruction
(MVEX) if the instruction supports eviction hint (if it has a memory operand)
(MVEX) if the instruction's rounding control bits are stored in imm8[1:0]
(MVEX) if the instruction ignores op mask registers (eg. {k1})
(MVEX) if the instruction must have MVEX.SSS=000 if MVEX.EH=1
(MVEX) Gets the tuple type / conv lut kind
(MVEX) Gets the conversion function, eg. Sf32
(MVEX) Gets flags indicating which conversion functions are valid (bit 0 == func 0)
(MVEX) Gets flags indicating which swizzle functions are valid (bit 0 == func 0)
If it has a memory operand, gets the (non-broadcast memory type)
If it has a memory operand, gets the (broadcast memory type)
(EVEX) if the instruction supports broadcasting (EVEX.b bit) (if it has a memory operand)
(EVEX/MVEX) if the instruction supports rounding control
(EVEX/MVEX) if the instruction supports suppress all exceptions
(EVEX/MVEX) if an opmask register can be used
(EVEX/MVEX) if a non-zero opmask register must be used
(EVEX) if the instruction supports zeroing masking (if one of the opmask registers K1-K7 is used and destination operand is not a memory operand)
if the LOCK (F0) prefix can be used
if the XACQUIRE (F2) prefix can be used
if the XRELEASE (F3) prefix can be used
if the REP / REPE (F3) prefixes can be used
if the REPNE (F2) prefix can be used
if the BND (F2) prefix can be used
if the HINT-TAKEN (3E) and HINT-NOT-TAKEN (2E) prefixes can be used
if the NOTRACK (3E) prefix can be used
if rounding control is ignored (#UD is not generated)
(AMD) if the LOCK prefix can be used as an extra register bit (bit 3) to access registers 8-15 without a REX prefix (eg. in 32-bit mode)
if the default operand size is 64 in 64-bit mode. A 66 prefix can switch to 16-bit operand size.
if the operand size is always 64 in 64-bit mode. A 66 prefix is ignored.
if the Intel decoder forces 64-bit operand size. A 66 prefix is ignored.
if it can only be executed when CPL=0
if it can be executed when CPL=0
if it can be executed when CPL=1
if it can be executed when CPL=2
if it can be executed when CPL=3
if the instruction accesses the I/O address space (eg. IN, OUT, INS, OUTS)
if it's one of the many nop instructions (does not include FPU nop instructions, eg. FNOP)
if it's one of the many reserved nop instructions (eg. 0F0D, 0F18-0F1F)
if it's a serializing instruction (Intel CPUs)
if it's a serializing instruction (AMD CPUs)
if the instruction requires either CPL=0 or CPL<=3 depending on some CPU option (eg. CR4.TSD, CR4.PCE, CR4.UMIP)
if it's a tracked JMP/CALL indirect instruction (CET)
if it's a non-temporal hint memory access (eg. MOVNTDQ)
if it's a no-wait FPU instruction, eg. FNINIT
if the mod bits are ignored and it's assumed modrm[7:6] == 11b
if the 66 prefix is not allowed (it will #UD)
if the F2/F3 prefixes aren't allowed
if the index reg's reg-num (vsib op) (if any) and register ops' reg-nums must be unique,
eg. MNEMONIC XMM1,YMM1,[RAX+ZMM1*2] is invalid. Registers = XMM/YMM/ZMM/TMM.
if the destination register's reg-num must not be present in any other operand, eg. MNEMONIC XMM1,YMM1,[RAX+ZMM1*2]
is invalid. Registers = XMM/YMM/ZMM/TMM.
if it's a privileged instruction (all CPL=0 instructions (except VMCALL) and IOPL instructions IN, INS, OUT, OUTS, CLI, STI)
if it reads/writes too many registers
if it's an instruction that implicitly uses the stack register, eg. CALL, POP, etc
if the instruction doesn't read the segment register if it uses a memory operand
if the opmask register is read and written (instead of just read). This also implies that it can't be K0.
if it can be executed in real mode
if it can be executed in protected mode
if it can be executed in virtual 8086 mode
if it can be executed in compatibility mode
if it can be executed in 64-bit mode
if it can be used outside SMM
if it can be used in SMM
if it can be used outside an enclave (SGX)
if it can be used inside an enclave (SGX1)
if it can be used inside an enclave (SGX2)
if it can be used outside VMX operation
if it can be used in VMX root operation
if it can be used in VMX non-root operation
if it can be used outside SEAM
if it can be used in SEAM
if #UD is generated in TDX non-root operation
if #VE is generated in TDX non-root operation
if an exception (eg. #GP(0), #VE) may be generated in TDX non-root operation
(Intel VMX) if it causes a VM exit in VMX non-root operation
(Intel VMX) if it may cause a VM exit in VMX non-root operation
(Intel VMX) if it causes an SMM VM exit in VMX root operation (if dual-monitor treatment is activated)
(AMD SVM) if it causes a #VMEXIT in guest mode
(AMD SVM) if it may cause a #VMEXIT in guest mode
if it causes a TSX abort inside a TSX transaction
if it causes a TSX abort inside a TSX transaction depending on the implementation
if it may cause a TSX abort inside a TSX transaction depending on some condition
if it's decoded by iced's 16-bit Intel decoder
if it's decoded by iced's 32-bit Intel decoder
if it's decoded by iced's 64-bit Intel decoder
if it's decoded by iced's 16-bit AMD decoder
if it's decoded by iced's 32-bit AMD decoder
if it's decoded by iced's 64-bit AMD decoder
Gets the decoder option that's needed to decode the instruction or
Gets the opcode table
Gets the mandatory prefix
Gets the opcode byte(s). The low byte(s) of this value is the opcode. The length is in .
It doesn't include the table value, see .
Example values: 0xDFC0 (), 0x01D8 (), 0x2A (, , etc).
Gets the length of the opcode bytes (). The low bytes is the opcode value.
if it's part of a group
Group index (0-7) or -1. If it's 0-7, it's stored in the reg field of the modrm byte.
if it's part of a modrm.rm group
modrm.rm group index (0-7) or -1. If it's 0-7, it's stored in the rm field of the modrm byte.
Gets the number of operands
Gets operand #0's opkind
Gets operand #1's opkind
Gets operand #2's opkind
Gets operand #3's opkind
Gets operand #4's opkind
Gets an operand's opkind
Operand number, 0-4
Checks if the instruction is available in 16-bit mode, 32-bit mode or 64-bit mode
16, 32 or 64
Gets the opcode string, eg. VEX.128.66.0F38.W0 78 /r, see also
Gets the instruction string, eg. VPBROADCASTB xmm1, xmm2/m8, see also
Gets the instruction string, eg. VPBROADCASTB xmm1, xmm2/m8, see also
Operand kind
No operand
Far branch 16-bit offset, 16-bit segment/selector
Far branch 32-bit offset, 16-bit segment/selector
Memory offset without a modrm byte (eg. MOV AL,[offset])
Memory (modrm)
Memory (modrm), MPX:
16/32-bit mode: must be 32-bit addressing
64-bit mode: 64-bit addressing is forced and must not be RIP relative
Memory (modrm), MPX:
16/32-bit mode: must be 32-bit addressing
64-bit mode: 64-bit addressing is forced and must not be RIP relative
Memory (modrm), vsib32, XMM registers
Memory (modrm), vsib64, XMM registers
Memory (modrm), vsib32, YMM registers
Memory (modrm), vsib64, YMM registers
Memory (modrm), vsib32, ZMM registers
Memory (modrm), vsib64, ZMM registers
8-bit GPR or memory
16-bit GPR or memory
32-bit GPR or memory
32-bit GPR or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced
64-bit GPR or memory
64-bit GPR or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced
MM register or memory
XMM register or memory
YMM register or memory
ZMM register or memory
BND register or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced
K register or memory
8-bit GPR encoded in the reg field of the modrm byte
8-bit GPR encoded in the low 3 bits of the opcode
16-bit GPR encoded in the reg field of the modrm byte
16-bit GPR encoded in the reg field of the modrm byte. This is a memory operand and it uses the address size prefix (67h) not the operand size prefix (66h).
16-bit GPR encoded in the mod + r/m fields of the modrm byte
16-bit GPR encoded in the low 3 bits of the opcode
32-bit GPR encoded in the reg field of the modrm byte
32-bit GPR encoded in the reg field of the modrm byte. This is a memory operand and it uses the address size prefix (67h) not the operand size prefix (66h).
32-bit GPR encoded in the mod + r/m fields of the modrm byte
32-bit GPR encoded in the low 3 bits of the opcode
32-bit GPR encoded in the the V'vvvv field (VEX/EVEX/XOP)
64-bit GPR encoded in the reg field of the modrm byte
64-bit GPR encoded in the reg field of the modrm byte. This is a memory operand and it uses the address size prefix (67h) not the operand size prefix (66h).
64-bit GPR encoded in the mod + r/m fields of the modrm byte
64-bit GPR encoded in the low 3 bits of the opcode
64-bit GPR encoded in the the V'vvvv field (VEX/EVEX/XOP)
Segment register encoded in the reg field of the modrm byte
K register encoded in the reg field of the modrm byte
K register (+1) encoded in the reg field of the modrm byte
K register encoded in the mod + r/m fields of the modrm byte
K register encoded in the the V'vvvv field (VEX/EVEX/MVEX/XOP)
MM register encoded in the reg field of the modrm byte
MM register encoded in the mod + r/m fields of the modrm byte
XMM register encoded in the reg field of the modrm byte
XMM register encoded in the mod + r/m fields of the modrm byte
XMM register encoded in the the V'vvvv field (VEX/EVEX/XOP)
XMM register (+3) encoded in the the V'vvvv field (VEX/EVEX/XOP)
XMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only XMM0-XMM15)
XMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only XMM0-XMM15)
YMM register encoded in the reg field of the modrm byte
YMM register encoded in the mod + r/m fields of the modrm byte
YMM register encoded in the the V'vvvv field (VEX/EVEX/XOP)
YMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only YMM0-YMM15)
YMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only YMM0-YMM15)
ZMM register encoded in the reg field of the modrm byte
ZMM register encoded in the mod + r/m fields of the modrm byte
ZMM register encoded in the the V'vvvv field (VEX/EVEX/MVEX/XOP)
ZMM register (+3) encoded in the the V'vvvv field (VEX/EVEX/XOP)
CR register encoded in the reg field of the modrm byte
DR register encoded in the reg field of the modrm byte
TR register encoded in the reg field of the modrm byte
BND register encoded in the reg field of the modrm byte
ES register
CS register
SS register
DS register
FS register
GS register
AL register
CL register
AX register
DX register
EAX register
RAX register
ST(0) register
ST(i) register encoded in the low 3 bits of the opcode
4-bit immediate (m2z field, low 4 bits of the /is5 immediate, eg. VPERMIL2PS)
8-bit immediate
Constant 1 (8-bit immediate)
8-bit immediate sign extended to 16 bits
8-bit immediate sign extended to 32 bits
8-bit immediate sign extended to 64 bits
16-bit immediate
32-bit immediate
32-bit immediate sign extended to 64 bits
64-bit immediate
seg:[rSI] memory operand (string instructions)
es:[rDI] memory operand (string instructions)
seg:[rDI] memory operand ((V)MASKMOVQ instructions)
seg:[rBX+al] memory operand (XLATB instruction)
16-bit branch, 1-byte signed relative offset
32-bit branch, 1-byte signed relative offset
64-bit branch, 1-byte signed relative offset
16-bit branch, 2-byte signed relative offset
32-bit branch, 4-byte signed relative offset
64-bit branch, 4-byte signed relative offset
XBEGIN, 2-byte signed relative offset
XBEGIN, 4-byte signed relative offset
2-byte branch offset (JMPE instruction)
4-byte branch offset (JMPE instruction)
Memory (modrm) and the sib byte must be present
TMM register encoded in the reg field of the modrm byte
TMM register encoded in the mod + r/m fields of the modrm byte
TMM register encoded in the the V'vvvv field (VEX/EVEX/XOP)
Opcode table
Legacy/MAP0 table
0F/MAP1 table (legacy, VEX, EVEX, MVEX)
0F38/MAP2 table (legacy, VEX, EVEX, MVEX)
0F3A/MAP3 table (legacy, VEX, EVEX, MVEX)
MAP5 table (EVEX)
MAP6 table (EVEX)
MAP8 table (XOP)
MAP9 table (XOP)
MAP10 table (XOP)
Instruction operand kind
A register ().
This operand kind uses , , , or depending on operand number. See also .
Near 16-bit branch. This operand kind uses
Near 32-bit branch. This operand kind uses
Near 64-bit branch. This operand kind uses
Far 16-bit branch. This operand kind uses and
Far 32-bit branch. This operand kind uses and
8-bit constant. This operand kind uses
8-bit constant used by the ENTER, EXTRQ, INSERTQ instructions. This operand kind uses
16-bit constant. This operand kind uses
32-bit constant. This operand kind uses
64-bit constant. This operand kind uses
An 8-bit value sign extended to 16 bits. This operand kind uses
An 8-bit value sign extended to 32 bits. This operand kind uses
An 8-bit value sign extended to 64 bits. This operand kind uses
A 32-bit value sign extended to 64 bits. This operand kind uses
seg:[SI]. This operand kind uses , ,
seg:[ESI]. This operand kind uses , ,
seg:[RSI]. This operand kind uses , ,
seg:[DI]. This operand kind uses , ,
seg:[EDI]. This operand kind uses , ,
seg:[RDI]. This operand kind uses , ,
ES:[DI]. This operand kind uses
ES:[EDI]. This operand kind uses
ES:[RDI]. This operand kind uses
Memory operand.
This operand kind uses , , , , , , ,
A register
Don't use it!
Don't use it!
Don't use it!
Don't use it!
Don't use it!
Don't use it!
Don't use it!
extension methods
Gets register info
Register
Gets the base register, eg. AL, AX, EAX, RAX, MM0, XMM0, YMM0, ZMM0, ES
Register
The register number (index) relative to , eg. 0-15, or 0-31, or if 8-bit GPR, 0-19
Register
Gets the full register that this one is a part of, eg. CL/CH/CX/ECX/RCX -> RCX, XMM11/YMM11/ZMM11 -> ZMM11
Register
Gets the full register that this one is a part of, except if it's a GPR in which case the 32-bit register is returned,
eg. CL/CH/CX/ECX/RCX -> ECX, XMM11/YMM11/ZMM11 -> ZMM11
Register
Gets the size of the register in bytes
Register
Checks if it's a segment register (ES, CS, SS, DS, FS, GS)
Register
Checks if it's a general purpose register (AL-R15L, AX-R15W, EAX-R15D, RAX-R15)
Register
Checks if it's an 8-bit general purpose register (AL-R15L)
Register
Checks if it's a 16-bit general purpose register (AX-R15W)
Register
Checks if it's a 32-bit general purpose register (EAX-R15D)
Register
Checks if it's a 64-bit general purpose register (RAX-R15)
Register
Checks if it's a 128-bit vector register (XMM0-XMM31)
Register
Checks if it's a 256-bit vector register (YMM0-YMM31)
Register
Checks if it's a 512-bit vector register (ZMM0-ZMM31)
Register
Checks if it's EIP/RIP
Register
Checks if it's an opmask register (K0-K7)
Register
Checks if it's a control register (CR0-CR15)
Register
Checks if it's a debug register (DR0-DR15)
Register
Checks if it's a test register (TR0-TR7)
Register
Checks if it's an FPU stack register (ST0-ST7)
Register
Checks if it's a bound register (BND0-BND3)
Register
Checks if it's an MMX register (MM0-MM7)
Register
Checks if it's a tile register (TMM0-TMM7)
Register
Checks if it's an XMM, YMM or ZMM register
Register
information
Gets the register
Gets the base register, eg. AL, AX, EAX, RAX, MM0, XMM0, YMM0, ZMM0, ES
The register number (index) relative to , eg. 0-15, or 0-31, or if 8-bit GPR, 0-19
The full register that this one is a part of, eg. CL/CH/CX/ECX/RCX -> RCX, XMM11/YMM11/ZMM11 -> ZMM11
Gets the full register that this one is a part of, except if it's a GPR in which case the 32-bit register is returned,
eg. CL/CH/CX/ECX/RCX -> ECX, XMM11/YMM11/ZMM11 -> ZMM11
Size of the register in bytes
Constructor
Register
Base register, eg. AL, AX, EAX, RAX, XMM0, YMM0, ZMM0, ES
Full register, eg. RAX, ZMM0, ES
Size of register in bytes
RFLAGS bits, FPU condition code bits and misc bits (UIF) supported by the instruction info code
No bit is set
RFLAGS.OF
RFLAGS.SF
RFLAGS.ZF
RFLAGS.AF
RFLAGS.CF
RFLAGS.PF
RFLAGS.DF
RFLAGS.IF
RFLAGS.AC
UIF
FPU status word bit C0
FPU status word bit C1
FPU status word bit C2
FPU status word bit C3
Rounding control
No rounding mode
Round to nearest (even)
Round down (toward -inf)
Round up (toward +inf)
Round toward zero (truncate)
Call it like so:
Static.Assert(SomeClass.SomeConstant == 123 ? 0 : -1);
Code reader from a .
Creates a new instance of .
The input stream
The stream this instance is writing to
Reads the next byte or returns less than 0 if there are no more bytes
Code writer to a .
Creates a new instance of .
The output stream
The stream this instance is writing to
Writes the next byte
Value
Formatter output that stores the formatted text in a
Constructor
Constructor
String builder
Writes text and text kind
Text, can be an empty string
Text kind. This value can be identical to the previous value passed to this method. It's
the responsibility of the implementer to merge any such strings if needed.
Clears the instance so this class can be reused to format the next instruction
Returns the current formatted text and clears the instance so this class can be reused to format the next instruction
Gets the current output
Tuple type (EVEX/MVEX) which can be used to get the disp8 scale factor N
N = 1
N = 2
N = 4
N = 8
N = 16
N = 32
N = 64
N = b ? 4 : 8
N = b ? 4 : 16
N = b ? 4 : 32
N = b ? 4 : 64
N = b ? 8 : 16
N = b ? 8 : 32
N = b ? 8 : 64
N = b ? 2 : 4
N = b ? 2 : 8
N = b ? 2 : 16
N = b ? 2 : 32
N = b ? 2 : 64
A memory location used by an instruction
Effective segment register or if the segment register is ignored
Base register or if none
Index register or if none
Index scale (1, 2, 4 or 8)
Displacement
Size of location
Memory access
Address size
VSIB size (0, 4 or 8)
Constructor
Effective segment register or if the segment register is ignored
Base register
Index register
1, 2, 4 or 8
Displacement
Memory size
Access
Constructor
Effective segment register or if the segment register is ignored
Base register
Index register
1, 2, 4 or 8
Displacement
Memory size
Access
Constructor
Effective segment register or if the segment register is ignored
Base register
Index register
1, 2, 4 or 8
Displacement
Memory size
Access
Address size
VSIB size (0, 4 or 8)
Constructor
Effective segment register or if the segment register is ignored
Base register
Index register
1, 2, 4 or 8
Displacement
Memory size
Access
Address size
VSIB size (0, 4 or 8)
Gets the virtual address of a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Delegate that returns the value of a register or the base address of a segment register
Gets the virtual address of a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Returns values of registers and segment base addresses
Gets the virtual address of a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Result if this method returns
Returns values of registers and segment base addresses
Gets the virtual address of a memory operand
Only used if it's a vsib memory operand. This is the element index of the vector index register.
Returns values of registers and segment base addresses
Result if this method returns
ToString()
A register used by an instruction
Register
Register access
Constructor
Register
Register access
ToString()